diff options
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/user_guide/operator_list.dox | 3 | ||||
| -rw-r--r-- | docs/user_guide/release_version_and_change_log.dox | 17 |
2 files changed, 17 insertions, 3 deletions
diff --git a/docs/user_guide/operator_list.dox b/docs/user_guide/operator_list.dox index 36275e68bf..e7f1823f8b 100644 --- a/docs/user_guide/operator_list.dox +++ b/docs/user_guide/operator_list.dox @@ -1,5 +1,5 @@ /// -/// Copyright (c) 2021-2023,2024 Arm Limited. +/// Copyright (c) 2021-2024 Arm Limited. /// /// SPDX-License-Identifier: MIT /// @@ -1773,6 +1773,7 @@ where N = batches, C = channels, H = height, W = width, D = depth <tr><td>QASYMM8_SIGNED<td>QASYMM8_SIGNED<td>S32<td>S32 <tr><td>QASYMM8_SIGNED<td>QSYMM8_PER_CHANNEL<td>S32<td>S32 <tr><td>QASYMM8_SIGNED<td>QSYMM8<td>S32<td>S32 + <tr><td>QASYMM8_SIGNED<td>QASYMM8_SIGNED<td>F32<td>F32 </table> <tr> <td>CLGEMMLowpMatrixMultiplyCore diff --git a/docs/user_guide/release_version_and_change_log.dox b/docs/user_guide/release_version_and_change_log.dox index 31b756070d..d9c2c8476d 100644 --- a/docs/user_guide/release_version_and_change_log.dox +++ b/docs/user_guide/release_version_and_change_log.dox @@ -41,11 +41,24 @@ If there is more than one release in a month then an extra sequential number is @section S2_2_changelog Changelog +v24.08 Public major release + - Optimize CPU activation functions using LUT-based implementation: + - Tanh function for FP16. + +v24.05 Public major release + - Add @ref CLScatter operator for FP32/16, S32/16/8, U32/16/8 data types + - Various fixes to enable FP16 kernels in armv8a multi_isa builds. + - Updated logic in the OpenMP scheduler to exclude LITTLE cores. + v24.04 Public major release - Add Bfloat16 data type support for @ref NEMatMul. - - Optimize start-up time of @ref NEConvolutionLayer for some input configurations where GeMM is selected as the convolution algorithm - - Optimize @ref NEConvolutionLayer for input tensor size > 1e7 bytes and weight tensor height > 7 + - Add support for SoftMax in SME2 for FP32, FP16, QASYMM8 and QASYMM8_SIGNED. + - Add support for in place accumulation to CPU GEMM kernels. + - Add low-precision Int8 * Int8 -> FP32 CPU GEMM which dequantizes after multiplication + - Add is_dynamic flag to QuantizationInfo to signal to operators that it may change after configuration - Performance optimizations: + - Optimize start-up time of @ref NEConvolutionLayer for some input configurations where GeMM is selected as the convolution algorithm + - Optimize @ref NEConvolutionLayer for input tensor size > 1e7 bytes and weight tensor height > 7 - Optimize @ref NESoftmaxLayer for axis != 0 by natively supporting higher axes up to axis 3. v24.02.1 Public patch release |