Apply clang-format on repository

Code is formatted as per a revised clang format configuration
file(not part of this delivery). Version 14.0.6 is used.

Exclusion List:
- files with .cl extension
- files that are not strictly C/C++ (e.g. Android.bp, Sconscript ...)
And the following directories
- compute_kernel_writer/validation/
- tests/
- include/
- src/core/NEON/kernels/convolution/
- src/core/NEON/kernels/arm_gemm/
- src/core/NEON/kernels/arm_conv/
- data/

There will be a follow up for formatting of .cl files and the
files under tests/ and compute_kernel_writer/validation/.

Signed-off-by: Felix Thomasmathibalan <felixjohnny.thomasmathibalan@arm.com>
Change-Id: Ib7eb1fcf4e7537b9feaefcfc15098a804a3fde0a
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10391
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>

21 files changed, 192 insertions, 184 deletions

diff --git a/src/common/AllocatorWrapper.cpp b/src/common/AllocatorWrapper.cpp
index 7b5bb34433..28d81a9fa4 100644
--- a/src/common/AllocatorWrapper.cpp
+++ b/src/common/AllocatorWrapper.cpp
@@ -22,6 +22,7 @@
  * SOFTWARE.
  */
 #include "src/common/AllocatorWrapper.h"
+
 #include "arm_compute/core/Error.h"
 
 namespace arm_compute
@@ -57,7 +58,7 @@ void AllocatorWrapper::aligned_free(void *ptr)
 
 void AllocatorWrapper::set_user_data(void *user_data)
 {
-    if(user_data != nullptr)
+    if (user_data != nullptr)
     {
         _backing_allocator.user_data = user_data;
     }
diff --git a/src/common/AllocatorWrapper.h b/src/common/AllocatorWrapper.h
index 5e1f138f16..bbf70a2cb1 100644
--- a/src/common/AllocatorWrapper.h
+++ b/src/common/AllocatorWrapper.h
@@ -37,8 +37,8 @@ public:
      * @param[in] backing_allocator Backing memory allocator to be used
      */
     AllocatorWrapper(const AclAllocator &backing_allocator) noexcept;
-    AllocatorWrapper(const AllocatorWrapper &) noexcept = default;
-    AllocatorWrapper(AllocatorWrapper &&) noexcept      = default;
+    AllocatorWrapper(const AllocatorWrapper &) noexcept            = default;
+    AllocatorWrapper(AllocatorWrapper &&) noexcept                 = default;
     AllocatorWrapper &operator=(const AllocatorWrapper &) noexcept = delete;
     AllocatorWrapper &operator=(AllocatorWrapper &&other) noexcept = default;
     /** Allocate a chunk of memory of a given size in bytes
@@ -78,4 +78,4 @@ private:
 };
 } // namespace arm_compute
 
-#endif /* SRC_COMMON_ALLOCATORWRAPPER_H */
\ No newline at end of file
+#endif /* SRC_COMMON_ALLOCATORWRAPPER_H */
diff --git a/src/common/IContext.h b/src/common/IContext.h
index 65bb76744d..a221e5db61 100644
--- a/src/common/IContext.h
+++ b/src/common/IContext.h
@@ -33,7 +33,7 @@
 
 struct AclContext_
 {
-    arm_compute::detail::Header header{ arm_compute::detail::ObjectType::Context, nullptr };
+    arm_compute::detail::Header header{arm_compute::detail::ObjectType::Context, nullptr};
 
 protected:
     AclContext_()  = default;
@@ -51,8 +51,7 @@ class IOperator;
 class IContext : public AclContext_
 {
 public:
-    IContext(Target target)
-        : AclContext_(), _target(target), _refcount(0)
+    IContext(Target target) : AclContext_(), _target(target), _refcount(0)
     {
     }
     /** Virtual Destructor */
@@ -108,11 +107,11 @@ public:
      *
      * @return A pointer to the created queue object
      */
-    virtual IQueue *create_queue(const AclQueueOptions *options) = 0;
-    virtual std::tuple<IOperator *, StatusCode> create_activation(const AclTensorDescriptor &src,
+    virtual IQueue                             *create_queue(const AclQueueOptions *options) = 0;
+    virtual std::tuple<IOperator *, StatusCode> create_activation(const AclTensorDescriptor     &src,
                                                                   const AclTensorDescriptor     &dst,
                                                                   const AclActivationDescriptor &act,
-                                                                  bool                           is_validate) = 0;
+                                                                  bool                           is_validate)          = 0;
 
 private:
     Target                   _target;   /**< Target type of context */
@@ -140,7 +139,7 @@ namespace detail
  */
 inline StatusCode validate_internal_context(const IContext *ctx)
 {
-    if(ctx == nullptr || !ctx->is_valid())
+    if (ctx == nullptr || !ctx->is_valid())
     {
         ARM_COMPUTE_LOG_ERROR_ACL("Invalid context object");
         return StatusCode::InvalidArgument;
diff --git a/src/common/IOperator.cpp b/src/common/IOperator.cpp
index b56f0e97fb..90e3473814 100644
--- a/src/common/IOperator.cpp
+++ b/src/common/IOperator.cpp
@@ -22,13 +22,13 @@
  * SOFTWARE.
  */
 #include "src/common/IOperator.h"
+
 #include "src/common/utils/Validate.h"
 
 namespace arm_compute
 {
 #ifndef DOXYGEN_SKIP_THIS
-IOperator::IOperator(IContext *ctx)
-    : AclOperator_()
+IOperator::IOperator(IContext *ctx) : AclOperator_()
 {
     ARM_COMPUTE_ASSERT_NOT_NULLPTR(ctx);
     this->header.ctx = ctx;
diff --git a/src/common/IOperator.h b/src/common/IOperator.h
index 1b65a09e0d..e86e11fe25 100644
--- a/src/common/IOperator.h
+++ b/src/common/IOperator.h
@@ -30,13 +30,14 @@
 // TODO: Remove when all functions have been ported
 #include "arm_compute/core/experimental/Types.h"
 #include "arm_compute/runtime/IOperator.h"
+
 #include "src/common/utils/Validate.h"
 
 #include <vector>
 
 struct AclOperator_
 {
-    arm_compute::detail::Header header{ arm_compute::detail::ObjectType::Operator, nullptr };
+    arm_compute::detail::Header header{arm_compute::detail::ObjectType::Operator, nullptr};
 
 protected:
     AclOperator_()  = default;
@@ -100,7 +101,7 @@ public:
     }
 
 private:
-    std::unique_ptr<experimental::IOperator> _op{ nullptr };
+    std::unique_ptr<experimental::IOperator> _op{nullptr};
 };
 
 /** Extract internal representation of an Operator
@@ -124,7 +125,7 @@ namespace detail
  */
 inline StatusCode validate_internal_operator(const IOperator *op)
 {
-    if(op == nullptr || !op->is_valid())
+    if (op == nullptr || !op->is_valid())
     {
         ARM_COMPUTE_LOG_ERROR_ACL("[IOperator]: Invalid operator object");
         return StatusCode::InvalidArgument;
diff --git a/src/common/IQueue.h b/src/common/IQueue.h
index 6a0cbc75da..60745d206e 100644
--- a/src/common/IQueue.h
+++ b/src/common/IQueue.h
@@ -28,7 +28,7 @@
 
 struct AclQueue_
 {
-    arm_compute::detail::Header header{ arm_compute::detail::ObjectType::Queue, nullptr };
+    arm_compute::detail::Header header{arm_compute::detail::ObjectType::Queue, nullptr};
 
 protected:
     AclQueue_()  = default;
@@ -88,7 +88,7 @@ namespace detail
  */
 inline StatusCode validate_internal_queue(const IQueue *queue)
 {
-    if(queue == nullptr || !queue->is_valid())
+    if (queue == nullptr || !queue->is_valid())
     {
         ARM_COMPUTE_LOG_ERROR_ACL("[IQueue]: Invalid queue object");
         return StatusCode::InvalidArgument;
diff --git a/src/common/ITensorV2.cpp b/src/common/ITensorV2.cpp
index 39bf1c6fb3..bf3d963926 100644
--- a/src/common/ITensorV2.cpp
+++ b/src/common/ITensorV2.cpp
@@ -22,7 +22,9 @@
  * SOFTWARE.
  */
 #include "src/common/ITensorV2.h"
+
 #include "arm_compute/core/TensorInfo.h"
+
 #include "src/common/utils/LegacySupport.h"
 
 namespace arm_compute
@@ -36,4 +38,4 @@ AclTensorDescriptor ITensorV2::get_descriptor() const
 {
     return detail::convert_to_descriptor(*tensor()->info());
 }
-} // namespace arm_compute
\ No newline at end of file
+} // namespace arm_compute
diff --git a/src/common/ITensorV2.h b/src/common/ITensorV2.h
index 965aacea23..903bfad66a 100644
--- a/src/common/ITensorV2.h
+++ b/src/common/ITensorV2.h
@@ -29,7 +29,7 @@
 
 struct AclTensor_
 {
-    arm_compute::detail::Header header{ arm_compute::detail::ObjectType::Tensor, nullptr };
+    arm_compute::detail::Header header{arm_compute::detail::ObjectType::Tensor, nullptr};
 
 protected:
     AclTensor_()  = default;
@@ -49,8 +49,7 @@ public:
      *
      * @param[in] ctx Context to be used by the operator
      */
-    explicit ITensorV2(IContext *ctx)
-        : AclTensor_()
+    explicit ITensorV2(IContext *ctx) : AclTensor_()
     {
         ARM_COMPUTE_ASSERT_NOT_NULLPTR(ctx);
         this->header.ctx = ctx;
@@ -128,7 +127,7 @@ namespace detail
  */
 inline StatusCode validate_internal_tensor(const ITensorV2 *tensor)
 {
-    if(tensor == nullptr || !tensor->is_valid())
+    if (tensor == nullptr || !tensor->is_valid())
     {
         ARM_COMPUTE_LOG_ERROR_ACL("[ITensorV2]: Invalid tensor object");
         return StatusCode::InvalidArgument;
diff --git a/src/common/TensorPack.cpp b/src/common/TensorPack.cpp
index 6c2c7f9622..b51fc0bdd8 100644
--- a/src/common/TensorPack.cpp
+++ b/src/common/TensorPack.cpp
@@ -22,13 +22,13 @@
  * SOFTWARE.
  */
 #include "src/common/TensorPack.h"
+
 #include "src/common/ITensorV2.h"
 #include "src/common/utils/Validate.h"
 
 namespace arm_compute
 {
-TensorPack::TensorPack(IContext *ctx)
-    : AclTensorPack_(), _pack()
+TensorPack::TensorPack(IContext *ctx) : AclTensorPack_(), _pack()
 {
     ARM_COMPUTE_ASSERT_NOT_NULLPTR(ctx);
     this->header.ctx = ctx;
diff --git a/src/common/TensorPack.h b/src/common/TensorPack.h
index f330eee740..b3d1624dae 100644
--- a/src/common/TensorPack.h
+++ b/src/common/TensorPack.h
@@ -25,11 +25,12 @@
 #define SRC_COMMON_ITENSORPACK_H_
 
 #include "arm_compute/core/ITensorPack.h"
+
 #include "src/common/IContext.h"
 
 struct AclTensorPack_
 {
-    arm_compute::detail::Header header{ arm_compute::detail::ObjectType::TensorPack, nullptr };
+    arm_compute::detail::Header header{arm_compute::detail::ObjectType::TensorPack, nullptr};
 
 protected:
     AclTensorPack_()  = default;
@@ -118,7 +119,7 @@ namespace detail
  */
 inline StatusCode validate_internal_pack(const TensorPack *pack)
 {
-    if(pack == nullptr || !pack->is_valid())
+    if (pack == nullptr || !pack->is_valid())
     {
         ARM_COMPUTE_LOG_ERROR_ACL("[TensorPack]: Invalid tensor pack object");
         return StatusCode::InvalidArgument;
diff --git a/src/common/cpuinfo/CpuInfo.cpp b/src/common/cpuinfo/CpuInfo.cpp
index cdcdea916c..23a477332a 100644
--- a/src/common/cpuinfo/CpuInfo.cpp
+++ b/src/common/cpuinfo/CpuInfo.cpp
@@ -25,6 +25,7 @@
 
 #include "arm_compute/core/Error.h"
 #include "arm_compute/core/Log.h"
+
 #include "support/StringSupport.h"
 #include "support/ToolchainSupport.h"
 
@@ -53,16 +54,16 @@
 #endif /* defined(__APPLE__) && defined(__aarch64__)) */
 #endif /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) */
 
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP_CPUID (1 << 11)
-#define ARM_COMPUTE_GET_FEATURE_REG(var, freg) __asm __volatile("MRS %0, " #freg \
-                                                                : "=r"(var))
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP_CPUID    (1 << 11)
+#define ARM_COMPUTE_GET_FEATURE_REG(var, freg) __asm __volatile("MRS %0, " #freg : "=r"(var))
 namespace arm_compute
 {
 namespace cpuinfo
 {
 namespace
 {
-#if !defined(_WIN64) && !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__))
+#if !defined(_WIN64) && !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && \
+    (defined(__arm__) || defined(__aarch64__))
 /** Extract MIDR using CPUID information that are exposed to user-space
  *
  * @param[in] max_num_cpus Maximum number of possible CPUs
@@ -72,15 +73,15 @@ namespace
 std::vector<uint32_t> midr_from_cpuid(uint32_t max_num_cpus)
 {
     std::vector<uint32_t> cpus;
-    for(unsigned int i = 0; i < max_num_cpus; ++i)
+    for (unsigned int i = 0; i < max_num_cpus; ++i)
     {
         std::stringstream str;
         str << "/sys/devices/system/cpu/cpu" << i << "/regs/identification/midr_el1";
         std::ifstream file(str.str(), std::ios::in);
-        if(file.is_open())
+        if (file.is_open())
         {
             std::string line;
-            if(bool(getline(file, line)))
+            if (bool(getline(file, line)))
             {
                 cpus.emplace_back(support::cpp11::stoul(line, nullptr, support::cpp11::NumericBase::BASE_16));
             }
@@ -122,34 +123,35 @@ std::vector<uint32_t> midr_from_proc_cpuinfo(int max_num_cpus)
     ARM_COMPUTE_ERROR_ON_MSG(ret_status != 0, "Regex compilation failed.");
 
     std::ifstream file("/proc/cpuinfo", std::ios::in);
-    if(file.is_open())
+    if (file.is_open())
     {
         std::string line;
         int         midr   = 0;
         int         curcpu = -1;
 
-        while(bool(getline(file, line)))
+        while (bool(getline(file, line)))
         {
             std::array<regmatch_t, 2> match;
             ret_status = regexec(&proc_regex, line.c_str(), 2, match.data(), 0);
-            if(ret_status == 0)
+            if (ret_status == 0)
             {
                 std::string id     = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
                 int         newcpu = support::cpp11::stoi(id, nullptr);
 
-                if(curcpu >= 0 && midr == 0)
+                if (curcpu >= 0 && midr == 0)
                 {
                     // Matched a new CPU ID without any description of the previous one - looks like old format.
                     return {};
                 }
 
-                if(curcpu >= 0 && curcpu < max_num_cpus)
+                if (curcpu >= 0 && curcpu < max_num_cpus)
                 {
                     cpus.emplace_back(midr);
                 }
                 else
                 {
-                    ARM_COMPUTE_LOG_INFO_MSG_CORE("Trying to populate a core id with id greater than the expected number of cores!");
+                    ARM_COMPUTE_LOG_INFO_MSG_CORE(
+                        "Trying to populate a core id with id greater than the expected number of cores!");
                 }
 
                 midr   = 0;
@@ -159,7 +161,7 @@ std::vector<uint32_t> midr_from_proc_cpuinfo(int max_num_cpus)
             }
 
             ret_status = regexec(&imp_regex, line.c_str(), 2, match.data(), 0);
-            if(ret_status == 0)
+            if (ret_status == 0)
             {
                 std::string subexp = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
                 int         impv   = support::cpp11::stoi(subexp, nullptr, support::cpp11::NumericBase::BASE_16);
@@ -169,7 +171,7 @@ std::vector<uint32_t> midr_from_proc_cpuinfo(int max_num_cpus)
             }
 
             ret_status = regexec(&var_regex, line.c_str(), 2, match.data(), 0);
-            if(ret_status == 0)
+            if (ret_status == 0)
             {
                 std::string subexp = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
                 int         varv   = support::cpp11::stoi(subexp, nullptr, support::cpp11::NumericBase::BASE_16);
@@ -179,7 +181,7 @@ std::vector<uint32_t> midr_from_proc_cpuinfo(int max_num_cpus)
             }
 
             ret_status = regexec(&part_regex, line.c_str(), 2, match.data(), 0);
-            if(ret_status == 0)
+            if (ret_status == 0)
             {
                 std::string subexp = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
                 int         partv  = support::cpp11::stoi(subexp, nullptr, support::cpp11::NumericBase::BASE_16);
@@ -189,7 +191,7 @@ std::vector<uint32_t> midr_from_proc_cpuinfo(int max_num_cpus)
             }
 
             ret_status = regexec(&rev_regex, line.c_str(), 2, match.data(), 0);
-            if(ret_status == 0)
+            if (ret_status == 0)
             {
                 std::string subexp = line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so));
                 int         regv   = support::cpp11::stoi(subexp, nullptr);
@@ -200,13 +202,14 @@ std::vector<uint32_t> midr_from_proc_cpuinfo(int max_num_cpus)
             }
         }
 
-        if(curcpu >= 0 && curcpu < max_num_cpus)
+        if (curcpu >= 0 && curcpu < max_num_cpus)
         {
             cpus.emplace_back(midr);
         }
         else
         {
-            ARM_COMPUTE_LOG_INFO_MSG_CORE("Trying to populate a core id with id greater than the expected number of cores!");
+            ARM_COMPUTE_LOG_INFO_MSG_CORE(
+                "Trying to populate a core id with id greater than the expected number of cores!");
         }
     }
 
@@ -231,11 +234,11 @@ int get_max_cpus()
     CPUspresent.open("/sys/devices/system/cpu/present", std::ios::in);
     bool success = false;
 
-    if(CPUspresent.is_open())
+    if (CPUspresent.is_open())
     {
         std::string line;
 
-        if(bool(getline(CPUspresent, line)))
+        if (bool(getline(CPUspresent, line)))
         {
             /* The content of this file is a list of ranges or single values, e.g.
                  * 0-5, or 1-3,5,7 or similar.  As we are interested in the
@@ -244,9 +247,9 @@ int get_max_cpus()
                  */
             auto startfrom = line.begin();
 
-            for(auto i = line.begin(); i < line.end(); ++i)
+            for (auto i = line.begin(); i < line.end(); ++i)
             {
-                if(*i == '-' || *i == ',')
+                if (*i == '-' || *i == ',')
                 {
                     startfrom = i + 1;
                 }
@@ -260,13 +263,14 @@ int get_max_cpus()
     }
 
     // Return std::thread::hardware_concurrency() as a fallback.
-    if(!success)
+    if (!success)
     {
         max_cpus = std::thread::hardware_concurrency();
     }
     return max_cpus;
 }
-#elif defined(__aarch64__) && defined(__APPLE__) /* !defined(BARE_METAL) && !defined(__APPLE__) && (defined(__arm__) || defined(__aarch64__)) */
+#elif defined(__aarch64__) && \
+    defined(__APPLE__) /* !defined(BARE_METAL) && !defined(__APPLE__) && (defined(__arm__) || defined(__aarch64__)) */
 /** Query features through sysctlbyname
   *
   * @return int value queried
@@ -278,46 +282,45 @@ int get_hw_capability(const std::string &cap)
     sysctlbyname(cap.c_str(), &result, &size, NULL, 0);
     return result;
 }
-#endif                                           /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) */
+#endif /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) */
 
 #if defined(BARE_METAL) && defined(__aarch64__)
 uint64_t get_sve_feature_reg()
 {
     uint64_t svefr0 = 0;
-    __asm __volatile(
-        ".inst 0xd5380483 // mrs x3, ID_AA64ZFR0_EL1\n"
-        "MOV  %0, X3"
-        : "=r"(svefr0)
-        :
-        : "x3");
+    __asm __volatile(".inst 0xd5380483 // mrs x3, ID_AA64ZFR0_EL1\n"
+                     "MOV  %0, X3"
+                     : "=r"(svefr0)
+                     :
+                     : "x3");
     return svefr0;
 }
 #endif /* defined(BARE_METAL) && defined(__aarch64__) */
 } // namespace
 
-CpuInfo::CpuInfo(CpuIsaInfo isa, std::vector<CpuModel> cpus)
-    : _isa(std::move(isa)), _cpus(std::move(cpus))
+CpuInfo::CpuInfo(CpuIsaInfo isa, std::vector<CpuModel> cpus) : _isa(std::move(isa)), _cpus(std::move(cpus))
 {
 }
 
 CpuInfo CpuInfo::build()
 {
-#if !defined(_WIN64) && !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__))
+#if !defined(_WIN64) && !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && \
+    (defined(__arm__) || defined(__aarch64__))
     const uint32_t hwcaps   = getauxval(AT_HWCAP);
     const uint32_t hwcaps2  = getauxval(AT_HWCAP2);
     const uint32_t max_cpus = get_max_cpus();
 
     // Populate midr values
     std::vector<uint32_t> cpus_midr;
-    if(hwcaps & ARM_COMPUTE_CPU_FEATURE_HWCAP_CPUID)
+    if (hwcaps & ARM_COMPUTE_CPU_FEATURE_HWCAP_CPUID)
     {
         cpus_midr = midr_from_cpuid(max_cpus);
     }
-    if(cpus_midr.empty())
+    if (cpus_midr.empty())
     {
         cpus_midr = midr_from_proc_cpuinfo(max_cpus);
     }
-    if(cpus_midr.empty())
+    if (cpus_midr.empty())
     {
         cpus_midr.resize(max_cpus, 0);
     }
@@ -333,7 +336,9 @@ CpuInfo CpuInfo::build()
     CpuInfo info(isa, cpus_model);
     return info;
 
-#elif(BARE_METAL) && defined(__aarch64__)        /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) */
+#elif (BARE_METAL) && \
+    defined(          \
+        __aarch64__) /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) */
 
     // Assume single CPU in bare metal mode.  Just read the ID register and feature bits directly.
     uint64_t isar0 = 0, isar1 = 0, pfr0 = 0, pfr1 = 0, svefr0 = 0, midr = 0;
@@ -342,7 +347,7 @@ CpuInfo CpuInfo::build()
     ARM_COMPUTE_GET_FEATURE_REG(pfr0, ID_AA64PFR0_EL1);
     ARM_COMPUTE_GET_FEATURE_REG(pfr1, ID_AA64PFR1_EL1);
     ARM_COMPUTE_GET_FEATURE_REG(midr, MIDR_EL1);
-    if((pfr0 >> 32) & 0xf)
+    if ((pfr0 >> 32) & 0xf)
     {
         svefr0 = get_sve_feature_reg();
     }
@@ -361,14 +366,14 @@ CpuInfo CpuInfo::build()
     CpuInfo info(isainfo, cpus_model);
     return info;
 #else                                            /* #elif defined(__aarch64__) && defined(__APPLE__) */
-    CpuInfo info(CpuIsaInfo(), { CpuModel::GENERIC });
+    CpuInfo info(CpuIsaInfo(), {CpuModel::GENERIC});
     return info;
-#endif                                           /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) */
+#endif /* !defined(BARE_METAL) && !defined(__APPLE__) && !defined(__OpenBSD__) && (defined(__arm__) || defined(__aarch64__)) */
 }
 
 CpuModel CpuInfo::cpu_model(uint32_t cpuid) const
 {
-    if(cpuid < _cpus.size())
+    if (cpuid < _cpus.size())
     {
         return _cpus[cpuid];
     }
@@ -377,9 +382,10 @@ CpuModel CpuInfo::cpu_model(uint32_t cpuid) const
 
 CpuModel CpuInfo::cpu_model() const
 {
-#if defined(_WIN64) || defined(BARE_METAL) || defined(__APPLE__) || defined(__OpenBSD__) || (!defined(__arm__) && !defined(__aarch64__))
+#if defined(_WIN64) || defined(BARE_METAL) || defined(__APPLE__) || defined(__OpenBSD__) || \
+    (!defined(__arm__) && !defined(__aarch64__))
     return cpu_model(0);
-#else  /* defined(BARE_METAL) || defined(__APPLE__) || defined(__OpenBSD__) || (!defined(__arm__) && !defined(__aarch64__)) */
+#else /* defined(BARE_METAL) || defined(__APPLE__) || defined(__OpenBSD__) || (!defined(__arm__) && !defined(__aarch64__)) */
     return cpu_model(sched_getcpu());
 #endif /* defined(BARE_METAL) || defined(__APPLE__) || defined(__OpenBSD__) || (!defined(__arm__) && !defined(__aarch64__)) */
 }
@@ -406,13 +412,13 @@ uint32_t num_threads_hint()
 
     // Read cpuinfo and get occurrence of each core
     std::ifstream cpuinfo_file("/proc/cpuinfo", std::ios::in);
-    if(cpuinfo_file.is_open())
+    if (cpuinfo_file.is_open())
     {
         std::string line;
-        while(bool(getline(cpuinfo_file, line)))
+        while (bool(getline(cpuinfo_file, line)))
         {
             std::array<regmatch_t, 2> match;
-            if(regexec(&cpu_part_rgx, line.c_str(), 2, match.data(), 0) == 0)
+            if (regexec(&cpu_part_rgx, line.c_str(), 2, match.data(), 0) == 0)
             {
                 cpus.emplace_back(line.substr(match[1].rm_so, (match[1].rm_eo - match[1].rm_so)));
             }
@@ -425,13 +431,13 @@ uint32_t num_threads_hint()
     auto least_frequent_cpu_occurences = [](const std::vector<std::string> &cpus) -> uint32_t
     {
         std::unordered_map<std::string, uint32_t> cpus_freq;
-        for(const auto &cpu : cpus)
+        for (const auto &cpu : cpus)
         {
             cpus_freq[cpu]++;
         }
 
         uint32_t vmin = cpus.size() + 1;
-        for(const auto &cpu_freq : cpus_freq)
+        for (const auto &cpu_freq : cpus_freq)
         {
             vmin = std::min(vmin, cpu_freq.second);
         }
diff --git a/src/common/cpuinfo/CpuIsaInfo.cpp b/src/common/cpuinfo/CpuIsaInfo.cpp
index 23da54a35d..597768530b 100644
--- a/src/common/cpuinfo/CpuIsaInfo.cpp
+++ b/src/common/cpuinfo/CpuIsaInfo.cpp
@@ -24,6 +24,7 @@
 #include "src/common/cpuinfo/CpuIsaInfo.h"
 
 #include "arm_compute/core/Error.h"
+
 #include "src/common/cpuinfo/CpuModel.h"
 
 /* Arm Feature flags */
@@ -31,18 +32,18 @@
 #define ARM_COMPUTE_CPU_FEATURE_HWCAP_NEON (1 << 12)
 
 /* Arm64 Feature flags */
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMD (1 << 1)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP_FPHP (1 << 9)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDHP (1 << 10)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDDP (1 << 20)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP_SVE (1 << 22)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVE2 (1 << 1)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEI8MM (1 << 9)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMD     (1 << 1)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP_FPHP      (1 << 9)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDHP   (1 << 10)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDDP   (1 << 20)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP_SVE       (1 << 22)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVE2     (1 << 1)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEI8MM  (1 << 9)
 #define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEF32MM (1 << 10)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEBF16 (1 << 12)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_I8MM (1 << 13)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_BF16 (1 << 14)
-#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME (1 << 23)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEBF16  (1 << 12)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_I8MM     (1 << 13)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_BF16     (1 << 14)
+#define ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME      (1 << 23)
 
 namespace arm_compute
 {
@@ -71,12 +72,12 @@ void decode_hwcaps(CpuIsaInfo &isa, const uint32_t hwcaps, const uint32_t hwcaps
     isa.sve2 = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVE2);
 
     // Detection of SME from type HWCAP2 in the auxillary vector
-    isa.sme   = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME);
-    isa.sme2  = isa.sme; // Needs to be set properly
+    isa.sme  = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_SME);
+    isa.sme2 = isa.sme; // Needs to be set properly
 
     // Data-type support
-    isa.fp16    = is_feature_supported(hwcaps, ARM_COMPUTE_CPU_FEATURE_HWCAP_FPHP | ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDHP);
-    isa.bf16    = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_BF16);
+    isa.fp16 = is_feature_supported(hwcaps, ARM_COMPUTE_CPU_FEATURE_HWCAP_FPHP | ARM_COMPUTE_CPU_FEATURE_HWCAP_ASIMDHP);
+    isa.bf16 = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_BF16);
     isa.svebf16 = is_feature_supported(hwcaps2, ARM_COMPUTE_CPU_FEATURE_HWCAP2_SVEBF16);
 
     // Instruction extensions
@@ -92,12 +93,15 @@ void decode_hwcaps(CpuIsaInfo &isa, const uint32_t hwcaps, const uint32_t hwcaps
 }
 #endif /* defined(__aarch64__) */
 
-void decode_regs(CpuIsaInfo &isa, const uint64_t isar0, const uint64_t isar1, const uint64_t pfr0, const uint64_t pfr1, const uint64_t svefr0)
+void decode_regs(CpuIsaInfo    &isa,
+                 const uint64_t isar0,
+                 const uint64_t isar1,
+                 const uint64_t pfr0,
+                 const uint64_t pfr1,
+                 const uint64_t svefr0)
 {
     auto is_supported = [](uint64_t feature_reg, uint8_t feature_pos) -> bool
-    {
-        return ((feature_reg >> feature_pos) & 0xf);
-    };
+    { return ((feature_reg >> feature_pos) & 0xf); };
 
     // High-level SIMD support
     isa.sve  = is_supported(pfr0, 32);
@@ -124,11 +128,11 @@ void decode_regs(CpuIsaInfo &isa, const uint64_t isar0, const uint64_t isar1, co
  */
 void allowlisted_model_features(CpuIsaInfo &isa, CpuModel model)
 {
-    if(isa.dot == false)
+    if (isa.dot == false)
     {
         isa.dot = model_supports_dot(model);
     }
-    if(isa.fp16 == false)
+    if (isa.fp16 == false)
     {
         isa.fp16 = model_supports_fp16(model);
     }
@@ -147,7 +151,8 @@ CpuIsaInfo init_cpu_isa_from_hwcaps(uint32_t hwcaps, uint32_t hwcaps2, uint32_t
     return isa;
 }
 
-CpuIsaInfo init_cpu_isa_from_regs(uint64_t isar0, uint64_t isar1, uint64_t pfr0, uint64_t pfr1, uint64_t svefr0, uint64_t midr)
+CpuIsaInfo
+init_cpu_isa_from_regs(uint64_t isar0, uint64_t isar1, uint64_t pfr0, uint64_t pfr1, uint64_t svefr0, uint64_t midr)
 {
     CpuIsaInfo isa;
 
diff --git a/src/common/cpuinfo/CpuIsaInfo.h b/src/common/cpuinfo/CpuIsaInfo.h
index b92b6538b6..9d6bc07b67 100644
--- a/src/common/cpuinfo/CpuIsaInfo.h
+++ b/src/common/cpuinfo/CpuIsaInfo.h
@@ -37,22 +37,22 @@ namespace cpuinfo
 struct CpuIsaInfo
 {
     /* SIMD extension support */
-    bool neon{ false };
-    bool sve{ false };
-    bool sve2{ false };
-    bool sme{ false };
-    bool sme2{ false };
+    bool neon{false};
+    bool sve{false};
+    bool sve2{false};
+    bool sme{false};
+    bool sme2{false};
 
     /* Data-type extensions support */
-    bool fp16{ false };
-    bool bf16{ false };
-    bool svebf16{ false };
+    bool fp16{false};
+    bool bf16{false};
+    bool svebf16{false};
 
     /* Instruction support */
-    bool dot{ false };
-    bool i8mm{ false };
-    bool svei8mm{ false };
-    bool svef32mm{ false };
+    bool dot{false};
+    bool i8mm{false};
+    bool svei8mm{false};
+    bool svef32mm{false};
 };
 
 /** Identify ISA related information through system information
@@ -76,7 +76,8 @@ CpuIsaInfo init_cpu_isa_from_hwcaps(uint32_t hwcaps, uint32_t hwcaps2, uint32_t
  *
  * @return CpuIsaInfo A populated ISA feature structure
  */
-CpuIsaInfo init_cpu_isa_from_regs(uint64_t isar0, uint64_t isar1, uint64_t pfr0, uint64_t pfr1, uint64_t svefr0, uint64_t midr);
+CpuIsaInfo
+init_cpu_isa_from_regs(uint64_t isar0, uint64_t isar1, uint64_t pfr0, uint64_t pfr1, uint64_t svefr0, uint64_t midr);
 } // namespace cpuinfo
 } // namespace arm_compute
 
diff --git a/src/common/cpuinfo/CpuModel.cpp b/src/common/cpuinfo/CpuModel.cpp
index d6d91df133..0455670302 100644
--- a/src/common/cpuinfo/CpuModel.cpp
+++ b/src/common/cpuinfo/CpuModel.cpp
@@ -29,12 +29,12 @@ namespace cpuinfo
 {
 std::string cpu_model_to_string(CpuModel model)
 {
-    switch(model)
+    switch (model)
     {
 #define X(MODEL)          \
-case CpuModel::MODEL: \
-    return #MODEL;
-            ARM_COMPUTE_CPU_MODEL_LIST
+    case CpuModel::MODEL: \
+        return #MODEL;
+        ARM_COMPUTE_CPU_MODEL_LIST
 #undef X
         default:
         {
@@ -45,7 +45,7 @@ case CpuModel::MODEL: \
 
 bool model_supports_fp16(CpuModel model)
 {
-    switch(model)
+    switch (model)
     {
         case CpuModel::GENERIC_FP16:
         case CpuModel::GENERIC_FP16_DOT:
@@ -63,7 +63,7 @@ bool model_supports_fp16(CpuModel model)
 
 bool model_supports_dot(CpuModel model)
 {
-    switch(model)
+    switch (model)
     {
         case CpuModel::GENERIC_FP16_DOT:
         case CpuModel::A55r1:
@@ -87,16 +87,16 @@ CpuModel midr_to_model(uint32_t midr)
     const int cpunum      = (midr >> 4) & 0xFFF;
 
     // Only CPUs we have code paths for are detected.  All other CPUs can be safely classed as "GENERIC"
-    if(implementer == 0x41) // Arm CPUs
+    if (implementer == 0x41) // Arm CPUs
     {
-        switch(cpunum)
+        switch (cpunum)
         {
             case 0xd03: // A53
             case 0xd04: // A35
                 model = CpuModel::A53;
                 break;
             case 0xd05: // A55
-                if(variant != 0)
+                if (variant != 0)
                 {
                     model = CpuModel::A55r1;
                 }
@@ -109,7 +109,7 @@ CpuModel midr_to_model(uint32_t midr)
                 model = CpuModel::A73;
                 break;
             case 0xd0a: // A75
-                if(variant != 0)
+                if (variant != 0)
                 {
                     model = CpuModel::GENERIC_FP16_DOT;
                 }
@@ -144,9 +144,9 @@ CpuModel midr_to_model(uint32_t midr)
                 break;
         }
     }
-    else if(implementer == 0x46)
+    else if (implementer == 0x46)
     {
-        switch(cpunum)
+        switch (cpunum)
         {
             case 0x001: // A64FX
                 model = CpuModel::A64FX;
@@ -156,9 +156,9 @@ CpuModel midr_to_model(uint32_t midr)
                 break;
         }
     }
-    else if(implementer == 0x48)
+    else if (implementer == 0x48)
     {
-        switch(cpunum)
+        switch (cpunum)
         {
             case 0xd40: // A76
                 model = CpuModel::GENERIC_FP16_DOT;
@@ -168,9 +168,9 @@ CpuModel midr_to_model(uint32_t midr)
                 break;
         }
     }
-    else if(implementer == 0x51)
+    else if (implementer == 0x51)
     {
-        switch(cpunum)
+        switch (cpunum)
         {
             case 0x800: // A73
                 model = CpuModel::A73;
@@ -196,4 +196,4 @@ CpuModel midr_to_model(uint32_t midr)
     return model;
 }
 } // namespace cpuinfo
-} // namespace arm_compute
\ No newline at end of file
+} // namespace arm_compute
diff --git a/src/common/cpuinfo/CpuModel.h b/src/common/cpuinfo/CpuModel.h
index 4fe6c29e53..3b9d9e3494 100644
--- a/src/common/cpuinfo/CpuModel.h
+++ b/src/common/cpuinfo/CpuModel.h
@@ -24,11 +24,11 @@
 #ifndef SRC_COMMON_CPUINFO_CPUMODEL_H
 #define SRC_COMMON_CPUINFO_CPUMODEL_H
 
+#include "arm_compute/core/CPP/CPPTypes.h"
+
 #include <cstdint>
 #include <string>
 
-#include "arm_compute/core/CPP/CPPTypes.h"
-
 namespace arm_compute
 {
 namespace cpuinfo
diff --git a/src/common/utils/LegacySupport.cpp b/src/common/utils/LegacySupport.cpp
index 06b1693bd1..102644227e 100644
--- a/src/common/utils/LegacySupport.cpp
+++ b/src/common/utils/LegacySupport.cpp
@@ -33,7 +33,7 @@ namespace
 {
 DataType convert_to_legacy_data_type(AclDataType data_type)
 {
-    switch(data_type)
+    switch (data_type)
     {
         case AclDataType::AclFloat32:
             return DataType::F32;
@@ -48,7 +48,7 @@ DataType convert_to_legacy_data_type(AclDataType data_type)
 
 AclDataType convert_to_c_data_type(DataType data_type)
 {
-    switch(data_type)
+    switch (data_type)
     {
         case DataType::F32:
             return AclDataType::AclFloat32;
@@ -64,7 +64,7 @@ AclDataType convert_to_c_data_type(DataType data_type)
 TensorShape create_legacy_tensor_shape(int32_t ndims, int32_t *shape)
 {
     TensorShape legacy_shape{};
-    for(int32_t d = 0; d < ndims; ++d)
+    for (int32_t d = 0; d < ndims; ++d)
     {
         legacy_shape.set(d, shape[d], false);
     }
@@ -73,14 +73,14 @@ TensorShape create_legacy_tensor_shape(int32_t ndims, int32_t *shape)
 int32_t *create_tensor_shape_array(const TensorInfo &info)
 {
     const auto num_dims = info.num_dimensions();
-    if(num_dims <= 0)
+    if (num_dims <= 0)
     {
         return nullptr;
     }
 
     int32_t *shape_array = new int32_t[num_dims];
 
-    for(size_t d = 0; d < num_dims; ++d)
+    for (size_t d = 0; d < num_dims; ++d)
     {
         shape_array[d] = info.tensor_shape()[d];
     }
@@ -92,28 +92,23 @@ int32_t *create_tensor_shape_array(const TensorInfo &info)
 TensorInfo convert_to_legacy_tensor_info(const AclTensorDescriptor &desc)
 {
     TensorInfo legacy_desc;
-    legacy_desc.init(create_legacy_tensor_shape(desc.ndims, desc.shape), 1, convert_to_legacy_data_type(desc.data_type));
+    legacy_desc.init(create_legacy_tensor_shape(desc.ndims, desc.shape), 1,
+                     convert_to_legacy_data_type(desc.data_type));
     return legacy_desc;
 }
 
 AclTensorDescriptor convert_to_descriptor(const TensorInfo &info)
 {
     const auto          num_dims = info.num_dimensions();
-    AclTensorDescriptor desc
-    {
-        static_cast<int32_t>(num_dims),
-        create_tensor_shape_array(info),
-        convert_to_c_data_type(info.data_type()),
-        nullptr,
-        0
-    };
+    AclTensorDescriptor desc{static_cast<int32_t>(num_dims), create_tensor_shape_array(info),
+                             convert_to_c_data_type(info.data_type()), nullptr, 0};
     return desc;
 }
 
 ActivationLayerInfo convert_to_activation_info(const AclActivationDescriptor &desc)
 {
     ActivationLayerInfo::ActivationFunction act;
-    switch(desc.type)
+    switch (desc.type)
     {
         case AclActivationType::AclIdentity:
             act = ActivationLayerInfo::ActivationFunction::IDENTITY;
diff --git a/src/common/utils/Log.h b/src/common/utils/Log.h
index bbfe1ce1b3..6ebfed366e 100644
--- a/src/common/utils/Log.h
+++ b/src/common/utils/Log.h
@@ -38,20 +38,22 @@
 
 #include "arm_compute/core/Error.h"
 #include "arm_compute/core/utils/logging/Macros.h"
+
 #include "utils/TypePrinter.h"
 
 /** Create a logger
  *
  * @note It will eventually create all default loggers in don't exist
  */
-#define ARM_COMPUTE_CREATE_ACL_LOGGER()                                                                                        \
-    do                                                                                                                         \
-    {                                                                                                                          \
-        if(arm_compute::logging::LoggerRegistry::get().logger("ComputeLibrary") == nullptr)                                    \
-        {                                                                                                                      \
-            arm_compute::logging::LoggerRegistry::get().create_logger("ComputeLibrary", arm_compute::logging::LogLevel::INFO); \
-        }                                                                                                                      \
-    } while(false)
+#define ARM_COMPUTE_CREATE_ACL_LOGGER()                                                                      \
+    do                                                                                                       \
+    {                                                                                                        \
+        if (arm_compute::logging::LoggerRegistry::get().logger("ComputeLibrary") == nullptr)                 \
+        {                                                                                                    \
+            arm_compute::logging::LoggerRegistry::get().create_logger("ComputeLibrary",                      \
+                                                                      arm_compute::logging::LogLevel::INFO); \
+        }                                                                                                    \
+    } while (false)
 
 /** Log a message to the logger
  *
@@ -63,7 +65,7 @@
     {                                                          \
         ARM_COMPUTE_CREATE_ACL_LOGGER();                       \
         ARM_COMPUTE_LOG_MSG("ComputeLibrary", log_level, msg); \
-    } while(false)
+    } while (false)
 
 /** Log a message with format to the logger
  *
@@ -76,7 +78,7 @@
     {                                                                                   \
         ARM_COMPUTE_CREATE_ACL_LOGGER();                                                \
         ARM_COMPUTE_LOG_MSG_WITH_FORMAT("ComputeLibrary", log_level, fmt, __VA_ARGS__); \
-    } while(false)
+    } while (false)
 
 /** Log an error message to the logger
  *
@@ -87,7 +89,7 @@
     {                                                                                      \
         ARM_COMPUTE_CREATE_ACL_LOGGER();                                                   \
         ARM_COMPUTE_LOG_MSG("ComputeLibrary", arm_compute::logging::LogLevel::ERROR, msg); \
-    } while(false)
+    } while (false)
 
 /** Log an error message to the logger with function name before the message
  *
@@ -98,7 +100,7 @@
     {                                                                                                    \
         ARM_COMPUTE_CREATE_ACL_LOGGER();                                                                 \
         ARM_COMPUTE_LOG_MSG_WITH_FUNCNAME("ComputeLibrary", arm_compute::logging::LogLevel::ERROR, msg); \
-    } while(false)
+    } while (false)
 
 /** Log an information message to the logger with function name before the message
  *
@@ -109,7 +111,7 @@
     {                                                                                                   \
         ARM_COMPUTE_CREATE_ACL_LOGGER();                                                                \
         ARM_COMPUTE_LOG_MSG_WITH_FUNCNAME("ComputeLibrary", arm_compute::logging::LogLevel::INFO, msg); \
-    } while(false)
+    } while (false)
 
 /** Function template specialization for the out of bound element at index = tuple_size
  *
@@ -131,12 +133,13 @@ logParamsImpl(std::vector<std::string> &data_registry, const std::tuple<Tp...> &
  * @param[in]     in_params_tuple Constant reference to a tuple of different input data types
  */
 template <std::size_t Index, typename... Tp>
-inline typename std::enable_if < Index<sizeof...(Tp), void>::type
-logParamsImpl(std::vector<std::string> &data_registry, const std::tuple<Tp...> &in_params_tuple)
+    inline typename std::enable_if <
+    Index<sizeof...(Tp), void>::type logParamsImpl(std::vector<std::string> &data_registry,
+                                                   const std::tuple<Tp...>  &in_params_tuple)
 {
     data_registry.push_back(arm_compute::to_string(std::get<Index>(in_params_tuple)));
     // Unfold the next tuple element
-    logParamsImpl < Index + 1, Tp... > (data_registry, in_params_tuple);
+    logParamsImpl<Index + 1, Tp...>(data_registry, in_params_tuple);
 }
 
 /** Function Template with variable number of inputs to collect all the passed parameters from
@@ -149,10 +152,10 @@ logParamsImpl(std::vector<std::string> &data_registry, const std::tuple<Tp...> &
  * @return  Vector of the parameters' data in a string format
  */
 template <typename... Ts>
-const std::vector<std::string> logParams(Ts &&... ins)
+const std::vector<std::string> logParams(Ts &&...ins)
 {
     std::vector<std::string> data_registry{};
-    std::tuple<Ts...>        in_params_tuple{ ins... };
+    std::tuple<Ts...>        in_params_tuple{ins...};
 
     // Start logging the tuple elements, starting from 0 to tuple_size-1
     logParamsImpl<0>(data_registry, in_params_tuple);
@@ -178,11 +181,11 @@ inline const std::vector<std::string> getParamsNames(const std::string &in_param
 
     // Usually the input parameters string would be name of parameters separated
     // by ',' e.g. "src0, src1, policy"
-    while(std::getline(ss, temp, ','))
+    while (std::getline(ss, temp, ','))
     {
         names.push_back(temp);
     }
-    for(auto &name : names)
+    for (auto &name : names)
     {
         // Totally get rid of white space characters
         name.erase(std::remove(name.begin(), name.end(), ' '), name.end());
@@ -205,7 +208,7 @@ inline const std::string constructDataLog(const std::vector<std::string> &params
 {
     std::string dataLog = "\n ";
     ARM_COMPUTE_ERROR_ON(params_names.size() != data_registry.size());
-    for(uint8_t i = 0; i < params_names.size(); ++i)
+    for (uint8_t i = 0; i < params_names.size(); ++i)
     {
         dataLog += params_names[i] + ": " + data_registry.at(i) + "\n ";
     }
@@ -220,11 +223,11 @@ inline const std::string constructDataLog(const std::vector<std::string> &params
  *
  * @param[in] ... Input parameters
  */
-#define ARM_COMPUTE_LOG_PARAMS(...)                                                           \
-    do                                                                                        \
-    {                                                                                         \
-        ARM_COMPUTE_LOG_INFO_WITH_FUNCNAME_ACL(constructDataLog(getParamsNames(#__VA_ARGS__), \
-                                                                logParams(__VA_ARGS__)));     \
-    } while(false)
+#define ARM_COMPUTE_LOG_PARAMS(...)                                                  \
+    do                                                                               \
+    {                                                                                \
+        ARM_COMPUTE_LOG_INFO_WITH_FUNCNAME_ACL(                                      \
+            constructDataLog(getParamsNames(#__VA_ARGS__), logParams(__VA_ARGS__))); \
+    } while (false)
 #endif /* ARM_COMPUTE_LOGGING_ENABLED */
 #endif /* SRC_COMMON_LOG_H */
diff --git a/src/common/utils/Macros.h b/src/common/utils/Macros.h
index 2e44ea599e..35f7e759d3 100644
--- a/src/common/utils/Macros.h
+++ b/src/common/utils/Macros.h
@@ -28,7 +28,7 @@
 
 #define ARM_COMPUTE_RETURN_CENUM_ON_FAILURE(status)                 \
     {                                                               \
-        if(status != arm_compute::StatusCode::Success)              \
+        if (status != arm_compute::StatusCode::Success)             \
         {                                                           \
             return arm_compute::utils::as_cenum<AclStatus>(status); \
         }                                                           \
diff --git a/src/common/utils/Object.h b/src/common/utils/Object.h
index 1f194737d4..b73de8e430 100644
--- a/src/common/utils/Object.h
+++ b/src/common/utils/Object.h
@@ -52,14 +52,12 @@ struct Header
      * @param[in] type_ Object identification type
      * @param[in] ctx_  Context to reference
      */
-    Header(ObjectType type_, IContext *ctx_) noexcept
-        : type(type_),
-          ctx(ctx_)
+    Header(ObjectType type_, IContext *ctx_) noexcept : type(type_), ctx(ctx_)
     {
     }
 
-    ObjectType type{ ObjectType::Invalid };
-    IContext *ctx{ nullptr };
+    ObjectType type{ObjectType::Invalid};
+    IContext  *ctx{nullptr};
 };
 } // namespace detail
 } // namespace arm_compute
diff --git a/src/common/utils/Utils.h b/src/common/utils/Utils.h
index 1bd1c7ec57..33fe6c0e81 100644
--- a/src/common/utils/Utils.h
+++ b/src/common/utils/Utils.h
@@ -74,10 +74,7 @@ constexpr SE as_enum(const E val) noexcept
 template <typename E>
 bool is_in(E check, std::initializer_list<E> list)
 {
-    return std::any_of(list.begin(), list.end(), [&check](E e)
-    {
-        return check == e;
-    });
+    return std::any_of(list.begin(), list.end(), [&check](E e) { return check == e; });
 }
 } // namespace utils
 } // namespace arm_compute
diff --git a/src/common/utils/Validate.h b/src/common/utils/Validate.h
index 4e8807273a..97819c619f 100644
--- a/src/common/utils/Validate.h
+++ b/src/common/utils/Validate.h
@@ -29,7 +29,7 @@
 
 #include <cassert>
 
-#define ARM_COMPUTE_ASSERT(cond) assert(cond)
+#define ARM_COMPUTE_ASSERT(cond)            assert(cond)
 #define ARM_COMPUTE_ASSERT_NOT_NULLPTR(ptr) assert((ptr) != nullptr)
 
 #else /* defined(ARM_COMPUTE_ASSERTS_ENABLED) */