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Change-Id: I1458009f4b92c1a599efa3a63d6768148e55606d
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
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- Changed homepage link from cgit to gittiles
- Clarified tensor alignment is in Bytes
Change-Id: I9fd912c17d61f9add11493e031bbb620271c68eb
Signed-off-by: Tim Hall <tim.hall@arm.com>
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Markdown's git reporitory has moved to different location.
Change-Id: Iae401c1d283d937347cbce546836470647333201
Signed-off-by: Johan Gunnarsson <johan.gunnarsson@arm.com>
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- Added release information
- Minor changes to SUPPORTED_OPS.md including version info
Change-Id: I91fae4c40c6c1f25b874268b18d077a9babd4875
Signed-off-by: Tim Hall <tim.hall@arm.com>
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Signed-off-by: Alexander Hansson <Alexander.Hansson@arm.com>
Change-Id: I35fd042d572f62122ac681c231798c9f2163fc00
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Add --verbose-progress CLI option used to enable printing progress
information in the compiler driver and scheduler.
Change-Id: I99ac8c6a654e60391d5c11e28b89250405daa53a
Signed-off-by: Raul Farkas <raul.farkas@arm.com>
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Changed default behaviour to place int8 ops with asymmetric quantization on cpu, and added an option to force symmetric quantization
Change-Id: Ib9b717aaf61eae78833254ca3dfa745f4f253dc6
Signed-off-by: wilisa01 <william.isaksson@arm.com>
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- Update copyright notices to use SPDX format and add OSS mail as contact.
- Update years on files where it had been missed.
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: I7e9715ea4e17b76252728c708e46df12ad67ab1f
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The test failed since the tanh had batch size > 1.
Added checks for batch size for all supported operators.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: I3570352740c40eb96bd9db965dfa3c91c81ff2ad
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Dump the current per-layer performance estimation information
that appears on the terminal to a CSV file.
Change-Id: I00e94168704be8c3c674c8779fb807ed28607ccd
Signed-off-by: wilisa01 <william.isaksson@arm.com>
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*Shape OP value is available at compile time hence
it can be optimised
*Disconnected shape OP at compile time from parent
tensor
*Transformed shape OP tensor into constant
Change-Id: I0a024269e2b592c6146dd72e62d7a41951fb727a
Signed-off-by: Ayaan Masood <Ayaan.Masood@arm.com>
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Vela was not able to parse config file paths entered with forward
slashes. This patch will make it possible to use both forward and
backslashes when specifying paths.
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: I0f4cfc16bde5738c73059af6216d2bdc3821c68b
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One level deep relative paths (ie ./vela.ini) were treated as the name of a
folder in config_files was ".". They are now treated as relative paths.
The warning message when using an absolute path has also been moved to
to the error message instead for a better user experience.
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: I7f7d4f904b9fbba97593e42203566057a2d36925
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The argument to the lstrip function is a list of all characters that
should be stripped from the beginning of the string, in any order. To
remove the actual prefix, check if the string starts with the string
instead and then remove that amount of characters. The function
"removeprefix" was added in python3.9 which does exactly this, but
that is not yet available to vela since it supports python 3.7.
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: Ibc5a173c6d422cb5f55feb80caef6c5c30cf7d39
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- For allocations that have a hard memory limit the Hill Climb allocator
should be given more attempts to find a solution that would fit
- The fix is to use a memory limit when there is a hard constraint, and
a minimum iteration count, reset on every improvement, when there is a soft
constraint
- Added maximum number iterations CLI option
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I19ff53a0b68412de280263626778a3102cbe52fa
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Add directory structure to support third party config files. Config
files should now be placed in an appropriately named directory under
the config_files directory, but can also be accessed by providing its
absolute path to vela --config.
Signed-off-by: Rickard Bolin <rickard.bolin@arm.com>
Change-Id: I2fcf52e7b2ddd2c4491dc370c85c0b3937d18062
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- Added support to print per operator sram usage and performance
information
- Added new CLI option --verbose-performance to control this feature
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I368599b410e5d441d9804871fc51b7a1049d85b3
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- Changed comments to docstring on QuantizationParams
- Simplified op type to op name conversion
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I2fdf5922cc17944c9bd37917a85fdfe50a1e651d
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* Add small aesthetic changes to summary
* Move "_cpu" suffix from cloned tensor to original tensor such that suffix is no longer externally visible
Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I97427561bd9acb04765ae9de6278760511278118
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Memory only operators such as Reshape, Squeeze and ExpandDims are
removed in the graph optimiser step.
- Added semantic check that memory only operators have same
quantisation parameters on ifm/ofm.
- Added support for the ExpandDims operator.
- Addition and cleanup of related unit tests.
- Removed TOSA from the generated SUPPORTED_OPS.md documentation.
Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com>
Change-Id: If848d8afc58c18806e10997ed94e4dae83f30879
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Added support for ADD, SUB and MUL
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I52acdc126b16e2cf4096bcf7a77023ea7d204998
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This is mainly to add support for depthwise conv2d
with dephmultiplier = 1.
(But there are no testcases suited, all I have sourced
has depth_multiplier set to 2, which is not supported.)
-Added support for depthwise conv2d.
-Added support for removing Transpose of constant data
-Added support for removing reshape
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I143e6246becfa78fd9f7510af0bf0d6b3fbbf2c7
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Added support for
-AVGPOOL and CONV2D with TFLite correspondence
-MAXPOOL
-additional support for replacing RESCALE ops with avgpool.
No support for breaking down tensors over the
size supported by NPU.
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I1d2aa50ac30a26283b3e6f1fe88cba1544b7c189
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- Add TOSA output generation in npz format
Change-Id: I97822e3a93a8fef1a95a990f23ef2c4ca5a8f73a
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
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This commit adds a CLI option for setting
the recursion limit. This option was originally
removed because it was considered unnecessary,
but in some cases of very large (enormous) networks,
a RecursionError is encountered during graph traversal.
A simple solution for issues like those is to manually
increase the recursion limit.
Signed-off-by: Dwight Lidman <dwight.lidman@arm.com>
Change-Id: Id0dbf68edf59b151abfa91783b5f8f021c1bb40f
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Refactor supported operators by breaking out model semantics
into its own class. Model semantics checked right after model
read.
Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com>
Change-Id: If442b189efcd91dda01af60b2b3adedfacdf2fad
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Added basic TOSA support, enabling Vela to
read and compile a .tosa file corresponding to
CONV2D + Rescale + Clamp, and writing it to an
optimized .tflite file.
The optimized .tflite file, will in this case, hold
a commandstream where the Rescale and Clamp has been
fused into the CONV2D.
The optimized tflite file is not output from Vela.
-Added support to read .tosa file into Vela
internal structure.
- Added tosa_reader.py, tosa_mapper.py and
helper files stored under tosa/
- Support for this limited to ~10 ops
-Added reader_util.py for functions common
for TOSA and TFLite
-Added tosa_graph_optimiser.py
-Added support to fuse Rescale into convolution
-Modified handling for padding
-Added support to fuse Clamp to previous op
-Added graph_optimiser_util.py
-Moved functions common for TOSA/TFLite graph
optimization to this file.
-Renamed graph_optimiser.py to tflite_graph_optmiser.py
-Added separate tosa_supported_operators.py
-Added supported_operator_util.py
-For functions in common for TOSA/TFLite
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: Ic3c540504ec8c5eb4771397fdc6882050ecf33ab
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- Merged dev/scheduler at 83639f90e8c828f70de6e29142355a940224959b
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I0050529d4b42da93768c7264296434dd877fb5b4
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Improved weight information showed in summary if --verbose-weights
option is used.
Signed-off-by: Fredrik Svedberg <fredrik.svedberg@arm.com>
Change-Id: Iac142f2a813bf1c05aa9da3f8a384466e2914d06
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When faced with an invalid tflite file we now catch the exception to
make it clear to the user that the issue is with the input and not with
Vela, instead of just crashing.
Same also applies to our own Vela error messages.
Signed-off-by: Henrik G Olsson <henrik.olsson@arm.com>
Change-Id: I56a81c5be9e1f46f3b98a88c6d24ee42fa0e450d
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Made the same correction in OPTIONS.md
Signed-off-by: Jacob Bohlin <jacob.bohlin@arm.com>
Change-Id: If79ee5c4c7464b40a72bbe6871b52a9eb0b308e1
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- Straight port of the C++ implementation to python.
- Renamed the allocator from "Search" to "HillClimb"
Change-Id: I50797d541f326d0264daf79bf7866aef32350a60
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Previously the debug database lost some operators in the debug database outputs when multiple custom operators were generated by Vela.
Also, the file offsets for command streams were always 0, even for a single custom operator. This patch should rectify these problems.
Signed-off-by: erik.andersson@arm.com <erik.andersson@arm.com>
Change-Id: Ieb072440d4f1806d4833a676683b4f42f431f3df
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Minor refactoring to use fstrings.
Improve Error classes to correctly inherit the base class.
Use existing exception classes instead of plain exceptions where it
makes sense.
Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com>
Change-Id: I0941c04e91010da1db77299517a8e2d896371e77
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Added a new tensor allocator that is based on searching,
implemented in C++ (C++11 compatible).
Change-Id: Ie96e9fcfc8e6c58d1fa53911f37de290eeba88cf
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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Added a new CLI option which simply force-enables all the other verbose
options available to vela
Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com>
Change-Id: I0dddbc86a76ea0de57266452f39fd0a5ca57eeb3
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- Changed to --cache-bias-scale-tensor
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I285fe253f03ba98eff36dbe996ad3a57e2ee3d99
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- Added API.md that describes the external APIs.
- Renamed npu_get_api_version
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
Change-Id: I6e6e6103a889da656b4e00c3cce3eee60dfa844a
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mlplatform uses gitiles, which in turn renders markdown differently:
"There must be at least three hyphens in each column of the header row"
Updated the generation code and the snapshot file to respect this,
as well as changed the link from commonmark (which does not support
tables)
Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com>
Change-Id: If31860ce8e38ebe7d68bfec61faff805fc00345b
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Added external API to add driver actions to a command stream.
Change-Id: Ie4779c1c745defc5769fa694358470cd6aea191c
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
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- Updated and aligned the --help and setup.py descriptions
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I78c11b1b3dd51284b34d57a6caca45cd222b4678
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- Removed unused --show-minimum-possible-allocation
- Change --allocation-alignment to --cpu-tensor-alignment
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I00e367c3190aeea08a3f136332711e9accc85ba3
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- Added sample vela.ini config file
- Changed vela config format, split into system config and memory mode
- Removed unused CPU cycle performance estimation
- Added new CLI options for --memory-mode and --verbose-config
- Changed CLI option --config to take multiple files
- Removed CLI option --global-memory-clock-scales
- Changed error helper functions to raise a VelaError exception
- Refactored to create a new is_spilling_enabled function
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I27c41577e37a3859edb9524cd99784be10ef0a0d
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- Also changed to use Ethos-U where appropriate
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: Ie45ba2bb3935b305abe897b78b498681296cb7c1
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Added version to the external API
-Added CLI-option --api_version
-Added API function to get the API version
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I0143b50adf884a2b05145912a1c7bef8cecc5f02
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A new CLI has been added that allows the generation of a report
containing a summary table of all TFLite ops that can be placed on the
NPU, and what the constraints are for that operator to be successfully
scheduled on the NPU.
This option will generate a new file, SUPPORTED_OPS.md containing this
information, in the current working directory.
Signed-off-by: Michael McGeagh <michael.mcgeagh@arm.com>
Change-Id: I6a7e2a49f251b76b2ea1168fff78e00da1910b25
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- Added mechanism to track input to output graph transforms for
debugging the resultant command stream.
- Provides base implementation for MLBEDSW-2661
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I2dfe8a409fbde7ad0282bfab5acb11ba1c8b82d8
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For IFM streamed cascades bias tensors are read several times.
Moves these tensors to fast storage and add DMA commands.
Change-Id: I630f6275986c1b5e3f126c925b11e22500fb1128
Signed-off-by: Andreas Nevalainen <andreas.nevalainen@arm.com>
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Removed the CLI opt ifm-ofm-overlap
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I23faa0d10c3e71972c543e22e8155086fce73556
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Removed CLI-option permanent-storage
Signed-off-by: Patrik Gustavsson <patrik.gustavsson@arm.com>
Change-Id: I03e03205a183bd538292a73a07b095546fa3d95a
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