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| author | Tim Hall <tim.hall@arm.com> | 2021-11-24 15:39:46 +0000 |
|---|---|---|
| committer | tim.hall <tim.hall@arm.com> | 2021-11-25 14:36:32 +0000 |
| commit | 837c31c2912386e4cdfac36f019dd73620970715 (patch) | |
| tree | ab8c822126eaab24f571ce2f9f01b8d0d29e9084 /PERFORMANCE.md | |
| parent | 3584a9cfdf0bcf0e75d38b78ec39e5b083947e19 (diff) | |
| download | ethos-u-vela-837c31c2912386e4cdfac36f019dd73620970715.tar.gz | |
MLBEDSW-5507: Fix vela summary for passes
- Removed the passes information as this was no longer correct
or useful
- Fixed the reporting of the number of CPU operators
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I80bf3f023de7d470af9aa5c6fe7bcb58c60ccd0b
Diffstat (limited to 'PERFORMANCE.md')
| -rw-r--r-- | PERFORMANCE.md | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/PERFORMANCE.md b/PERFORMANCE.md index 6bcfbbfe..9cd05b2d 100644 --- a/PERFORMANCE.md +++ b/PERFORMANCE.md @@ -18,8 +18,9 @@ Design peak Off-chip Flash bandwidth 0.50 GB/s Total SRAM used 0.95 KiB Total Off-chip Flash used 106.98 KiB -51 passes fused into 51 -0/106 (0.0%) operations falling back to the CPU +CPU operators = 0 (0.0%) +NPU operators = 44 (100.0%) + Average SRAM bandwidth 0.04 GB/s Input SRAM bandwidth 0.01 MB/batch Weight SRAM bandwidth 0.00 MB/batch @@ -115,15 +116,11 @@ system config and memory mode. ## Operator information -Information about cascading and operators. -The first line shows the number of passes (i.e. operations) and how many NPU -passes they have been fused or combined into. -The second line shows how many operators in the network are falling back to -the CPU (i.e. not supported by the NPU). +Information about the number of operators that will run on the CPU and NPU. ``` -51 passes fused into 51 -0/106 (0.0%) operations falling back to the CPU +CPU operators = 0 (0.0%) +NPU operators = 44 (100.0%) ``` ## Estimated memory bandwidth |