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author | Tim Hall <tim.hall@arm.com> | 2020-11-01 21:27:19 +0000 |
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committer | Tim Hall <tim.hall@arm.com> | 2020-11-20 12:55:47 +0000 |
commit | b9b515ca996e1ec5835a2c35033cc6f818f71f12 (patch) | |
tree | 25d9810755f8fff896cc1d523d0fad90651bc399 /OPTIONS.md | |
parent | 1bd531dec0b4eb745fb8856d14c1aba2b8a73026 (diff) | |
download | ethos-u-vela-b9b515ca996e1ec5835a2c35033cc6f818f71f12.tar.gz |
vela: Remove and change CLI options
- Removed unused --show-minimum-possible-allocation
- Change --allocation-alignment to --cpu-tensor-alignment
Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: I00e367c3190aeea08a3f136332711e9accc85ba3
Diffstat (limited to 'OPTIONS.md')
-rw-r--r-- | OPTIONS.md | 21 |
1 files changed, 8 insertions, 13 deletions
@@ -280,11 +280,14 @@ SRAM, albeit at the cost of performance (inference speed). vela network.tflite --weight-estimation-scaling=1.2 ``` -### Allocation alignment - -Controls the allocation byte alignment. Only affects CPU tensors, NPU tensors -will remain 16-byte aligned independent of this option. Alignment has to be a -power of two and greater or equal to 16. +### CPU Tensor Alignment + +Controls the allocation byte alignment. This affects all CPU tensors including +Ethos-U Custom operator inputs and outputs. In this instance a CPU tensor is +defined as any tensor that is explicitly listed in the resulting `.tflite` file. +The Ethos-U NPU internal tensors will remain 16-byte aligned independent of this +option, these tensors are contained within the command stream. Alignment has to +be a power of two and greater or equal to 16. **Type: Integer** **Default: 16** @@ -305,14 +308,6 @@ Prints a summary of all the subgraphs and their inputs and outputs. vela network.tflite --show-subgraph-io-summary ``` -### Show Minimum Possible Allocation - -Prints the minimum possible allocation. - -```bash -vela network.tflite --show-minimum-possible-allocation -``` - ### Show Cpu Operations Show the operations that fall back to the CPU. |