Build system updates

Move finding Python after the project command. This was causing
incremental CMake configurations to fail.

Moving ETHOSU_TARGET_* variables after adding the common subdirectory.
It is necessary to set the variables before the core driver is
included.

Change-Id: I1c6883061cb9247336f8b33d82d2e2de870634fa

1 files changed, 31 insertions, 41 deletions

diff --git a/targets/corstone-300/CMakeLists.txt b/targets/corstone-300/CMakeLists.txt
index 5742cb1..3a6f291 100644
--- a/targets/corstone-300/CMakeLists.txt
+++ b/targets/corstone-300/CMakeLists.txt
@@ -26,10 +26,17 @@ if (NOT CMAKE_TOOLCHAIN_FILE)
     set(CMAKE_TOOLCHAIN_FILE "${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/toolchain/armclang.cmake")
 endif()
 
-set(Python3_FIND_STRATEGY LOCATION)
-find_package(Python3 COMPONENTS Interpreter)
+set(ETHOSU_TARGET_NPU_CONFIG "ethos-u55-128" CACHE STRING "NPU configuration")
+set(ETHOSU_TARGET_NPU_COUNT 1 CACHE INTERNAL "Number of NPUs")
+set(ETHOSU_TARGET_NPU_TA_COUNT 2 CACHE INTERNAL "Number of timing adapters per NPU")
 
-set(ETHOSU_COMMAND_DEFAULT ${Python3_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/../../scripts/run_ctest.py -t corstone-300 CACHE INTERNAL "Default test command")
+set(ETHOSU_PMU_EVENT_0 -1 CACHE STRING "PMU Event #0")
+set(ETHOSU_PMU_EVENT_1 -1 CACHE STRING "PMU Event #1")
+set(ETHOSU_PMU_EVENT_2 -1 CACHE STRING "PMU Event #2")
+set(ETHOSU_PMU_EVENT_3 -1 CACHE STRING "PMU Event #3")
+
+set(MEMORY_MODEL "dram" CACHE STRING "Memory config for model")
+set(MEMORY_ARENA "dram" CACHE STRING "Memory config for arena")
 
 #############################################################################
 # Project
@@ -39,8 +46,6 @@ cmake_minimum_required(VERSION 3.21)
 
 project(ethos-u-corstone-300 VERSION 0.0.1)
 
-include(CTest)
-
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/helpers.cmake)
 
 #############################################################################
@@ -50,52 +55,37 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../../cmake/helpers.cmake)
 get_filename_component(ETHOSU_TARGET ${CMAKE_CURRENT_SOURCE_DIR} NAME)
 message("Configuring target ${ETHOSU_TARGET}")
 
+# Enable CTest
+include(CTest)
+set(Python3_FIND_STRATEGY LOCATION)
+find_package(Python3 COMPONENTS Interpreter)
+ethosu_get_architecture(${ETHOSU_TARGET_NPU_CONFIG})
+set(ETHOSU_COMMAND_DEFAULT ${Python3_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/../../scripts/run_ctest.py
+        -t corstone-300
+        -a ethos-${ETHOSU_ARCH}
+        -m ${ETHOSU_NUM_MACS}
+    CACHE INTERNAL "Default test command")
+
 # Enable trustzone support in core_software
 set(TRUSTZONE_BUILD ON)
 
+# Include common targets
 add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/../common target)
 
-set(ETHOSU_TARGET_NPU_CONFIG "ethos-u55-128" CACHE STRING "NPU configuration")
-set(ETHOSU_TARGET_NPU_COUNT 1 CACHE INTERNAL "Number of NPUs")
-set(ETHOSU_TARGET_NPU_TA_COUNT 2 CACHE INTERNAL "Number of timing adapters per NPU")
-
-set(ETHOSU_PMU_EVENT_0 -1 CACHE STRING "PMU Event #0")
-set(ETHOSU_PMU_EVENT_1 -1 CACHE STRING "PMU Event #1")
-set(ETHOSU_PMU_EVENT_2 -1 CACHE STRING "PMU Event #2")
-set(ETHOSU_PMU_EVENT_3 -1 CACHE STRING "PMU Event #3")
-
 target_compile_definitions(ethosu_target_common INTERFACE
+    # Confiugure NPU architecture and number of timing adapters
+    ETHOSU_NPU_COUNT=${ETHOSU_TARGET_NPU_COUNT}
+    ETHOSU_NPU_TA_COUNT=${ETHOSU_TARGET_NPU_TA_COUNT}
+
+    # Configure PMU events
     ETHOSU_PMU_EVENT_0=${ETHOSU_PMU_EVENT_0}
     ETHOSU_PMU_EVENT_1=${ETHOSU_PMU_EVENT_1}
     ETHOSU_PMU_EVENT_2=${ETHOSU_PMU_EVENT_2}
-    ETHOSU_PMU_EVENT_3=${ETHOSU_PMU_EVENT_3})
+    ETHOSU_PMU_EVENT_3=${ETHOSU_PMU_EVENT_3}
 
-set(MEMORY_MODEL "dram" CACHE STRING "Memory config for model")
-set(MEMORY_ARENA "dram" CACHE STRING "Memory config for arena")
-
-target_compile_definitions(ethosu_target_common INTERFACE
-    ETHOSU_NPU_TA_COUNT=${ETHOSU_TARGET_NPU_TA_COUNT}
-    ETHOSU_NPU_COUNT=${ETHOSU_TARGET_NPU_COUNT})
-
-# Model memory configuration
-# For ETHOSU_MODEL: 0 - SRAM, 1 - DRAM
-if (MEMORY_MODEL STREQUAL "dram")
-    target_compile_definitions(ethosu_target_common INTERFACE
-    ETHOSU_MODEL=1)
-else()
-    target_compile_definitions(ethosu_target_common INTERFACE
-    ETHOSU_MODEL=0)
-endif()
-
-# Arena memory configuration
-# For ETHOSU_ARENA: 0 - SRAM, 1 - DRAM
-if (MEMORY_ARENA STREQUAL "dram")
-    target_compile_definitions(ethosu_target_common INTERFACE
-    ETHOSU_ARENA=1)
-else()
-    target_compile_definitions(ethosu_target_common INTERFACE
-    ETHOSU_ARENA=0)
-endif()
+    # Placement or TLFu model and area. 0 = SRAM, 1 = DRAM
+    ETHOSU_MODEL=$<STREQUAL:${MEMORY_MODEL},dram>
+    ETHOSU_ARENA=$<STREQUAL:${MEMORY_ARENA},dram>)
 
 # AXI Timing adaptors
 set(registers MAXR MAXW MAXRW RLATENCY WLATENCY PULSE_ON PULSE_OFF BWCAP PERFCTRL PERFCNT MODE HISTBIN HISTCNT)