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authorKristofer Jonsson <kristofer.jonsson@arm.com>2022-05-12 11:35:33 +0200
committerKristofer Jonsson <kristofer.jonsson@arm.com>2022-05-13 12:49:05 +0200
commit1c0e7ae4bbf8ee81411b4c2e02c70ca892d17390 (patch)
tree49530e22edaff9916e31a22c3409fe6135b9b3be /src/ethosu_driver.c
parent301399d9e0b619fb2e229c9a9223aaf31ec6bcfa (diff)
downloadethos-u-core-driver-1c0e7ae4bbf8ee81411b4c2e02c70ca892d17390.tar.gz
Set default configuration22.05-rc322.05-rc2
Base address 1 points at the TFLM arena and is by default routed over AXI 0. For the spilling use case with both model and arena in DRAM it would make more sense to route base addresses 0 and 1 over AXI 1. For Ethos-U65 the default settings should correspond to the spilling use case. The AXI limits should have different max values depending on the NPU architecture. Change-Id: Icd317097e2cfdbfb39886e13c2cb2202651e5357
Diffstat (limited to 'src/ethosu_driver.c')
-rw-r--r--src/ethosu_driver.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/ethosu_driver.c b/src/ethosu_driver.c
index ee9d08c..11c51f6 100644
--- a/src/ethosu_driver.c
+++ b/src/ethosu_driver.c
@@ -21,10 +21,15 @@
******************************************************************************/
#include "ethosu_driver.h"
-#include "ethosu_config.h"
#include "ethosu_device.h"
#include "ethosu_log.h"
+#ifdef ETHOSU55
+#include "ethosu_config_u55.h"
+#else
+#include "ethosu_config_u65.h"
+#endif
+
#include <assert.h>
#include <cmsis_compiler.h>
#include <inttypes.h>