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2023-07-31MLCE-1092 Add Names to WorkloadsMike Kelly
* Added names to Workloads. * Workloads will be given the name of the Layer that created them. * Added new profiling macros to CL Neon and Ref that add the workload name to the event label * Updated workloads to use new macros. * Added missing profiling to Rank Workloads. * Fixed issue where ClConvolution2dWorkload was being reported as Undefined rather than GpuAcc. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I0a55eab6c2f455b73943aca8e99a247c3cb2a906
2023-07-31Update ACL pin to 16b37527906c68885f81a8db35f9d6040d73efecNikhil Raj
* Some header files have been moved from arm_compute/core to arm_compute/function_info in https://review.mlplatform.org/c/ml/ComputeLibrary/+/9979 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I1a52c9072417da65c3f7a847eac5c167eab983f1
2023-07-28Add datalayout to tensors in NeonStridedSliceWorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I9464970b0aa363f6ac3e0cb42ccb2bb3c8724ca4
2023-07-28IVGCVSW-7924 Add TILE to Support Library (SL)Teresa Charlin
* Add serialize parameters so that the multiples appear in the dot file Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id02ed709c97b866dabefed655b06bdb1b20c9026
2023-07-28IVGCVSW-7860 - Fix segfault with some models in the TfLiteParserDavid Monahan
* Added boilerplate checks around the ParseStridedSlice memcpy's Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ied85c709dee230eb2984d3e339ed711d62ab36bd
2023-07-27IVGCVSW-2292 Tile Operator Neon ImplementationDavid Monahan
* Added Implementation of the Tile Operator Workload to Neon * Added calls to the existing unittests * Added Documentation Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I0030ffe514215c79f5629d20671254dde9bec452
2023-07-26IVGCVSW-7885 Add TILE to TFLite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic2c3a89b89f44f111e5a184c83db89ea1cb52976
2023-07-26IVGCVSW-7836 Add ReverseV2 End-to-End TestsDeclan-ARM
* create implementation header * add copyright notice * add pragma once and anonymous namespace * create network function declaration * complete body of network function * create end-to-end function declaration * complete body of end-to-end function * add references to tests for supported data types Signed-off-by: Declan-ARM <decmce01@arm.com> Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I376e48efd8b6ca9e0e0b05b516be599c0acdbd16
2023-07-25IVGCVSW-7887 Add TILE End to End testsCian McGriskin
* Fix error in InferOutputShapes Signed-off-by: Cian McGriskin <cian.mcgriskin@arm.com> Change-Id: I1b38285d82d22715c6502dc63b7bab981e3258e4
2023-07-25IVGCVSW-7884 - Add Tile to Serializer and DeserializerDavid Monahan
* Added parsing functions to the serializer and deserializer * Added Tile and its Descriptor to the ArmnnSchema.fbs * Added a Unittest Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I72e638d26038c9b118cd82f633af462fd19e2b34
2023-07-25IVGCVSW-7883 Front end and reference implementation for TILETeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Cian McGriskin <cian.mcgriskin@arm.com> Change-Id: I0afb2403fee11c5c1e58ea65e2525e99594d8f2d
2023-07-24IVGCVSW-7907 Model cannot use SubtensorsMike Kelly
* On Neon we cannot remove a Reshape if it's connected to a SplitterLayer. * Removed clause 5 in SplitterLayer which could erroneously prevent the use of Subtensors in certain circumstances. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I437eb5d3ede25329a4d11d12c3fb1aec2e76efb6 Signed-off-by: Mike Kelly <mike.kelly@arm.com>
2023-07-21IVGCVSW-7830 Clean upMike Kelly
* Follow up review to clean up whitespace and copyright errors mentioned in https://review.mlplatform.org/c/ml/armnn/+/9885 * Added BinaryElementwiseOperation to .dot files * Refactored ConnectedToSplitterWithMoreThan4Dims function to more generally useful ConnectedToLayerType function Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I0e3d0895888f3a3f0a9758ce30bc031aba50812b
2023-07-21IVGCVSW-7825 block non const bias on CL CONV2D.Teresa Charlin
* There's currently a problem with using a non const bias value in CLConvolution2d. We will block it for the moment. Change-Id: Iedccea44931a8826e2c1b295bbc46592d8ac3ef8 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
2023-07-20IVGCVSW-7850 block non const bias on NEON Depthwise conv.Colm Donelan
* There's currently a problem with using a non const bias value in NeonDepthwiseConvolution. We will block it for the moment. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ifd206cfd25a2305a80f8b0a88e07747e79468d18
2023-07-20IVGCVSW-7849 and IVGCVSW-7825 block non const bias on NEON CONV2D.Colm Donelan
* There's currently a problem with using a non const bias value in NeonConvolution2d. We will block it for the moment. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ia020cf48f7d5e0642f7763e82501f06ad89945d8
2023-07-17IVGCVSW-7891 Failure in Nightly testsMike Kelly
* Added check to ensure that Reshapes are not removed on Neon if they are before or after a SplitterLayer and have more than 4 dimensions. * Moved NCHW check to a function to reduce clutter. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I45d97634484e8dc0ca7675c23481caf84eb3fe90
2023-07-17IVGCVSW-7890 SplitterLayer does not use overridden TensorInfos correctlyMike Kelly
* The SplitterLayer did not use the Overridden TensorInfos when calculating whether or not to use SubTensors. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I675b27c546c6ed720c76f4b9d868ebe32f914c70
2023-07-17IVGCVSW-7879 Change REVERSE_V2 from LayerWithParameters with 1 input, to ↵Tracy Narine
Layer with 2 inputs * Changing ReverseV2 to use two inputs * This is required by the backends * The ReverseV2Descriptor was removed * Tests updated * Added a Run<> templatefor inputs with different data types Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: I22f947de829b4b3da6bda3a74f4ffdef4052cc25
2023-07-14IVGCVSW-7830 Add backend optimizations to remove Reshapes where possibleMike Kelly
* Added optimization to remove reshapes for Neon and Ref Backends by using overridden TensorInfos * Added ability to delete Subgraphs during Optimization * Fixed naming error in NeonEndToEndTests and CLEndToEndTests * Added LayerNameAndTypeCheck for testing. * Fixed error where layers were not marked as altered when removed in CLBackend Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I1ac25cd4ec9821470d961831ae2c8d24882276cc
2023-07-12Add Square as Mul in the TfLite ParserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5760da9be2ed63fdfbdd5d3d7b771c310592798d
2023-07-12IVGCVSW-7783 Add check for FP16 infinity valuesNarumol Prangnawarat
* Check to round to closest finite FP16 value when convert FP32 to FP16 * Unit tests to be added Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: If3b982ff3030379ac33c47d4be13edb0bda679f6
2023-07-10IVGCVSW-7844 Remove unnecessary warnings for certain modelsRyan OShea
* Remove warning on constant layer optimization being run on layer without constant tensor * Remove warning on bias quantization scale not being equal to (InputScale x WeightScale) Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: I87e97127dc0fd45812bfada1c7dfcc3d5f5cdecc
2023-07-10IVGCVSW-7785 3D tensors in BATCH_TO_SPACE and SPACE_TO_BATCH in CpuAcc & GpuAccTeresa Charlin
* Add Reshape layers before and after to extend support for 3D tensors, as ACL only supports 4D tensors for those layers * Add Unit Tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4431185ce3a3b2f595d2a79bdda7095212d1c52d
2023-07-07IVGCVSW-7832 Add REVERSE_V2 to Serializer and DeserializerTracy Narine
* Support for ReverseV2 for the serializer and deserializer added * Tests added * CMake files updated for the build * Fixed an issue with the operator_list documentation for Resize and ReverseV2 Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: If396f55ecdd763d6f91c51707809f4bd58715cec
2023-07-05MLCE - Fix for duplicate definitions in cross compialtion buildDavid Monahan
Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I4c464797d80f7c2ad21429838c07d4e5e34308f6
2023-07-05IVGCVSW-7833 Add ReverseV2 support to TFLite ParserTianle Cheng
* Added ReverseV2 support to TFLite Parser * Added ReverseV2 TFLite Parser unit tests * Updated Parser Docs Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: Idb9a9213f75cd6cf01509a5d06ea5772cf56ac5b
2023-07-04IVGCVSW-7831: Front end and Reference Implementation for REVERSE_V2Tianle Cheng
* Descriptors added for ReverseV2 * Layer definition added * Input validation added * Reference workload implementation for ReverseV2 added * Reference layer unit tests made for ReverseV2 * CompareTensors method updated to support comparison between empty tensors * CMake and other build files updated Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I805738454421309fda77c44218a8df171d68dc18
2023-07-03IVGCVSW-7828 Add an Optional TensorInfo to InputSlotMike Kelly
* Updated calls to use the new function From: GetInputSlot(n).GetConnection()->GetTensorInfo(); To: GetInputSlot(n).GetTensorInfo(); * Added UnitTests Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I43184cc05e4472011b9347aaa820eb8deb1cd4a0
2023-06-30IVGCVSW-7666 Add a FileComparisonExecutor to ExecuteNetwork.Colm Donelan
* Implement the "-C" command line option of executenetwork. * Add a FileComparisonExecutorFile which will read tensors from a previously written text file and compare them to the execution output. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I8380fd263028af13d65a67fb6afd89626d1b07b8
2023-06-29Bugfix: -Werror=unused-result - unnecessary line, previously called aboveFrancis Murtagh
* this line is used earlier to initialize subgraphPtr Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: Iff24da2acab33e59460455977e221066973532a2
2023-06-26Update ACL pin to c952596e70f2fe0073029f053e329a4e930ced8cNikhil Raj
* activationInfo passed in directly to configure() rather than part of matMulInfo Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I546def1c1e1cabaf50629f7d78ae0ba459766ed4
2023-06-22IVGCVSW-7785 Extend support for 3D tensors BATCH_TO_SPACE and SPACE_TO_BATCH ↵Teresa Charlin
in CpuRef * Both layers were assuming 4D tensors, now 3D is supported too. * Remove some unnecessary includes * Add Unit Tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7bdd11e4936a27cd97ec65fd915e6ccaa1494cff
2023-06-22IVGCVSW-7785 BugFix: ExpandDims not working when batch!=1Teresa Charlin
* This commit fixes partially the ticket. In ToTensorInfo() we assume batch is 1 when it is unknown. We call OutputTensorInfoFromInputs() to amend this assumption/ However, this does not work for reshape layer. Therefore, we have to calculate the output shape in the ParseExpandDims(). Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iedc32a44b4ec0d8b7d2cc0b08f38f0776402f7bd
2023-06-19Update ACL pin to 043613fbb199e2c4fdd12c2c9a1785db9b0c45faNikhil Raj
* Break up Utils.h a bit to reduce unused code being included everywhere * Add FullyConnectedLayerInfo.h to ArmComputeUtils.hpp and remove Types.h * Add MatMulInfo.h to Neon and CL BatchMatMulWokloads Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: I2fbe90cb40dc59add90735dafe9fef9aab3fbf06
2023-06-14Add DataType to .dot files for constant layersTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I399ed1205f14d4fdd1194026c7a66bf00a1dd68d
2023-06-14IVGCVSW-7791 Enable dynamic bias in Conv in CpuAcc and GpuAccKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I722a9e4f3dba2500c624c6326f74085277e0d631
2023-06-13IVGCVSW-7790 - Enable dynamic bias in DWConv in GpuAccKevin May
* Remove checks for ias being constant * Convert ARMNN_ASSERTS to throw Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I009f4008393502bd9e30269151ad935ef67f0bc1
2023-06-09IVGCVSW-7691 Replace asserts with exceptions in Ref GatherKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: If6731b4757257d983c09210b50315cd5d9837e20
2023-06-07IVGCVSW-7789 Enable dynamic bias in Depthwise Convolution in CpuAccTeresa Charlin
* Dynamic bias are supported by CpuAcc for this layer * Indentation and const modifiers minor changes Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I3b25f14feea55f746c254a832d97e21a1551ca36
2023-06-07Fix incorrect validation of Unidirectional Sequence LSTM on Cl and NeonNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I54c60fb98b9c560c300572f46d42b13aec7e402e
2023-05-23MLCE-1022 Fix failure on UnidirectionalSequenceLstm OperatorNarumol Prangnawarat
* Fix failure to parse UnidirectionalSequenceLstm Operator on CpuAcc * Fix failure to parse UnidirectionalSequenceLstm Operator on GpuAcc * Fix IsLayerSupported tests when there are multiple otutputs Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ia690f34d3c7fae87bd36c97056a3ff71baa865f6
2023-05-23BugFix: check for options!=null before adding fused activation in TfLite parserTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I96fd26559450690fbe99a0e8fbe193ddf5d3a34b
2023-05-23IVGCVSW-7732 Enable dynamic bias in FullyConnected in CpuAcc and GpuAccTeresa Charlin
* Dynamic bias are supported by ACL for this layer. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I428bd42a97e0c26c72f9925e3cb209c2fc9a650d
2023-05-18IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE to CpuAcc and GpuAccJohn Mcloughlin
* Add POW SQUARED_DIFFERENCE and Unit tests for CpuAcc and GpuAcc Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifa78af2a2fda2074586d8e4d9a506b1b13fa5755
2023-05-17IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE.John Mcloughlin
* Added 2 new operators as ElementWiseBinary ops * Ref End to End and unit tests * Serialize and Deserialize tests * Delegate and Opaque Delegate tests * TfLite Parser tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I537158127f602f0c41ca0402aa31655cd3bd4281
2023-05-11Revert "IVGCVSW-7454 Enable dynamic bias in CpuAcc and GpuAcc in Conv2d ↵TeresaARM
DWConv and FC" This reverts commit fecd9ed396705a17805ffc49839bd82ae24c892b. Reason for revert: IVGCVSW-7727 Dynamic bias CTS failing Change-Id: I53f67d60fca0e60a81298f90450ceef26b97c321 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
2023-05-09IVGCVSW-7454 Enable dynamic bias in CpuAcc and GpuAcc in Conv2d DWConv and FCTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ib6914a9a208475b68e969eba6f70fae4061efa9b
2023-05-09Removing "shiftID" from BackendProfilingCounterRegisterMockBackendTestNikhil Raj
This test case has caused several problems over the years. All the problems are around using counter indices to identify counters rather than names. Updating the test to check for registered counter names. Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Ic5ebc9b2d53f2db301a3067ecce4befc14dcb8a5
2023-05-09IVGCVSW-5846 Remove TODO statements from Armnn CodeDavid Monahan
* Removed all instances of TODO statements from comments * Removed statements are noted as part of IVGCVSW-5846 * Removed ProtoxtFixture.cpp from the Onnx Parser tests as it's not used Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ia0a15f8a0d4123c8831638634eaa0d1018c40e2c
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