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2019-08-29IVGCVSW-3656 Fix wrong rename of the reference backend control macroMatteo Martincigh
* Renamed ARMNN_COMPUTE_REF_ENABLED to ARMNN_REF_ENABLED in the Android makefiles Change-Id: I12af2ca00c719568274585482d428b035674737c Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-08-28IVGCVSW-3656 Rename ARMCOMPUTEREF to ARMNNREFMatteo Martincigh
* Renamed ARMCOMPUTEREF to ARMNNREF (and relative symbols) as the previous name was misleading !android-nn-driver:1822 Change-Id: I912e9f521750b91539e48f8a2fb4de73fb6f7425 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-08-26IVGCVSW-3575 Fix DepthwiseConvolution VTS Test FailuresKevin May
Failing VTS tests were "NeuralnetworksHidlTest.depthwise_conv2d_*" In depthwise convolution there was a difference in weight tensor channel order between the reference and ACL implementations. This specifically related to NCHW. This commit: * Adds ReorderWeightChannelsForAcl to WorkloadUtils which will correct the weight tensor channel order. * Add unit tests to detect this problem. Signed-off-by: Colm Donelan <Colm.Donelan@arm.com> Change-Id: Icaeac08e14b3d5da9e222ad2f118db55ebb15d09
2019-08-23Fix Windows build:Rob Hughes
* CMake "install" commands require a RUNTIME argument for platforms with DLLs (e.g. Windows). * Replace use of non-standard variable length array with vector * Remove unnecessary #include of unistd.h * Add #ifdefs to dynamic backend code to disable for non-Unix platforms where you can't use dlopen etc. We could implement this properly for Windows later using LoadLibrary etc., but for now erroring is fine. * Add missing #include of <algorithm> Change-Id: Ic8ef5fd599b37bf8772510157b6e479819f6a1eb
2019-08-22IVGCVSW-3670 Fix Vts Tests after adding Ref Import functionalityFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I87d003ae14575d7d7be67b2a7d00d69ef6201849
2019-08-22IVGCVSW-3656 Make the reference backend optionalMatteo Martincigh
* Made the build of the reference backend depend on a new ARMCOMPUTEREF macro * Made the relevant targets dependent on the ref backend * Moved Cl and Neon static registry initializers to separate files * Wrapped some of the unit tests into proper ifdefs where necessary Change-Id: I7f2c42699682630233a4c4b6aed2f005083de189 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-08-22IVGCVSW-3668 Fix Android issue running Ref Import testsFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I64f82c0e3c5cddcaebe0d5001020880a759ec444
2019-08-21IVGCVSW-3642 Fixed VTS Test FailuresMike Kelly
* Fixed Quant8 VTS test failures where an output value should have been greater than 255 before a negative bias was applied. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ie0084c1c8c4a4b5f069112d523765ed338277e58
2019-08-20IVGCVSW-3606 Support memory import for Reference backendFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I94bd191f88e0911ad4e4727610e81cd7afa95512
2019-08-20IVGCVSW-3640 Add multi-channel TransposeConvolution2d unit tests to CL backendAron Virginas-Tar
* Fixed bug in multi-channel test and reference workload implementation * Enabled multi-channel tests on CL backend Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I08bb523bc68d9c93a1012b4f487a5bce36a085b1
2019-08-16IVGCVSW-3639 Add 5d tensor supportMatthew Jackson
* Increased MaxNumOfTensorDimensions and fixed issues related to its use * Fixed issues caused by assuming 5d tensors are invalid * Updated ArmComputeTensorUtils for 5d tensors * Added 5d tensor unit tests for add, mul, stack and reshape (needed by IVGCVSW-3527) Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I5bcd64942d0d04efcc6c5acb240ad4b88e010743
2019-08-14IVGCVSW-3633 Fixed possible driver crashMike Kelly
* Fixed possible driver crash due to supportedTypes arrays with the wrong size. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I52702b84089d02d3c63ff7aa5923a9f5628bec91
2019-08-14IVGCVSW-3610 Remove unused leftover variable from TransposeConvolution2dImplAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I496f95ab464f3a38e0601799a6ff6ba5ffe3a776
2019-08-14IVGCVSW-3474 Refactor Lstm and QuantizedLstm Param GettersFrancis Murtagh
* Change Getter Signatures to follow coding guidelines Change-Id: Ic02621e834dbf79b9df63f8b4c6339f71651e944 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-08-13IVGCVSW-3635 Remove temporary check from ↵Aron Virginas-Tar
RefLayerSupport::IsTransposeConvolution2dSupported() Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I85a9563e2d12a5eb9dbcac1b70563a303905b67b
2019-08-13IVGCVSW-3616 Add multi-channel unit test for TransposeConvolution2dAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ib9271920b39fb9d730006c79a322e32008096b56
2019-08-13IVGCVSW-3615 Update Transpose Convolution algorithmMike Kelly
* Now supports channel multiplier != 1 in Ref TransposeConvolution2d Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ice95444025311b8b952c8f7f5fa0f1ecf483df41
2019-08-13IVGCVSW-3620 Fix VTS CpuRef failuresSadik Armagan
* Fixed Max and Min VTS test failures. Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I133f5ff43774f74ad6e1c698a3570066ad45527c
2019-08-12IVGCVSW-3546 Create a reference dynamic backend to use for testing and asMatteo Martincigh
an example in the docs * Wrapped the reference backend into a dynamic backend * Moved the static registration code to a separate file, so that it is possible to create the reference dynamic backend that does not register statically into armnn * Added unit test Change-Id: I1074d21b020820f9ac8c7178388be773b447555a Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-08-05IVGCVSW-3277 Mem export/import suppor for TensorsDerek Lamberti
* Rename MemoryStrategy to EdgeStrategy * Add MemImportLayer * Import memory rather than copy when possible Change-Id: I1d3a9414f2cbe517dc2aae9bbd4fdd92712b38ef Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2019-08-05IVGCVSW-3611 Report TransposeConvolution2d as unsupported on CpuRef when ↵Aron Virginas-Tar
channel multiplier != 1 Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I784bbff3f7b6650881d3f70ba7cd1891171195b1
2019-08-02IVGCVSW-3609 Fix decoding and encoding of INT32 tensorsAron Virginas-Tar
* Added Int32Decoder and Int32Encoder to decode INT32 tensors * Changed MakeDecoder to return ScaledInt32Decoder only if the scale is different from 0, i.e. for quantized bias tensors Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I278061d445d1c549c7ace11f51aa172ce7c691ae
2019-08-01IVGCVSW-3571 Fix VTS Test SkipsMike Kelly
* Fixed FP16 failures on Max, Min, BatchToSpace on Gpu * Fixed Signed32 skips on Maximum and Minimum Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I4bea19af1a0ae4c8950af8c6d5d68622cdd9b674
2019-08-01IVGCVSW-3539 Add CL support and tests for StackMatthew Jackson
* Added CL backend support for Stack * Added unit tests for Stack on the CL backend * Refactored unit tests to support generic data types Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I38ee3e9d8947ea98a3104c982698001e704d7d89
2019-07-30IVGCVSW-3592 Add Support for Quantize to HAL 1.2 DriverSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ib93c94a15fe15495664d509630cce373a69e1612
2019-07-26IVGCVSW-3537 Add support for L2 Normalization with < 4 dimensional tensorsMatthew Jackson
* Fix reference L2 Normalization workload to support < 4 dimensional tensors * Add unit test for L2 Normalization with 2d tensor to Reference, Neon and CL test suites * Fix typo in StackLayer Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I48a6a1289bcb02955b24f261bc70b467bd1abc23
2019-07-25IVGCVSW-3521 CpuAcc V1.2 pad FailuresMike Kelly
* Pad value for QASYMM8 is no longer stored in quantized form. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I048e1d233353c0560ae03a7cc1ed5199295352bc
2019-07-23Fix various uses of non-standard C++:Rob Hughes
* Replace u_int32_t with uint32_t * Replace size_t with uint32_t for initializer list of TensorInfo * Replace variable size arrays with std::vector * Replace reference to local variable during its initialisation Change-Id: I298b3995f1525f90a1ab2416d7e270315698fae3
2019-07-23IVGCVSW-3536 Add Axis parameter to reference Softmax implementationFrancis Murtagh
* Add Axis parameter to Softmax Descriptor * Add new reference implementation for Softmax using Axis parameter * Add unit tests to cover each Axis Change-Id: Iafac2275d2212337456f2b1b56b0f76f77fb9543 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-07-22IVGCVSW-3368 Add reference support for depthwise multiplier > 3Matthew Jackson
* Remove multiplier check in TfLite parser * Add reference unit test for depthwise multipler of 64, as in DeepSpeaker Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I787339ab4c4d269333985353d191202d070906ba
2019-07-19IVGCVSW-3479 Add End to End test for PreluNikhil Raj
Change-Id: I041bdf9e721a4384ea3c2be0184787dd1f4ea08e Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
2019-07-17IVGCVSW-3419 Add reference workload support for the new Stack layerMatthew Jackson
* Added reference workload for the Stack layer * Added factory methods * Added validation support * Added unit tests Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: Ib14b72c15f53a2a2ca152afc357ce2aa405ccc88
2019-07-15IVGCVSW-3495 Refactor names of convolution2d unit testsJan Eilers
Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Idb1325cba730dbf62b4742e4078220ef97d4b526
2019-07-12IVGCVSW-3296 Add CL backend support for ResizeNearestNeighbourAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I7f4c722141837939fd8904c52e75704a15c8a5e3
2019-07-10IVGCVSW-3468 Add Unit test for Conv2D that combinesTeresa Charlin
strides, dilation and padding Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Iea99a162e1f0c823cd0f8bc0ae2fb5f461778515
2019-07-09IVGCVSW-3397 Join lstm parameter infos in a struct for isLstmSupportedJan Eilers
!android-nn-driver:1461 Change-Id: I9d8fe7adf13832ed0cbcfe98b2353c2f37011d22 Signed-off-by: Jan Eilers <jan.eilers@arm.com>
2019-07-09IVGCVSW-3399 Add support of QuantisedSymm16 to PadNarumol Prangnawarat
* Add support of QuantisedSymm16 to Pad * Fix custom padding tests * Add unit tests for Pad QuantisedSymm16 Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ieb9a4492760b13fa030a42eb4d38fd9ffd7a8c76
2019-07-09IVGCVSW-3391 Add SpaceToDepth CreateWorkload and EndToEnd testsJames Conroy
* Refactored existing EndToEnd tests, moved tests in reference to backendsCommon. * Enabled EndToEnd tests for CL. * Added new Ref/CL CreateWorkload tests. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I0a5e52961a8aca540d43241a3805d19c9c6ff56c
2019-07-08IVGCVSW-3399 Add support of QuantisedSymm16 to Permute and unit testsNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Id6ab073ae3e0ff5f60c2f4bef975798ce71c9f88
2019-07-08IVGCVSW-3399 Add support of QuantisedSymm16 to Debug and unit tests,Narumol Prangnawarat
refactor to be done Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I6dbf6a2aa328b8c843632e1231931b4e1c6888bb
2019-07-05IVGCVSW-3353 Add CL support and tests for SpaceToDepthJames Conroy
* Added CL backend support for SpaceToDepth. * Enabled unit tests for SpaceToDepth on CL. * Renamed unit tests to make them type-agnostic. * Added QSymm16/S16 support to ClTensorHandle. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I417d82946142ed619c447428bf0b0c4a2116c004
2019-07-05Fix member name in PadDescriptorAron Virginas-Tar
* Renamed m_padValue to m_PadValue to bring it in line with our naming conventions Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I071aa42c9be495462c64697e5a923a5ec55de146
2019-07-04IVGCVSW-3307 Add RefMemoryManagerMatthew Bentham
Simple pool memory manager for use in the reference backend, in order to make the backend usable for testing large networks. Change-Id: I5694da29052c60f95b57da595c64cc114d75b8ba Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
2019-07-03IVGCVSW-3399 Add QSymm16 IsLayerSupportedTest to reference backendNarumol Prangnawarat
* Refactor and add QSymm16 to IsDepthwiseConvolutionSupported * Refactor and add QSymm16 to IsEqualSupported * Refactor and add QSymm16 to IsGreaterSupported * Refactor and add QSymm16 to IsSplitterSupported * Refactor and add QSymm16 to IsStridedSliceSupported * Refactor and add QSymm16 to IsMemCopySupported * Refactor IsFakeQuantizationSupported Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I4f115a5535748fc22df8bc90b24b537fd5dd95b8
2019-07-03IVGCVSW-3307 TransposeConvolution: Don't call Map() before Execute()Matthew Bentham
Change-Id: I7a812eafc8c73d074049ba95189cbc17d276eee3 Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
2019-07-03IVGCVSW-3161 Bug Fix in Nearest Neighbor implementation;Teresa Charlin
consider 4 neighbors instead of 2. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia724b35f723157e9f51b5345964200f126b98267
2019-07-02IVGCVSW-3382 Deprecate ResizeBilinear and use Resize with Bilinear methodAron Virginas-Tar
!android-nn-driver:1451 Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Ieedbce1f6e95891137a250fdd07e2f7e4e1f4828
2019-07-02IVGCVSW-3236 Extend Ref LSTM with layer normalization supportJan Eilers
* Add descriptor values * Update lstm queue descriptor validate function * Update lstm workload * Update isLstmSupported (Cl and Ref), LayerSupportBase, ILayerSupport * Update lstm layer * Add unit tests Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: I932175d550facfb342325051eaa7bd2084ebdc18 Signed-off-by: Jan Eilers <jan.eilers@arm.com>
2019-07-02IVGCVSW-3307 Don't assume TensorInfo::Map() can be called before Execute()Matthew Bentham
Change-Id: I445c69d2e99d8c93622e739af61f721e61b0f90f Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
2019-07-02IVGCVSW-3307 Introduce RefTensorHandleMatthew Bentham
Use it for intermediate tensors on reference backend. Lays the groundwork for memory management in the reference backend. Change-Id: I7d3ee132cac31bde70ae6e1b815f4f0b03d550a6 Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
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