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path: root/src/backends/reference/workloads
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2019-08-21IVGCVSW-3642 Fixed VTS Test FailuresMike Kelly
* Fixed Quant8 VTS test failures where an output value should have been greater than 255 before a negative bias was applied. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ie0084c1c8c4a4b5f069112d523765ed338277e58
2019-08-20IVGCVSW-3640 Add multi-channel TransposeConvolution2d unit tests to CL backendAron Virginas-Tar
* Fixed bug in multi-channel test and reference workload implementation * Enabled multi-channel tests on CL backend Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I08bb523bc68d9c93a1012b4f487a5bce36a085b1
2019-08-14IVGCVSW-3610 Remove unused leftover variable from TransposeConvolution2dImplAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I496f95ab464f3a38e0601799a6ff6ba5ffe3a776
2019-08-13IVGCVSW-3615 Update Transpose Convolution algorithmMike Kelly
* Now supports channel multiplier != 1 in Ref TransposeConvolution2d Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ice95444025311b8b952c8f7f5fa0f1ecf483df41
2019-08-02IVGCVSW-3609 Fix decoding and encoding of INT32 tensorsAron Virginas-Tar
* Added Int32Decoder and Int32Encoder to decode INT32 tensors * Changed MakeDecoder to return ScaledInt32Decoder only if the scale is different from 0, i.e. for quantized bias tensors Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I278061d445d1c549c7ace11f51aa172ce7c691ae
2019-07-26IVGCVSW-3537 Add support for L2 Normalization with < 4 dimensional tensorsMatthew Jackson
* Fix reference L2 Normalization workload to support < 4 dimensional tensors * Add unit test for L2 Normalization with 2d tensor to Reference, Neon and CL test suites * Fix typo in StackLayer Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I48a6a1289bcb02955b24f261bc70b467bd1abc23
2019-07-25IVGCVSW-3521 CpuAcc V1.2 pad FailuresMike Kelly
* Pad value for QASYMM8 is no longer stored in quantized form. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I048e1d233353c0560ae03a7cc1ed5199295352bc
2019-07-23Fix various uses of non-standard C++:Rob Hughes
* Replace u_int32_t with uint32_t * Replace size_t with uint32_t for initializer list of TensorInfo * Replace variable size arrays with std::vector * Replace reference to local variable during its initialisation Change-Id: I298b3995f1525f90a1ab2416d7e270315698fae3
2019-07-23IVGCVSW-3536 Add Axis parameter to reference Softmax implementationFrancis Murtagh
* Add Axis parameter to Softmax Descriptor * Add new reference implementation for Softmax using Axis parameter * Add unit tests to cover each Axis Change-Id: Iafac2275d2212337456f2b1b56b0f76f77fb9543 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-07-17IVGCVSW-3419 Add reference workload support for the new Stack layerMatthew Jackson
* Added reference workload for the Stack layer * Added factory methods * Added validation support * Added unit tests Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: Ib14b72c15f53a2a2ca152afc357ce2aa405ccc88
2019-07-09IVGCVSW-3399 Add support of QuantisedSymm16 to PadNarumol Prangnawarat
* Add support of QuantisedSymm16 to Pad * Fix custom padding tests * Add unit tests for Pad QuantisedSymm16 Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ieb9a4492760b13fa030a42eb4d38fd9ffd7a8c76
2019-07-08IVGCVSW-3399 Add support of QuantisedSymm16 to Permute and unit testsNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Id6ab073ae3e0ff5f60c2f4bef975798ce71c9f88
2019-07-08IVGCVSW-3399 Add support of QuantisedSymm16 to Debug and unit tests,Narumol Prangnawarat
refactor to be done Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I6dbf6a2aa328b8c843632e1231931b4e1c6888bb
2019-07-05Fix member name in PadDescriptorAron Virginas-Tar
* Renamed m_padValue to m_PadValue to bring it in line with our naming conventions Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I071aa42c9be495462c64697e5a923a5ec55de146
2019-07-04IVGCVSW-3307 Add RefMemoryManagerMatthew Bentham
Simple pool memory manager for use in the reference backend, in order to make the backend usable for testing large networks. Change-Id: I5694da29052c60f95b57da595c64cc114d75b8ba Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
2019-07-03IVGCVSW-3307 TransposeConvolution: Don't call Map() before Execute()Matthew Bentham
Change-Id: I7a812eafc8c73d074049ba95189cbc17d276eee3 Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
2019-07-03IVGCVSW-3161 Bug Fix in Nearest Neighbor implementation;Teresa Charlin
consider 4 neighbors instead of 2. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia724b35f723157e9f51b5345964200f126b98267
2019-07-02IVGCVSW-3236 Extend Ref LSTM with layer normalization supportJan Eilers
* Add descriptor values * Update lstm queue descriptor validate function * Update lstm workload * Update isLstmSupported (Cl and Ref), LayerSupportBase, ILayerSupport * Update lstm layer * Add unit tests Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: I932175d550facfb342325051eaa7bd2084ebdc18 Signed-off-by: Jan Eilers <jan.eilers@arm.com>
2019-07-02IVGCVSW-3307 Don't assume TensorInfo::Map() can be called before Execute()Matthew Bentham
Change-Id: I445c69d2e99d8c93622e739af61f721e61b0f90f Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
2019-07-02IVGCVSW-3307 Introduce RefTensorHandleMatthew Bentham
Use it for intermediate tensors on reference backend. Lays the groundwork for memory management in the reference backend. Change-Id: I7d3ee132cac31bde70ae6e1b815f4f0b03d550a6 Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
2019-07-01IVGCVSW-3365 Add reference workload support for ResizeLayerTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id551690065dca0686ce597d1f0c14fd73163481e
2019-06-27IVGCVSW-3320 Add reference workload support for TransposeConvolution2dLayerAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Icc64f8148c9d8a0d14d772e6e4e7865e70585cd9
2019-06-24IVGCVSW-3235 Add scalar to use as padding value in Reference PadDavid Monahan
Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: If050f318fcb7626bbfae1b8737a1d232a4a5a915
2019-06-24IVGCVSW-3247: Refactor reference Gather workloadEllen Norris-Thompson
* Refactored Gather reference workload to not use templates for different types * Added quantization values in Gather unit tests for Quantized types Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com> Change-Id: Ibe5d655aa1c287824e45b83818c5862bda7f92b0
2019-06-20IVGCVSW-3212 Refactor RefBatchNormalizationWorkloadMatteo Martincigh
* Refactor the reference batch normalization workload to avoid unnecessary function calls and to improve readibility Change-Id: I49d78dcac7bad36f57bd1eb196c12dbad01cc893 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-20IVGCVSW-3248 Refactor reference BatchToSpace workloadFrancis Murtagh
* Add Decoders and Encoders to workload to make it data type agnostic * Merge float32 and Uint8 into single workload Change-Id: I8adfa1898a63f13889eaaf55a31c26fd1e2d7ee8 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-06-19IVGCVSW-3231 Add reference workload support for SpaceToDepthKeith Davis
* Added reference workload for SpaceToDepth * Added unit tests for float32 & uint8 * Minor sort refactoring to RefWorkloads.hpp to alphabetical order Change-Id: I2e01f8101650e2aae102a8a32bc0064f067141ab Signed-off-by: Keith Davis <keith.davis@arm.com>
2019-06-19IVGCVSW-3268 Add Reference workload support for the new Prelu Activation layerMatteo Martincigh
* Added reference workload for the PReLU Activation layer * Added factory methods * Added validation support * Added Int16 support * Added unit tests Change-Id: Ic950d908c5e0a335dccd2960a3ffab0f8b599876 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-17IVGCVSW-3286 Add epsilon Reference workload supportFerran Balaguer
Change-Id: I5cabbf9d1ef3858be68d6820d14845e512128c5b Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
2019-06-17IVGCVSW-3221 Refactor Mean ref workload and testsJames Conroy
* Renamed RefMeanFloat32Workload and RefMeanUint8Workload to RefMeanWorkload, updated references to reflect this change. * Refactored RefFloorWorkload to use Decoders/Encoders, to support the use of multiple data types. * Deleted reference Unit8 Mean tests as they were duplicates of the Float32 tests. Refactored these tests to support multiple data types and updated references. * Adjusted the values used in the tests' input tensors so that they are more like floating point numbers e.g. change 1.0f to 1.5f. * Replace size_t with unsigned int in Mean ref workload, for better compatibility with the Encoder/Decoder, removed some unnecessary casts after this. * Added ValidateTensorDataTypesMatch() function to WorkloadData.cpp, added CreateIncorrectDimensionsErrorMsg function to RefLayerSupport.cpp. * Added passing and failing tests for ref IsMeanSupported. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id3d44463d1385255c727a497d4026d21a49e7eb2
2019-06-17IVGCVSW-3218 Refactor the Reference Workloads for the ResizeBilinear layerEllen Norris-Thompson
* Refactored ResizeBilinear Reference Workloads to combine Float32 and Uint8 files Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com> Change-Id: I725a830f4c4755a7d3a37ca68e31e44e7eb267cb
2019-06-14IVGCVSW-3229 Refactor L2Normalization workload to support multiple data typesFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I848056aad4b172d432664633eea000843d85a85d
2019-06-07IVGCVSW-3223 Fix ref convolution performance regressionMatteo Martincigh
* Do not use DataLayoutIndexed::GetIndex for weights and inputs, as it causes a large regression in performance * It turned out that the calculation of the indexes for the weights and inputs was the way it was because of an optimization done many months ago * Reverted the relevant hunks and added some comments so we won't make the same mistake again in the future * Made the GetIndex function inline to speed up other usages Change-Id: I343b2ef0446993086f58b9dea1f0de0ba2d92216 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-06IVGCVSW-3211 Refactor reference Rsqrt workloadnikraj01
Change-Id: Ia413c6b5352dbb3390e7d84e837a542c24ae8813 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-06-06IVGCVSW-3226 Refactor the reference normalization workloadMatteo Martincigh
* Refactored RefNormalizationFloat32Workload into RefNormalizationWorkload * Added ref support of Uint8 norm workloads * Added workload unit tests for Uint8 Change-Id: I063ce919c267e02a32e739848e49d75fd98a5eb6 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-06IVGCVSW-3142 Refactor reference Pooling2d workloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I94c973ab747309c0214268c9c39f6d8f3fc7b255
2019-06-05IVGCVSW-2971 Support QSymm16 for DetectionPostProcess workloadsAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I8af45afe851a9ccbf8bce54727147fcd52ac9a1f
2019-06-05IVGCVSW-3223 Use GetIndex from DataLayoutIndexed.cpp in ConvImpl.cppMatteo Martincigh
* Used DataLayoutIndexed::GetIndex wherever possible * Removed unnecessary GetOffset function Change-Id: Ieaad2def60e8de48dbc3afb63e550ac5883b3690 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-05IVGCVSW-3212 Refactor the Reference BatchNormalization workloadsMatteo Martincigh
* Used the new DataLayoutIndexed::GetIndexmethod in BatchNormImpl for convenience Change-Id: Ifb7e5abbdb48d958ee2139d22b97cd8d479357bc Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-05IVGCVSW-3142 Refactor DataLayoutIndexed and TensorBufferArrayViewMatteo Martincigh
for convenience * Added GetIndex method to DataLayoutIndexed * Refactored TensorBufferArrayView::Get to use the new method Change-Id: Iae08b2761bddeda9e935b25e6bc4985f2d386cd3 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-04IVGCVSW-3212 Refactor the Reference BatchNormalization workloads toMatteo Martincigh
handle Float32 and QAsymm8 types * Removed the type-specific workload implementations * Added type-independent RefBatchNormalizationWorkload implementation * Reworked BachNormImpl to use decoders/encoders * Improved the validation of the BatchNorm queue descriptor * Fixed unit tests where necessary Change-Id: Icf3fa1332292d38ec2fa0b1cb984cab78426034b Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-05-31IVGCVSW-3177 Refactor Floor reference workloadJames Conroy
* Renamed RefFloorFloat32Workload to RefFloorWorkload and updated references to reflect this change. * RefFloorWorkload now uses Decoders/Encoders and supports the use of multiple data types. * Deleted FloorTestImpl.hpp and moved its contents into LayerTests.hpp. Change-Id: Ie079d05f2f6a578172f0fe3024f9607c030bce64 Signed-off-by: James Conroy <james.conroy@arm.com>
2019-05-31IVGCVSW-3170 Refactor the Strided Slice Ref workload for Float32 andMatteo Martincigh
QAsymm8 types * RefStridedSliceWorkload is no longer a template class * Refactoring of the ref StridedSlice implementation * Added ValidateTensorQuantizationSpace function Change-Id: Ifa182a33d79d42137731f48b995a7973c9d92152 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-05-30IVGCVSW-3194 Refactor SpaceToBatchNd workloadnikraj01
Change-Id: Iac2ded9b20c37299e3de51465dcbfb5a7bfc52d5 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-05-30IVGCVSW-3159 Support QSymm16 for Splitter workloadsRuomei Yan
Change-Id: I9af5d2d8ade97b9ecd2e6fbf13db9fa3bb622ed8 Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>
2019-05-29IVGCVSW-3168 Refactor reference softmax workload into a single workloadnikraj01
Change-Id: Ie290efcbb9e3a6365cbd630cb2041e7b0f542505 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-05-28IVGCVSW-3119 Rename MergerLayer to ConcatLayerJim Flynn
!android-nn-driver:1210 Change-Id: I940b3b9e421c92bfd55ae996f7bc54ac077f2604 Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2019-05-28IVGCVSW-3145 Refactor Reference Reshape workloadsNina Drozd
* Removed reference reshape workloads for float32 and uint8 * Added RefReshapeWorkload * Added check for supported datatypes for reshape in WorkloadData * Added check for supported datatypes for reshape in RefLayerSupport * Updated CMakeLists.txt * Updated references to reshape workloads Signed-off-by: Nina Drozd <nina.drozd@arm.com> Change-Id: I9941659067b022f8f7686ab0ff14776944dca3e5
2019-05-27IVGCVSW-3134 Refactor FullyConnected workloads into single workloadFrancis Murtagh
* Refactor FullyConnected workloads into single workload. * Refactor FullyConnected ref implementation to use Encoders and Decoders to support all DataTypes. * Deleted RefFullyConnectedFloat32Workload and RefFullyConnected2dUint8Workload. Change-Id: Iad30fb0287ab7491e1297997e7d61f1d00785541 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-05-23IVGCVSW-3073 Refactor reference DepthwiseConvolution2d workloadsRuomei Yan
Change-Id: I3cf8d9dbc4f8c95e0e2311505dd7e9f9069f1ab5 Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>