aboutsummaryrefslogtreecommitdiff
path: root/src/backends/reference/workloads/CMakeLists.txt
AgeCommit message (Collapse)Author
2021-08-10MLCE-530 Add support for UnidirectionalSequenceLstm to RefWorkloadexperimental/daves_custom_allocator_dmabufNarumol Prangnawarat
* Add implementation of IsUnidirectionalSequenceLstmSupported to RefLayerSupport * Add RefUnidirectionalSequenceLstmWorkload * Refactor Lstm to be able to use for Lstm and SequenceLstm * Unit tests Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ibc066d213213a11b955dfefbe518de643298ba0c
2021-06-16MLCE-510 Add CpuRef Shape Operator to ArmNNKeith Davis
* Add front end * Add reference workload * Serialization/Deserialization * Add unit tests * Update ArmNN Versioning Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I6fcb1fa341d6f08dea4003b13544e6e9f53fefd3
2021-06-16IVGCVSW-6088 Add Sin and Log to ElementWiseUnaryTeresa Charlin
* Ref workload * Cl workload * Neon workload * Serializer * Deserializer * Remove boost include from TensorTest.cpp Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf
2021-04-12IVGCVSW-5410 Add front-end support for CASTmathad01
IVGCVSW-5415 Add TfLiteParser support for CAST * Added front end support for CAST, including support in the Reference workload, Serialization, Deserializtion, Unit tests, and TfLiteParser. Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: Iaf670ca5912a21ed6bc84f7f83a68b42154846bb
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
This patch addes ReduceSum operation support for reference backend, which computes the sum of elements across dimensions of a tensor. Changelog v1: - Fix file header descriptions. Chagelog v2: - Fix line limit issue. - Fix type conversion issue. Changelog v3: - Remove tabs. - Modify newly added file headers. Changelog v4: - Symbol on header isn't allowed so drop it from newly added file headers. Changelog v5: - Remove tabs, fix the use of brackets and align lines correctly. Changelog v6: - Add serializer and deserializer support. Changelog v7: - Fix build error add missed code. Changelog v8: - Rename ReduceSumDecriptor to ReduceDescriptor - Update m_KeepDims field data type to bool on ReduceDescriptor - Add ReduceOperation field to ReduceDescriptor - Rename ReduceSumLayer to ReduceLayer - Update ReduceLayer to use ReduceDescriptor - Update ReduceLayer::ValidateTensorShapesFromInputs() function - Rename RefReduceSumWokload to RefReduceWorkload - Update workload to use ReduceDescriptor - Update workload to use Decoders and Encoders - Remove ReduceSum.hpp and ReduceSum.cpp - Added Reduce.hpp and Reduce.cpp - Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp - Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument - Remove Mean.hpp and Mean.cpp - Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation - Update Serializer and Deserializer for serializing/parsing ReduceLayer - Added TfLiter parser Sum test for REDUCE_SUM operator - Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator Changelog v9: - Fixed build errors. Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195 Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
2020-11-09IVGCVSW-5091 Add Logical ops frontend and ref implJames Conroy
* Add frontend and reference implementation for logical ops NOT, AND, OR. * Unary NOT uses existing ElementwiseUnary layer and ElementwiseUnary descriptor. * Binary AND/OR uses new layer LogicalBinary and new LogicalBinary descriptor. * Add serialization/deserializion support and add missing ElementwiseUnary deserializer code. * Add additional Boolean decoder in BaseIterator.hpp. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id343b01174053a166de1b98b6175e04a5065f720
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
This patch adds int32 and int64 ArgMax op support. Current ARMNN already has ArgMax op but not used, and it doesn't support int64 output type. So this patch adds a new type, Signed64, and also adds ArgMinMax computation function for int64 type support. In default, output tensor type of ArgMax op is int64 in case of tensorflow lite model so this patch makes a proper function - ArgMax op for int64 or int32 - to be called according to parsed output_type value. With this patch, ARMNN supports both types - int64 and int32 - for ArgMinMax op. Changelog v1: - Check if output data type of ArgMinMax op is valid or not. - Use template function to support int32 and int64 types of ArgMinMax function. - Keep using Signed32 as default data type of m_Output_Type. Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14 Signed-off-by: Inki Dae <inki.dae@samsung.com>
2020-07-06IVGCVSW-4624 Add a RANK Reference ImplementationFinn Williams
* Add Rank front end * Add Rank reference implementation * Add Rank serialization support * Add Scalar serialization support Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I06e4a468c2a84e79bae2e6c5348596bbbf853b4b
2020-06-15IVGCVSW-4620 Add Fill Reference ImplementationRyan OShea
* Add Fill Reference Implementation * Refactor FP converter to use static_cast Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com> Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I532e2f982981d047690755fac43a0e9cf8b17dcd
2020-05-15IVGCVSW-4831 Fix Packet header includes in backendsFinn Williams
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Iedfcf0ef487bd7836b1bc4ba8a0e4337dc4da391
2020-05-02IVGCVSW-4449 Add QLstm ref implementationJames Conroy
* Adds ref implemenation for new HAL 1.3 operator, QLstm. * Adds Layer and CreateWorkload unit tests. * Adds WorkloadData validate for QLstm. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I8a721f07ff06105e6495a1a0561b9503aa8146dc
2020-03-19IVGCVSW-4516 Add ConvertFp32ToBf16Layer and Ref workload supportNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9099a4f840fb747336f77d20a0868b64e801a310
2020-03-17IVGCVSW-4515 Add ConvertBf16ToFp32Layer and Ref workload supportNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: Ida6d7e1d2c9abe0618f8b711bab9d62c011090d6
2020-03-02IVGCVSW-4375 Add support for TransposeMike Kelly
* Added TransposeLayer * Added CL, Neon and Ref Workloads * Added Transpose utilities * Added Serializer and Deserializer support * Added Quantizer support Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I04c755ba7cb5b1edf72b3c9f3c0314878032e3c7
2020-01-23IVGCVSW-4259 Add frontend and reference workload for UnaryOperationLayerjosh minor
* Added new layer named ElementwiseUnary * Deprecated existing Abs/Rsqrt layer functions * Updated existing Abs/Rsqrt test infrastructure to use new layer * Added boilerplate for new Exp,Neg,Sqrt elemwise op layers * AbsQuantize test removed pending future commit * Serialization support added !android-nn-driver:2550 Change-Id: Ic595c645925e17b45db568187fd05646daf2e87f Signed-off-by: josh minor <josh.minor@arm.com>
2019-11-19IVGCVSW-4068 Add Guid to WorkloadNarumol Prangnawarat
* Add Guid to Workload * Remove circular dependency Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Signed-off-by: janeil01 <jan.eilers@arm.com> Change-Id: I15342fa7481c6bdc050e057dce2d74bba07fe2dd
2019-11-04Add fp16 support for dequantizeJan Eilers
* Changed RefDequantizeWorkload to use Encoder/Decoder * Added related unit tests for Cl, Neon and Ref Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ic2fd4103090dd2127c6859b49305736f7b2dfb05
2019-10-21IVGCVSW-3993 Add frontend and reference workload for ComparisonLayerAron Virginas-Tar
* Added frontend for ComparisonLayer * Added RefComparisonWorkload * Deprecated and removed Equal and Greater layers and workloads * Updated tests to ensure backward compatibility Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Id50c880be1b567c531efff919c0c366d0a71cbe9
2019-10-15IVGCVSW-3975 Add reference workload for LOG_SOFTMAXAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I10bb7133e0e2d6d7199abdf39562b1226bbbd3e7
2019-10-09IVGCVSW-3888 Add INSTANCE_NORMALIZATION Reference implementationKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I725022f86e990c482ea323fc90fd136fe493ed68
2019-09-24IVGCVSW-3885 Add reference workload for DepthToSpaceAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Id937dc4425884ad1985dcdfaae8bf3fb64f0c766
2019-09-19IVGCVSW-3723 Adding reference workload support for ArgMinMaxNikhil Raj
Change-Id: I65209ecec4e3abf808163239748d6e830568c2e3 Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
2019-09-18IVGCVSW-3878 Add reference workload for SLICEAron Virginas-Tar
* Added reference workload implementation and layer tests for all supported tensor dimensions (1d, 2d, 3d, 4d) Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I40eb300828933e9183027281105d1a7e597d1569
2019-09-16IVGCVSW-3694 Add ArgMinMax implementation for RefNarumol Prangnawarat
* Add ArgMinMax implementation * Add utility function to get number of elements between axis * Add utility function to get unsigned axis * Unit tests for ArgMinMax function Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I7bc3d610dda9526190187eb87394a8ed7a4b5cdd
2019-09-06IVGCVSW-3740 Add Reference Workload support for ABSSadik Armagan
* Implemented RefAbsWorkload and unit tests Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Ibfcdb2b37fd8d240c181f96856e2c997a4b88914
2019-07-17IVGCVSW-3419 Add reference workload support for the new Stack layerMatthew Jackson
* Added reference workload for the Stack layer * Added factory methods * Added validation support * Added unit tests Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: Ib14b72c15f53a2a2ca152afc357ce2aa405ccc88
2019-07-02IVGCVSW-3236 Extend Ref LSTM with layer normalization supportJan Eilers
* Add descriptor values * Update lstm queue descriptor validate function * Update lstm workload * Update isLstmSupported (Cl and Ref), LayerSupportBase, ILayerSupport * Update lstm layer * Add unit tests Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: I932175d550facfb342325051eaa7bd2084ebdc18 Signed-off-by: Jan Eilers <jan.eilers@arm.com>
2019-07-01IVGCVSW-3365 Add reference workload support for ResizeLayerTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Id551690065dca0686ce597d1f0c14fd73163481e
2019-06-27IVGCVSW-3320 Add reference workload support for TransposeConvolution2dLayerAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: Icc64f8148c9d8a0d14d772e6e4e7865e70585cd9
2019-06-20IVGCVSW-3248 Refactor reference BatchToSpace workloadFrancis Murtagh
* Add Decoders and Encoders to workload to make it data type agnostic * Merge float32 and Uint8 into single workload Change-Id: I8adfa1898a63f13889eaaf55a31c26fd1e2d7ee8 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-06-19IVGCVSW-3231 Add reference workload support for SpaceToDepthKeith Davis
* Added reference workload for SpaceToDepth * Added unit tests for float32 & uint8 * Minor sort refactoring to RefWorkloads.hpp to alphabetical order Change-Id: I2e01f8101650e2aae102a8a32bc0064f067141ab Signed-off-by: Keith Davis <keith.davis@arm.com>
2019-06-19IVGCVSW-3268 Add Reference workload support for the new Prelu Activation layerMatteo Martincigh
* Added reference workload for the PReLU Activation layer * Added factory methods * Added validation support * Added Int16 support * Added unit tests Change-Id: Ic950d908c5e0a335dccd2960a3ffab0f8b599876 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-17IVGCVSW-3221 Refactor Mean ref workload and testsJames Conroy
* Renamed RefMeanFloat32Workload and RefMeanUint8Workload to RefMeanWorkload, updated references to reflect this change. * Refactored RefFloorWorkload to use Decoders/Encoders, to support the use of multiple data types. * Deleted reference Unit8 Mean tests as they were duplicates of the Float32 tests. Refactored these tests to support multiple data types and updated references. * Adjusted the values used in the tests' input tensors so that they are more like floating point numbers e.g. change 1.0f to 1.5f. * Replace size_t with unsigned int in Mean ref workload, for better compatibility with the Encoder/Decoder, removed some unnecessary casts after this. * Added ValidateTensorDataTypesMatch() function to WorkloadData.cpp, added CreateIncorrectDimensionsErrorMsg function to RefLayerSupport.cpp. * Added passing and failing tests for ref IsMeanSupported. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: Id3d44463d1385255c727a497d4026d21a49e7eb2
2019-06-17IVGCVSW-3218 Refactor the Reference Workloads for the ResizeBilinear layerEllen Norris-Thompson
* Refactored ResizeBilinear Reference Workloads to combine Float32 and Uint8 files Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com> Change-Id: I725a830f4c4755a7d3a37ca68e31e44e7eb267cb
2019-06-14IVGCVSW-3229 Refactor L2Normalization workload to support multiple data typesFerran Balaguer
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com> Change-Id: I848056aad4b172d432664633eea000843d85a85d
2019-06-06IVGCVSW-3211 Refactor reference Rsqrt workloadnikraj01
Change-Id: Ia413c6b5352dbb3390e7d84e837a542c24ae8813 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-06-06IVGCVSW-3226 Refactor the reference normalization workloadMatteo Martincigh
* Refactored RefNormalizationFloat32Workload into RefNormalizationWorkload * Added ref support of Uint8 norm workloads * Added workload unit tests for Uint8 Change-Id: I063ce919c267e02a32e739848e49d75fd98a5eb6 Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-06-06IVGCVSW-3142 Refactor reference Pooling2d workloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I94c973ab747309c0214268c9c39f6d8f3fc7b255
2019-06-05IVGCVSW-2971 Support QSymm16 for DetectionPostProcess workloadsAron Virginas-Tar
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I8af45afe851a9ccbf8bce54727147fcd52ac9a1f
2019-06-04IVGCVSW-3212 Refactor the Reference BatchNormalization workloads toMatteo Martincigh
handle Float32 and QAsymm8 types * Removed the type-specific workload implementations * Added type-independent RefBatchNormalizationWorkload implementation * Reworked BachNormImpl to use decoders/encoders * Improved the validation of the BatchNorm queue descriptor * Fixed unit tests where necessary Change-Id: Icf3fa1332292d38ec2fa0b1cb984cab78426034b Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-05-31IVGCVSW-3177 Refactor Floor reference workloadJames Conroy
* Renamed RefFloorFloat32Workload to RefFloorWorkload and updated references to reflect this change. * RefFloorWorkload now uses Decoders/Encoders and supports the use of multiple data types. * Deleted FloorTestImpl.hpp and moved its contents into LayerTests.hpp. Change-Id: Ie079d05f2f6a578172f0fe3024f9607c030bce64 Signed-off-by: James Conroy <james.conroy@arm.com>
2019-05-30IVGCVSW-3159 Support QSymm16 for Splitter workloadsRuomei Yan
Change-Id: I9af5d2d8ade97b9ecd2e6fbf13db9fa3bb622ed8 Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>
2019-05-29IVGCVSW-3168 Refactor reference softmax workload into a single workloadnikraj01
Change-Id: Ie290efcbb9e3a6365cbd630cb2041e7b0f542505 Signed-off-by: nikraj01 <nikhil.raj@arm.com>
2019-05-28IVGCVSW-3119 Rename MergerLayer to ConcatLayerJim Flynn
!android-nn-driver:1210 Change-Id: I940b3b9e421c92bfd55ae996f7bc54ac077f2604 Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2019-05-28IVGCVSW-3145 Refactor Reference Reshape workloadsNina Drozd
* Removed reference reshape workloads for float32 and uint8 * Added RefReshapeWorkload * Added check for supported datatypes for reshape in WorkloadData * Added check for supported datatypes for reshape in RefLayerSupport * Updated CMakeLists.txt * Updated references to reshape workloads Signed-off-by: Nina Drozd <nina.drozd@arm.com> Change-Id: I9941659067b022f8f7686ab0ff14776944dca3e5
2019-05-27IVGCVSW-3134 Refactor FullyConnected workloads into single workloadFrancis Murtagh
* Refactor FullyConnected workloads into single workload. * Refactor FullyConnected ref implementation to use Encoders and Decoders to support all DataTypes. * Deleted RefFullyConnectedFloat32Workload and RefFullyConnected2dUint8Workload. Change-Id: Iad30fb0287ab7491e1297997e7d61f1d00785541 Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
2019-05-23IVGCVSW-3073 Refactor reference DepthwiseConvolution2d workloadsRuomei Yan
Change-Id: I3cf8d9dbc4f8c95e0e2311505dd7e9f9069f1ab5 Signed-off-by: Ruomei Yan <ruomei.yan@arm.com>
2019-05-23IVGCVSW-3025: Refactor reference Convolution2d workloadMike Kelly
* Refactored RefConvolution2dWorkload to support all DataTypes through Encoders and Decoders. * Added Convolute function to ConvImpl that uses Encoders and Decoders to support all DataTypes. * Deleted RefConvolution2dFloat32Workload and RefConvolution2dUint8Workload. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic5ef0f499d08b948fa65fdee54b5f681fd0b1c05
2019-05-17IVGCVSW-3117 Rename RefMergerWorkload to RefConcatWorkloadJim Flynn
Change-Id: Ifeb33db919ef77bf777e114f2d84b88fd595ca2c Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2019-05-16IVGCVSW-2972 Support QSymm16 for MergerJim Flynn
Change-Id: If2289b2d1fc20f4524fcf4620f01ea3a36d727d2 Signed-off-by: Jim Flynn <jim.flynn@arm.com>
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-08 13:40:25 +0000