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2022-06-20IVGCVSW-6873 Import inputs but don't export outputs fails.Colm Donelan
Only one bool is used to indicate whether inputs should be imported. However, its possible for the user to want to import inputs but not export outputs. In addition it's possible for a user to enabled import during optimize but then pass a memory source that does not require import. * Add m_ExportEnabled to INetwork.hpp. * Modify Network::dNetwork to consider both m_ImportEnabled and m_ExportEnabled. * Add ValidateSourcesMatchOptimizedNetwork to LoadedNetwork to validate import options between optimize and network load. * Update the TfLite delegate consider exportEnabled flag in the optimizer. !armnn-internal-tests:425350 Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I776eab81595898e43f91ab40306962eae61329f4
2022-05-23MLCE-825: Give reason when workload unsupported for Non Constant Weights/BiasFrancis Murtagh
* BackendHelper.cpp IsXXXLayerSupported doesn't get as far as Neon/Cl Validate functions where arm_compute::Status is returned. * Conv2d, Depthwise, DilatedDepthwise and FullyConnected * Tidy up if() -> if () * Clean up logic in FullyConnected so that isLayerSupported gets called Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5da1a882f4a2f55e90aa984b2b9548a847cb3a2d
2022-05-18IVGCVSW-6929 Support for models with implicit expandedMike Kelly
dimensions * Added allow-expanded-dims to TFLite parser and ArmNN delegate * If true ArmNN will disregard dimensions with a size of 1 when validating tensor shapes. Tensor sizes must still match. * This allows us to support models where tensors have expanded dimensions (i.e. extra dimensions with a size of 1). * Fixed bug in Network where it assumed that only the first option could be ShapeInferenceMethod. * Fixed bug where m_ShapeInferenceMethod was lost when copying or moving Graphs. * Changed Delegate to pass "infer-output-shape", "allow-expanded-dims" and other BackendOptions through to the Network during construction. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ibe7c5ae6597796fc9164cb07bd372bd7f8f8cacf
2022-05-17IVGCVSW-6126 ConstTensorsAsInput: Conv2d - BackendsCathal Corbett
!android-nn-driver:7477 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ibf633ccccc385bd980934ff829407d21981323ef
2022-05-16IVGCVSW-6124 ConstTensorsAsInput: Conv2d - FrontEndKeith Davis
* Update Front-end and Tools. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Updated Ref. * Fixed resulting Neon / CL tests * Unified optimizers for conv2d ops * Optimizer Fix - Fp32ToBf16 * Partial implementation for ACL backends to fix VTS failures !android-nn-driver:7477 Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I5fb18877f7ee32643e15a9818945356274bb401b
2022-05-13IVGCVSW-6175 Add Pooling3d to NeonRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new NeonPooling3dWorkload header and source files * Add Pooling3d workload to NeonWorkloads.hpp * Add float32 tests for Pooling3d workload * Add Uint8 tests for Cl and NE pooling3d Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic992e1233d1eb8db52df2c8446183df1c907bc4d
2022-05-13IVGCVSW-6260 ConstTensorsAsInput: Fully Connected Cl and Neon support.Cathal Corbett
* IVGCVSW-6940 ConstTensorsAsInput: DepthwiseConvolution2d - Complete Neon and Cl Bug Fix * Bug fix to enable Cl and Neon Backend Compatibility ConstantTensorsAsInputs * Updated Cl and Neon FullyConnected workloads to handle constant weights and bias as inputs rather than reading from member variables. * Prevent non const weights and biases passing CL and NEON validate for Depthwise Convolution. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I0f505ff5998a183152f843d0f6cc74327ba920e7
2022-05-12IVGCVSW-6940 ConstTensorsAsInput: DepthwiseConvolution2d - Complete ACLCathal Corbett
* Added backend specific optimization & test for CpuAcc and GpuAcc: PermuteDepthwiseConv2dWeights Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I600476b2e9c557a39818a574c1091c9d650b21b1
2022-05-10IVGCVSW-6936 Sqrt for CpuRef, CpuAcc and GpuAccTeresa Charlin
* Add Unit Tests * Bug Fix: add Sqrt to Neon and Cl workload factories Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0db1d813a4e7d15431e87e825e6d14e61f5ffb7d
2022-05-09IVGCVSW-6862 Use same datatype for all containers of indices in NeonGatherNdTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6b1c7c1c499dc93aa58fa9f58b64fb664e8bcc56
2022-05-06IVGCVSW-6862 Modify GATHERNd Neon workloadTeresa Charlin
* Add validate for all layers for GatherNd * Fix convert policy for Mul Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0f2bae5107607ba3c02b5546f60dd9623cd95853
2022-05-06IVGCVSW-6936 Add SQRT support to NeonTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I195957541069cb52cdd2c8aead0e4a34498a6f38
2022-05-05IVGCVSW-6127 ConstTensorsAsInput: DepthwiseConvolution2dCathal Corbett
!android-nn-driver:7418 * Update Front-end and Tools. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Change NNDriver to new API. * Updated Ref. * Neon and Cl backend partially completed (Backend.cpp files). * Added dynamic or constant input EndToEnd tests. * Added ConstantTensorAsInputMemeberVariableRedirect Optimization. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ib18b6c10a093042e165e25237dc04a4c67ba82da
2022-05-05IVGCVSW-6862 Add GATHERNd Neon workloadTeresa Charlin
* Changing the test in the delegate to match one of the unit tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I553ca266116ba8ee173fc951ab1ffd2b6eed1428
2022-05-05IVGCVSW-6806 Add Unidirectional Sequence Lstm support to NeonMike Kelly
* Corrected TensorInfo order for IsUnidirectionalSequenceLstmSupported * outputStateOut TensorInfo is not optional. * cellStateOut TensorInfo is not optional. * TensorInfo Order matches other QLSTM/LSTM layers. * Added missing parameters to UnidirectionalSequenceLstmOperator for delegate. * Added quantized UnidirectionalSequenceLstm support to Neon !android-nn-driver:7457 Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I26dde1bb96793dd25eb9081ca5ae5f63752288c4
2022-03-23IVGCVSW-6706 Move headers to profiling/client/includeJim Flynn
!android-nn-driver:7337 Change-Id: Ide401623829cc99fb9b51e9bbce3482ce706a8dd Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2022-03-23IVGCVSW-6839 Unidirectional sequence LSTM test failing in Android SCathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Iba9c260a2177aeb837e3f30ed4ec9db3c368e169
2022-03-03Revert "Revert "IVGCVSW-6267 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Cl"" This reverts commit 79cef69b1ec58f9ce010461eaaad04c896a4fe15. Reason for revert: 22.05 release. Change-Id: Id2ecbf563e8808694fb8605604e8c3c39c29cec2
2022-03-03Revert "Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Neon"" This reverts commit f87b90e4dbb906436cf205a2a19e199bfe9224ed. Reason for revert: 22.02 release. Change-Id: I1ca5a79a8957908f655a6c4e79eefa24c5aec645
2022-02-23IVGCVSW-6700 Disable importing on ClConv2d when datalayout is NCHWDavid Monahan
Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: Ia916219a33535f4c288fa44fdc23961a3e54e788
2022-02-23Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Neon" This reverts commit b0baff73b1574a198e57d46fcd704cedc43cea16. Reason for revert: cannot update ACL pin until 22.02 release. Change-Id: I049a125ba3b6a9b1cd6514ef9dd14d807773ed00
2022-02-23Revert "IVGCVSW-6267 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Cl" This reverts commit ad9171701e6032b3ddf3573f85780bae30c512c6. Reason for revert: cannot update ACL pin until 22.02 release. !ComputeLibrary:7150 Change-Id: Ic19a3c2fe5d6f7e5568174f18ea73684b269f72d
2022-02-22IVGCVSW-6267 Add support of Unidirectional Sequence Lstm fp32/fp16 to ClCathal Corbett
!ComputeLibrary:7150 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I01690e6555978d93c41d09bbe5378683bc925f61
2022-02-21IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 to NeonCathal Corbett
!ComputeLibrary:7150 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I3de48ffc8d08c95a22705e2b68d069791bddae73
2022-02-11Fix unit test where NeonMemoryManager was used instead of RefMemoryManagerMatthew Bentham
Although the Neon and Ref backends can use each other's TensorHandles, their TensorHandleFactories can't use each other's MemoryManagers. Incorrectly passing the NeonMemoryManager to the RefTensorHandleFactory in unit test utility code resulted in an incorrect static_pointer_cast and a warning from the Undefined Behaviour Sanitizer. This change fixes the test code, and replaces use of static_pointer_cast with armnn::PolymorphicPointerDowncast which will check that the cast is legal in debug builds. Also, remove MockWorkloadFactoryHelper.hpp as it is unused. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I2b425e86fccacd7cc5ff186521fc6e53e7e50c77
2022-02-10IVGCVSW-6700 Add override functions to all typed Neon/CL workloadsDavid Monahan
* Neon and CL workloads which inherit from TypedWorkload instead of the BaseWorklod for their backend do not contain the correct ReplaceInputTensorHandle/ReplaceOutputTensorHandle and Reconfigure functions. So they have been added directly. * Removed the Profiling call from ClConvolution2dWorkload::Reconfigure() to avoid a segfault Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: I7b9d1b48fdb17db1662dc03c22acc746340ce73f
2022-02-08Handle optional biases better in Neon/Cl FullyConnected workloadsMatthew Bentham
Use armnn::Optional for optional bias TensorInfos, similar to how it's already done in Convolution etc. Fixes some test failures found using -fsanitize=undefined Change-Id: I7b887e63e2ffab14aeab14415069be738d938ebb Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
2022-02-07IVGCVSW-6635 Move MemCopyTestImpl from acl to armnnTestUtils.Colm Donelan
* Move MemCopyTestImpl.hpp from src/backends/aclCommon/test/ to include/armnnTestutils. * Refactor MemCopyTests in aclCommon, cl and Neon. * Introduce RefMemCopyTests to exercise this utility in x86 builds. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I8824f013d3656658ed0a2904bb79384e3af68641
2022-02-03IVGCVSW-6696 Add Forced Import EndToEnd tests to Ref, Neon, and CLDavid Monahan
* Created EndToEnd tests with Misaligned buffers but import is forced * Added the Aligned Tests from a previous patch to avoid merge conflicts * Previous Aligned EndToEnd test for ref has been added to backendsCommon and is now used for neon as well * Added to Ref, Neon, and Gpu Backends * Neon tests only check for copies as reconfigure has not been implemented for the Neon backend yet Signed-off-by: David Monahan <David.Monahan@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I12ddf5780201044834d6d1bbeebce60a4614efd1
2022-01-31IVGCVSW-6552 Add support of aligned host memoryNarumol Prangnawarat
* Add AllocatedData functions to OutputHandler * Enable import aligned memory in ImportInputs * Enable import aligned memory in ImportOutputs * Allow to import input and output if the memory is aligned * Implement Reconfigure function on ClConvolution2dWorkload * End-to-end test on Ref and Cl to ensure that input and output memory are imported when aligned Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9e5e4c26d1ac2f1d806803ade5f64c6479c51718
2022-01-26IVGCVSW-6685-6686 Modify workloads to extend Neon/Cl BaseWorkloadTeresa Charlin
* Neon workloads to extend NeonBaseWorkload instead of BaseWorkload * Cl workload to extend ClBaseWorkload instead of BaseWorkload Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I8f39a31a89a8865ac4acf18573ab290d548d2864
2022-01-26IVGCVSW-6683-6684 Add ClBaseWorkload and NeonBaseWorkloadTeresa Charlin
* Neon/Cl Activation workloads inherit from Cl/Neon BaseWorkload * Unit Test for ReplaceTensorHandle functions Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I985e34b93a96405735402a6d3b947957afbe2857
2022-01-25IVGCVSW-6678 Register CopyAndImportFactoryPairs to NeonBackend and unit testsNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: If5392020dfd0caa3f09ea2edbaf0f83ec36ab99b
2022-01-24Bugfix: Set removal date for Backend API stability items to 22.11Francis Murtagh
* This is to allow EthosN more time to adjust to new API. Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I7da32a7317827dfa619c74fc8801447e7172e7c8
2022-01-19IVGCVSW-6629 Stabilize the ILayerSupport interface with unified strategy.Cathal Corbett
* New Virtual Function Added. * Implemented in Ref Neon CL with switch statement for all layers. * Deprecate original IsXXXLayerSupported functions. * Ensure Npu not broken with change. Change-Id: Icf61b16beec83d6af1cb287e24ab1e98a6138c8c Signed-off-by: Cathal Corbett <cathal.corbett@arm.com>
2022-01-18IVGCVSW-6641 Stabilize the IWorkloadFactory interface with unified strategyTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ia941be9bf2c15fe56e49a9b9a2bbe943a8152438
2022-01-14IVGCVSW-6633 SubgraphView uses IConnectableLayer rather than Layer in its ↵Francis Murtagh
m_Layers * Added IInputSlot, IOutputSlot and IConnectableLayer to SubgraphView * Deprecated old member functions * Removed deprecated calls in ArmNN * Added GetOwningIConnectableLayer function to IOutputSlot * Updates ArmNN Core Major version for IOutputSlot ABI break * Updated Minor version of TfliteParser, OnnxParser and Delegate Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: I2a8611bfabf5ae09d3602fe6a4bef166e18117b9
2022-01-13IVGCVSW-6674 Implement CanBeImported function in NeonTensorHandleDavid Monahan
* Added CanBeImported function * Updated existing checks to use the CanBeImported function * Added Unittest Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: I1fe4b9cf2a803d00f35bb16d0e312fd93503dbd8
2021-12-23IVGCVSW-6632 OptimizationViews: has INetwork rather than Graph for holding ↵Cathal Corbett
layers * Deprecate the GetGraph() function in OptimizationViews & remove/fix occurances where OptimizationViews.GetGraph() is called. * OptimizationViews has member INetworkPtr. * OptimizationViews has GetINetwork() method. * Unit test added to OptimizationViewsTests.cpp. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ifc1e53f1c34d786502279631942f0472f401038e
2021-12-15IVGCVSW-6626 Promote backend headers in backendCommon to armnn/backendsColm Donelan
Move the following header files from backendsCommon to armnn/backends. * MemCopyWorkload.hpp * TensorHandle.hpp * Workload.hpp * WorkloadData.hpp * WorkloadFactory.hpp Replace them with forwarding headers and a pragma deprecation message. Resolve the deprecation messages in Arm NN code. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I47f116b30f86e478c9057795bc518c391a8ae514
2021-12-14IVGCVSW-6453 'Move the ArmNN Test Utils code to a physically separate directory'Sadik Armagan
* Created include/armnnTestUtils directory * Moved Arm NN test utils files into armnnTestUtils directory Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I03ac54c645c41c52650c4c03b6a58fb1481fef5d
2021-11-18IVGCVSW-6520 Extend pad workload for CpuAcc to support mirror paddingTeresa Charlin
* Add UnitTest for CpuAcc !ComputeLibrary: 6641 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic96b9e28d133cef73312b4ac793325f5e69b3d4d
2021-11-10Fix typo errors from ticket IVGCVSW-6420Cathal Corbett
* Typo errors from ticket 'Constant flag in tensor info is not set correctly'. Not fixed due to code freeze deadline. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Id80ba60647d1970115a8cf200f0d71e4fada9b30
2021-11-08IVGCVSW-6420: Constant flag in tensor info is not set correctlyCathal Corbett
!android-nn-driver:6532 !armnn-internal-tests:372451 * Made fix to 2 out of 3 ConstTensor() constructors in Tensor.hpp to throw InvalidArgumentException when TensorInfo isConstant parameter is false. * Added new ConstTensor() constructor in Tensor.cpp to accept vector<>.data() using template<typename MemoryType>. * Fixed runtime->GetOutputTensorInfo()/GetInputTensorInfo() methods and called submethods to return TensorInfo& rather than TensorInfo. * Fixed all failing unit tests for CpuRef/CpuAcc/GpuAcc to ensure any ConstTensor created has it's TensorInfo isConstant set to true. * Added unit tests in TensorTest.cpp to ensure ConstTensor constructors throw InvalidArgumentException when TensorInfo isConstat parameter is false. * Added unit test to ensure an empty ConstTensor constructor will set TensorInfo isConatant to true. * Indentation fixes. * Fix to arm_tensor.i to add isConstant parameter to TensorInfo constructor. Added methods IsConstant() and SetConstant(). * Fix to const_tensor.py to throw ValueError when TensorInfo isConstant is set to false when constructing a ConstTensor. * Fixed PyArmnn unit tests to set TensorInfo isConstant to True when ConstTensor is used. * Added unit tests in test_const_tensor.py to ensure ConstTensor constructors throw ValueError when TensorInfo isConstat parameter is false. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I44e440dd0422c366d31bbdbc77ad2b4db0bde148
2021-11-08IVGCVSW-6527 Support the new memory API in loaded networkFinn Williams
* enable external memory management for neon and ref backends * change m_TensorMemoryVector to hold shared pointers * change input layer backend Id to match backend id of connected layer Signed-off-by: Finn Williams <finn.williams@arm.com> Change-Id: I2216a724028312eb101b290df3f224177826b1a0
2021-11-03Bug Fix in CpuAcc and GpuAcc workload: Gather has 2 inputsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifbb9332c78c843c5b937c4e1b50a8f5a75409e73
2021-10-27IVGCVSW-6469 Add MirrorPad FrontEnd and Ref SupportMatthew Sloyan
* Added PaddingMode enum to PaddingDescriptor to enable Symmetric and Reflect padding. * Added Symmetric and Reflect Ref implementation. * Added Serializer & Deserializer support. * Added unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I4bed907b31742b32ccefe5e8ca39a6f1e5bd9dee
2021-10-27IVGCVSW-6170 Add CpuAcc Conv3d WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I3a5bfef5a0085d172fd3689e67f25af909ace2ee
2021-10-19IVGCVSW-6310 Update ICustomAllocator and add GetDefaultAllocator function to ↵Francis Murtagh
backends Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Change-Id: If2879e8a82692285e7fa3f4d09abd608ca28de12
2021-10-13Revert "Disable Sin support in Neon"ryan.oshea3
This reverts commit 89fd793e179bf250c6c390c08dc42760343aa21b. Reason for revert: Issue resolved Change-Id: I3acba62b553c4e7b739167c8ef4a6abc6936adf8
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