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2022-06-10IVGCVSW-6986 SLTS Failures due to Caching commitsCathal Corbett
* Fix made to experimental/armnn_shim_sl branch also required for armnn master branch. * TestGenerated/GeneratedTests.Sync/argmax_1 fix. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Idb0324ff59e1ed13caf5f4bf899d1d3220d823d4
2022-05-23MLCE-825: Give reason when workload unsupported for Non Constant Weights/BiasFrancis Murtagh
* BackendHelper.cpp IsXXXLayerSupported doesn't get as far as Neon/Cl Validate functions where arm_compute::Status is returned. * Conv2d, Depthwise, DilatedDepthwise and FullyConnected * Tidy up if() -> if () * Clean up logic in FullyConnected so that isLayerSupported gets called Signed-off-by: Francis Murtagh <francis.murtagh@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5da1a882f4a2f55e90aa984b2b9548a847cb3a2d
2022-05-17IVGCVSW-6126 ConstTensorsAsInput: Conv2d - BackendsCathal Corbett
!android-nn-driver:7477 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ibf633ccccc385bd980934ff829407d21981323ef
2022-05-16IVGCVSW-6124 ConstTensorsAsInput: Conv2d - FrontEndKeith Davis
* Update Front-end and Tools. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Updated Ref. * Fixed resulting Neon / CL tests * Unified optimizers for conv2d ops * Optimizer Fix - Fp32ToBf16 * Partial implementation for ACL backends to fix VTS failures !android-nn-driver:7477 Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I5fb18877f7ee32643e15a9818945356274bb401b
2022-05-13IVGCVSW-6260 ConstTensorsAsInput: Fully Connected Cl and Neon support.Cathal Corbett
* IVGCVSW-6940 ConstTensorsAsInput: DepthwiseConvolution2d - Complete Neon and Cl Bug Fix * Bug fix to enable Cl and Neon Backend Compatibility ConstantTensorsAsInputs * Updated Cl and Neon FullyConnected workloads to handle constant weights and bias as inputs rather than reading from member variables. * Prevent non const weights and biases passing CL and NEON validate for Depthwise Convolution. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I0f505ff5998a183152f843d0f6cc74327ba920e7
2022-05-12IVGCVSW-6940 ConstTensorsAsInput: DepthwiseConvolution2d - Complete ACLCathal Corbett
* Added backend specific optimization & test for CpuAcc and GpuAcc: PermuteDepthwiseConv2dWeights Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I600476b2e9c557a39818a574c1091c9d650b21b1
2022-05-10IVGCVSW-6936 Sqrt for CpuRef, CpuAcc and GpuAccTeresa Charlin
* Add Unit Tests * Bug Fix: add Sqrt to Neon and Cl workload factories Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0db1d813a4e7d15431e87e825e6d14e61f5ffb7d
2022-05-10IVGCVSW-6861 Add GATHERNd CL workloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I8ba7e56062c285c672dcaa9d13be319eb4f1fca6
2022-05-06IVGCVSW-6936 Add SQRT support to CLTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ib90bade63cd0437329c690b09cf719a2e2bd06a4
2022-05-05IVGCVSW-6806 Add Unidirectional Sequence Lstm support to NeonMike Kelly
* Corrected TensorInfo order for IsUnidirectionalSequenceLstmSupported * outputStateOut TensorInfo is not optional. * cellStateOut TensorInfo is not optional. * TensorInfo Order matches other QLSTM/LSTM layers. * Added missing parameters to UnidirectionalSequenceLstmOperator for delegate. * Added quantized UnidirectionalSequenceLstm support to Neon !android-nn-driver:7457 Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I26dde1bb96793dd25eb9081ca5ae5f63752288c4
2022-04-13IVGCVSW-6174 Add Cl Pooling3d WorkloadRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new ClPooling3dWorkload header and source files * Add Pooling3d workload to ClWorkloads.hpp * Add tests for Pooling3d workload * Add Pooling3d build function to ArmComputeTensorUtils Change-Id: Ia270b0fe809a171ed73af14376de8708b346d500 Signed-off-by: Ryan OShea <ryan.oshea3@arm.com>
2022-04-01IVGCVSW-6732 Tests surrounded in '#if defined(ARMNNREF_ENABLED)' in ↵Cathal Corbett
android-nn-driver do not execute. * Change to src/backends/cl/workloads/ClLstmFloatWorkload.cpp fix LstmTests_GpuAcc tests. * Change to src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp & ClConvertFp32ToFp16Workload.hpp fix MeanTests_GpuAcc and Convolution2DTests_1.1 tests. * Added UnitTests to src/backends/cl/test/ClImportTensorHandleTests.cpp to test import on Convert Layers. !android-nn-driver:7264 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I0c46dc4b9c54eca8771ab12ed0302b6224606957
2022-03-23IVGCVSW-6706 Move headers to profiling/client/includeJim Flynn
!android-nn-driver:7337 Change-Id: Ide401623829cc99fb9b51e9bbce3482ce706a8dd Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2022-03-03Revert "Revert "IVGCVSW-6267 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Cl"" This reverts commit 79cef69b1ec58f9ce010461eaaad04c896a4fe15. Reason for revert: 22.05 release. Change-Id: Id2ecbf563e8808694fb8605604e8c3c39c29cec2
2022-03-03Revert "Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Neon"" This reverts commit f87b90e4dbb906436cf205a2a19e199bfe9224ed. Reason for revert: 22.02 release. Change-Id: I1ca5a79a8957908f655a6c4e79eefa24c5aec645
2022-02-23IVGCVSW-6700 Disable importing on ClConv2d when datalayout is NCHWDavid Monahan
Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: Ia916219a33535f4c288fa44fdc23961a3e54e788
2022-02-23Revert "IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Neon" This reverts commit b0baff73b1574a198e57d46fcd704cedc43cea16. Reason for revert: cannot update ACL pin until 22.02 release. Change-Id: I049a125ba3b6a9b1cd6514ef9dd14d807773ed00
2022-02-23Revert "IVGCVSW-6267 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Cl" This reverts commit ad9171701e6032b3ddf3573f85780bae30c512c6. Reason for revert: cannot update ACL pin until 22.02 release. !ComputeLibrary:7150 Change-Id: Ic19a3c2fe5d6f7e5568174f18ea73684b269f72d
2022-02-22IVGCVSW-6267 Add support of Unidirectional Sequence Lstm fp32/fp16 to ClCathal Corbett
!ComputeLibrary:7150 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I01690e6555978d93c41d09bbe5378683bc925f61
2022-02-21IVGCVSW-6268 Add support of Unidirectional Sequence Lstm fp32/fp16 to NeonCathal Corbett
!ComputeLibrary:7150 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I3de48ffc8d08c95a22705e2b68d069791bddae73
2022-02-17Add SupportsTensorHandleReplacement implementation to the ClConvert workloadsDavid Monahan
Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: Ie78d84949a4af3d9598ab0c1c035688bd39bb806
2022-02-16Refactor Forced ImportFinn Williams
* Find and replace all workloads associated with imported IO * Only attempt tensorhandle replacement if supported by all workloads * Add new RefBaseWorkload to enable forced input for ref backend * Store imported tensorhandles in preImportedTensorhandles instead of outputHandles * Create pre-imported tensorhandles at network load-time * Front load import workload validation to load network time * Only call ReplaceTensorHandle when needed Change-Id: I3816a71b7f57ae90388bb16462a75d4ef3544fa7 Signed-off-by: Finn Williams <finn.williams@arm.com>
2022-02-14Add implementation of reconfigure function to Cl Convert workloadsJim Flynn
Change-Id: Id993a300847bde012dd38ef7f44fcd3c14867349 Signed-off-by: Jim Flynn <jim.flynn@arm.com> Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
2022-02-10IVGCVSW-6700 Add override functions to all typed Neon/CL workloadsDavid Monahan
* Neon and CL workloads which inherit from TypedWorkload instead of the BaseWorklod for their backend do not contain the correct ReplaceInputTensorHandle/ReplaceOutputTensorHandle and Reconfigure functions. So they have been added directly. * Removed the Profiling call from ClConvolution2dWorkload::Reconfigure() to avoid a segfault Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: I7b9d1b48fdb17db1662dc03c22acc746340ce73f
2022-02-08Handle optional biases better in Neon/Cl FullyConnected workloadsMatthew Bentham
Use armnn::Optional for optional bias TensorInfos, similar to how it's already done in Convolution etc. Fixes some test failures found using -fsanitize=undefined Change-Id: I7b887e63e2ffab14aeab14415069be738d938ebb Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
2022-01-31IVGCVSW-6552 Add support of aligned host memoryNarumol Prangnawarat
* Add AllocatedData functions to OutputHandler * Enable import aligned memory in ImportInputs * Enable import aligned memory in ImportOutputs * Allow to import input and output if the memory is aligned * Implement Reconfigure function on ClConvolution2dWorkload * End-to-end test on Ref and Cl to ensure that input and output memory are imported when aligned Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I9e5e4c26d1ac2f1d806803ade5f64c6479c51718
2022-01-26IVGCVSW-6685-6686 Modify workloads to extend Neon/Cl BaseWorkloadTeresa Charlin
* Neon workloads to extend NeonBaseWorkload instead of BaseWorkload * Cl workload to extend ClBaseWorkload instead of BaseWorkload Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I8f39a31a89a8865ac4acf18573ab290d548d2864
2022-01-26IVGCVSW-6683-6684 Add ClBaseWorkload and NeonBaseWorkloadTeresa Charlin
* Neon/Cl Activation workloads inherit from Cl/Neon BaseWorkload * Unit Test for ReplaceTensorHandle functions Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I985e34b93a96405735402a6d3b947957afbe2857
2021-12-15IVGCVSW-6626 Promote backend headers in backendCommon to armnn/backendsColm Donelan
Move the following header files from backendsCommon to armnn/backends. * MemCopyWorkload.hpp * TensorHandle.hpp * Workload.hpp * WorkloadData.hpp * WorkloadFactory.hpp Replace them with forwarding headers and a pragma deprecation message. Resolve the deprecation messages in Arm NN code. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I47f116b30f86e478c9057795bc518c391a8ae514
2021-11-15IVGCVSW-6519 Extend pad workload for GpuAcc to support mirror paddingTeresa Charlin
* Add UnitTest for GpuAcc Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I235900dc62fb043c5ce9c8cd4f63dcc4e5393233
2021-11-03Bug Fix in CpuAcc and GpuAcc workload: Gather has 2 inputsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifbb9332c78c843c5b937c4e1b50a8f5a75409e73
2021-11-01IVGCVSW-6440 Add profiling around CL workload configure callsKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I7626d5bd82e832d5be6913719a34d76fbd1dbed8
2021-10-27IVGCVSW-6469 Add MirrorPad FrontEnd and Ref SupportMatthew Sloyan
* Added PaddingMode enum to PaddingDescriptor to enable Symmetric and Reflect padding. * Added Symmetric and Reflect Ref implementation. * Added Serializer & Deserializer support. * Added unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I4bed907b31742b32ccefe5e8ca39a6f1e5bd9dee
2021-10-27IVGCVSW-6169 Add GpuAcc Conv3d WorkloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I8b73dccc14ef71cc083896102e24afb2e56e72e2
2021-10-22IVGCVSW-6440 Print new Optimize and LoadedNetwork profiling pointsKevin May
* Add parent LoadedNetwork profiling point * Make generic populateParent function to print new descendents in json Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I41dc876bffae88e61a16d07fb13b062c321e78a6
2021-10-02IVGCVSW-5985 Remove deprecated codeJan Eilers
* Removes deprecated AddLayer, IsLayerSupported functions * Marks the whole LayerVisitor class as deprecated not just the constructor. This required to wrap all Accept functions in a no deprecate macro because the LayerVisitor is used as a parameter in there * Removes usage of deprecated LayerVisitor and replaces it with ExecuteStrategy. This required a few structural changes in the unit tests * Adds a default implementation for IStrategy called StrategyBase * Changes pyarmnn to use non deprecated constructor for INetworkProperties and adds related unit test * Marks usage of deprecated code in pyarmnn as deprecated. This required to extend INetworkProperties to allow backwards compatibility * Removes deprecated functions from CpuAcc, GpuAcc and Ref backends Note: This patch breaks compatibility with backends that are not updated in this patch !android-nn-driver:6325 Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Id13b6f37a74d26eadeda2da1dc92915e725ed5a5
2021-09-28IVGCVSW-3706 Add Channel Shuffle Workload to GpuAcc backendTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ic37fc49a97a5ca570a23bc415d15ee3841534336
2021-09-15Fix incorrect string name for workload constructKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I0334a772c1453a1d568f27cddea9d0effff8a0a0
2021-08-10IVGCVSW-6249 Add ProfilingDetails Macros to all workloads in CLKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I92dd410da7ad633a46d025fdc2b26093041c439b
2021-08-05IVGCVSW-5980 Add Descriptor, TensorInfo and Convolution algorithm to JSONKeith Davis
* Add GUID as field to layer details and profiling events * Add Optional GUID param to existing tests * Improve Details macro to be inline function * Fix some formatting Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I66f192a90a7642b3ee8e7dda0d3f428cce002581
2021-08-04IVGCVSW-5980 JSON profiling outputKeith Davis
* Add new ProfilingDetails class to construct operator details string * Add new macro which helps append layer details to ostream * Add ProfilingEnabled to NetworkProperties so that profiling can be realised when loading the network * Add further optional info to WorkloadInfo specific to convolutions * Generalise some JsonPrinter functions into JsonUtils for reusability * Remove explicit enabling of profiling within InferenceModel as it is done when loading network * Add ProfilingDetails macros to ConvolutionWorkloads for validation Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Ie84bc7dc667e72e6bcb635544f9ead7af1765690
2021-06-16Fix compilation failure in CL Master nightlyNikhil Raj
* This failure is caused by a patch from ACL side https://review.mlplatform.org/c/ml/ComputeLibrary/+/5769 * Update acl pin to 08302c17cd57356b35d46e17dc8d8f76672da5cf Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Change-Id: Ic282efe87dc417c83034a5c9b94bc77717abc003
2021-06-16IVGCVSW-6088 Add Sin and Log to ElementWiseUnaryTeresa Charlin
* Ref workload * Cl workload * Neon workload * Serializer * Deserializer * Remove boost include from TensorTest.cpp Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I498548169cc77609c55cf3105f1de5a7429772cf
2021-06-16IVGCVSW-5826 Change weights layout for depthwise to [1,H,W,I*M]Jan Eilers
* This change is necessary because tflite uses a [1,H,W,I*M] format and uses the I*M dimension for per axis quantization. Our previous layout [M,I,H,W] can't handle the correlating quantization scales. * Updates Onnx-, TfLiteParser and TfliteDelegate * Updates the CpuRef, CpuAcc and GpuAcc backends * Adjusts unit tests * Adds test to ensure models with old layout can still be read and executed * Adds conversion function to previous layout [1,H,W,I*M] --> [M,I,H,W] which can be used by backend developers !android-nn-driver:5553 Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ifef23368b8c3702cf315a5838d214f7dc13c0152
2021-05-25IVGCVSW-6072 NeonReduceWorkloadValidate not declared in ↵Matthew Sloyan
IS_MULTI_AXES_REDUCE_SUPPORTED * The wrong validate function was being called in ClReduceWorkload.cpp. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I534f5fffa5d77ae5bd804ae8326f5d78de37275b
2021-05-20MLCE-418 Reduce layer does not support multiple axesMatthew Sloyan
* Added backend specific optimization to chain new reduces layers for each axis to simulate behaviour of a layer with multiple axes. * Added function to calculate reduced output shape. * Added unit tests. * Includes rework to fix IVGCVSW-5987. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I154b3698b5e6756b05b2a0b5a3f0896184efce72
2021-05-07Revert "MLCE-418 Reduce layer does not support multiple axes"Matthew Sloyan
This reverts commit d905decd256558bbee165e636ce4242ac3b9c917. Reason for revert: LargeGraph_TENSOR_FLOAT32/FLOAT16 CTS tests failures Change-Id: Ie69826549e73775825f45134375b5b2c41aebd01
2021-05-06MLCE-418 Reduce layer does not support multiple axesMatthew Sloyan
* Added backend specific optimization to chain new reduces layers for each axis to simulate behaviour of a layer with multiple axes. * Added function to calculate reduced output shape. * Added unit tests. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I180b0b111b7bcf3d0c283f1db0b82d5f17757682
2021-05-06IVGCVSW-5815 Generalise ConstCpuTensorHandleJames Conroy
* Generalises ConstCpuTensorHandle and inherited classes by removing 'Cpu' from aliases. * New renamed classes: ConstTensorHandle, TensorHandle, ScopedTensorHandle, PassthroughTensorHandle, ConstPassthroughTensorHandle. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I1824e0e134202735fb77051f20a7252f161dfe16
2021-04-22IVGCVSW-5420 'Add CL support for CAST'Sadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I1bbf1f2edf7282cb69b99e22de1b8a2fe6e443c2
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