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2024-02-09IVGCVSW-7569 GpuFsa Op: Add Reshape OperatorDeclan-ARM
* Add Reshape EndToEnd tests to all backends Signed-off-by: Declan-ARM <decmce01@arm.com> Change-Id: Ic6d07ba8de0cf3271ed0e4c6d604e070ccb968e3
2024-02-08Add and tidy up activation and elementwise binary end to end testsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I9714c4c57e923ac775dcde2951de07cea35c40ee
2024-02-07IVGCVSW-7623: GpuFsa Op: Add Pool2d operatorTeresa Charlin
* Add Pool2d EndToEnd tests to all backends * Add utility functions for the attributes in a separate file * Remove some unnecessary includes Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0f82ebbf7b3301c6368462fb4fb4d4d02b246fc6
2024-01-31IVGCVSW-7568 Implement Sub ElementwiseBinary operator GpuFsaJohn Mcloughlin
* Added support for Gpu Sub operator * Added unit tests Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: I1efaa485772a3716e3781566843bd50bd9bab811
2024-01-30IVGCVSW-7550 GpuFsa Op: Add ElementWiseBinary Operator ADDTracy Narine
* Adding support for Gpu Add operator * Added tests for layer support, end to end and optimization Signed-off-by: Tracy Narine <tracy.narine@arm.com> Change-Id: Ie9328d269c5c0ff60a7e10133b728ac9265033af
2024-01-02Fix for Resize with align corners = true creates a memory leak when using ↵Teresa Charlin
valgrind * Add end to end unit test to CpuRef, CpuAcc and GpuAcc backends Resolves: IVGCVSW-8193 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7be226f084ec814ac72c2c9b3c47c07b3baf0aa5
2023-12-20IVGCVSW-7830 Remove Reshape where possibleMike Kelly
* Remove reshape on ClBackend * Remove unnecessary restriction on NeonBackend remove Reshape Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I79940c9f8609d19b79f2fbe55225ffc8f0d90c25
2023-11-10IVGCVSW-7835 Add ReverseV2 CL and Neon WorkloadsTianle Cheng
* Added ReverseV2 to CL and Neon backends * Added Cl and Neon ReverseV2 Layer unit tests Signed-off-by: Tianle Cheng <tianle.cheng@arm.com> Change-Id: I646275c629caf17dac1950b0cd7083f23f87f387
2023-09-29IVGCVSW-8055 Add support for GELU activation function.Teresa Charlin
* Add support to CpuRef, CpuAcc and GpuAcc * Add support to tflite parser, classic and opaque tflite delegates * Add support to serializer and deserializer * Add Unit tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ibc60ef2ef2a051e6d9af6e15d24c46316ec19de4
2023-08-21IVGCVSW-7964 Fix UnidirectionalSequenceLstmNarumol Prangnawarat
* Fix incorrect batch size and time size * Fix incorrect time major when max time =1 * Fix incorrect permutation * Fix incorrect scratch buffer * Unit tests Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I510fae55528be412a58d020e82bd283852e7800b
2023-08-04IVGCVSW-2291 TILE Operator CL ImplementationCian McGriskin
* Added Tile Operator Implementation to CL * Added calls to the existing UnitTests * Added Documentation Signed-off-by: Cian McGriskin <cian.mcgriskin@arm.com> Change-Id: If7d25c7aa669c24e7816e5d445c7a3b9ce6972d4
2023-08-02IVGCVSW-7880 Add check for FP16 backend supportRyan OShea
* Check if preferred backends have FP16 support before enable fp16-turbo-mode * Unit tests * Replaced global gpuAccCapabilities with getter method construction * Replaced deprecated function call in SL shim Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: If29b62b330ca8987de8acf6408db11daf25ca0b5
2023-08-01Enable Slice EndToEndTests in all backends and Signed32 in CpuRefRyan OShea
* Enable SliceEndToEnd tests on CpuRef, CpuAcc, GpuAcc * Enable Signed32 support for slice in CpuRefLayerSupport Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ie9907c65dcb0eb2f2f346b22541ebfc692a109cb
2023-07-14IVGCVSW-7830 Add backend optimizations to remove Reshapes where possibleMike Kelly
* Added optimization to remove reshapes for Neon and Ref Backends by using overridden TensorInfos * Added ability to delete Subgraphs during Optimization * Fixed naming error in NeonEndToEndTests and CLEndToEndTests * Added LayerNameAndTypeCheck for testing. * Fixed error where layers were not marked as altered when removed in CLBackend Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I1ac25cd4ec9821470d961831ae2c8d24882276cc
2023-07-10IVGCVSW-7785 3D tensors in BATCH_TO_SPACE and SPACE_TO_BATCH in CpuAcc & GpuAccTeresa Charlin
* Add Reshape layers before and after to extend support for 3D tensors, as ACL only supports 4D tensors for those layers * Add Unit Tests Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I4431185ce3a3b2f595d2a79bdda7095212d1c52d
2023-05-18IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE to CpuAcc and GpuAccJohn Mcloughlin
* Add POW SQUARED_DIFFERENCE and Unit tests for CpuAcc and GpuAcc Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ifa78af2a2fda2074586d8e4d9a506b1b13fa5755
2023-05-09IVGCVSW-5846 Remove TODO statements from Armnn CodeDavid Monahan
* Removed all instances of TODO statements from comments * Removed statements are noted as part of IVGCVSW-5846 * Removed ProtoxtFixture.cpp from the Onnx Parser tests as it's not used Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: Ia0a15f8a0d4123c8831638634eaa0d1018c40e2c
2023-05-08IVGCVSW-7454 Enable NonConstWeights in GpuAccTeresa Charlin
* Set flag for constant weights and bias in ACL tensorInfo in ACl workloads * Set flag for constant weights and bias in Unit Tests * Add to dot file for FullyConnected layer the constantWeights flag Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I87e1fef516ce4a8a59245dfdf7d92c153418e1d6
2023-05-08IVGCVSW-7308 Add GpuAcc Batch MatMul workloadTeresa Charlin
* Call dedicated MatMul kernel in ACL * Add int8 tests * Add int8 to documentation * Force tensors to be dynamic (nonConst) as per request of ACL Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I7b7ac20deec8637dc46ca990d339d92c4587cbe4
2023-04-12IVGCVSW-7197 Implement Pimpl Idiom for OptimizerOptionsJohn Mcloughlin
Signed-off-by: John Mcloughlin <john.mcloughlin@arm.com> Change-Id: Id4bdc31e3e6f18ccaef232c29a2d2825c915b21c
2023-04-11IVGCVSW-7507 Pass m_Crops in BatchToSpaceND CpuAcc and GpuAcc workloadsTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I902c9187eefe7595271312fdc16273f7aa3d41cd
2023-04-04Remove GetGraph and include of Graph.hpp header from public headerMatthew Bentham
Remove deprecated GetGraph() from OptimizationViews. This method has been deprecated for a long time and no backends still need it. Remove include of Graph.hpp from the public headers. Add includes elsewhere to deal with the header fallout. Signed-off-by: Matthew Bentham <matthew.bentham@arm.com> Change-Id: I8dae275a8a446d9d0e19be62684e9b3cd2fa493d
2023-03-14IVGCVSW-3808 Add ElementwiseBinaryLayerMike Kelly
!android-nn-driver:9329 * Added ElementwiseBinaryLayer that can represent all ElementwiseBinary operations including Add, Div, Sub, Maximum, Mul and Minimum. * Updated Delegate to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated Deserializer to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated OnnxParser to use ElementwiseBinaryLayer instead of the Add layer. * Updated TfLiteParser to use ElementwiseBinaryLayer instead of the Add, Div, Sub, Maximum, Mul and Minimum layers. * Updated CL and Neon tests to use ElementwiseBinaryLayer. * Updated CL and Neon Backend Specific Optimizations to accept ElementBinaryLayers as well as Add, Div, Mul, Sub, Maximum and Minimum layers. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I7cbb96b60eb01f0e2b57b0541016d48a08b86c75
2023-01-24IVGCVSW-7455 Workaround to allow CLBatchMatMul to parse some 4D modelsMike Kelly
* Added ability to reduce dimension sizes when calling BuildArmComputeTensorInfo or BuildArmComputeTensorShapes, this will attempt to remove leading 1s in order to squeeze the number of dimensions but retain the size. * Changed ClBatchMatMulWorkload to attempt to squeeze the number of dimensions to 3 as the CL Gemm Kernel can only support up to 3 dimensions. Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I6b3d0886c5b97fdb686838fc3dc292833ddc4643
2023-01-13IVGCVSW-7173 Add Rsqrt to Tosa Ref BackendDavid Monahan
* Added ElementwiseUnary support with a mapping for Rsqrt * Added unittests * Added Rsqrt EndtoEnd tests for all backends * Changed TosaRefLayerSupport to default to false on unsupported layers Signed-off-by: David Monahan <david.monahan@arm.com> Change-Id: I3eaa9c684647ead61520a563815581aa68bee51b
2023-01-12IVGCVSW-5128 Add EndToEnd test for REDUCE_SUMTeresa Charlin
* Call Reshape EndToEnd test from 3 backends * Tidy up some naming of tests. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I5546af35e89d352d3f1529368518aecc0a4a534b
2023-01-11Move tuning and IClTensorHandle code from cl to aclCommon backend.Cathal Corbett
* Required to enable easier future merging and rebase into experimental/GpuFsa as part of IVGCVSW-7380. Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I066dcf00523ff430a0908666e452548ab848bd86
2023-01-09IVGCVSW-6493 Add GpuAcc Batch MatMul workload Fp32Teresa Charlin
* GpuAcc only supports up to 3D, so no 4D test have been added Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: Ie926cd45c350be624cbdc6cb27c89d2d3f60884b
2022-12-12IVGCVSW-7209 Remove deprecated code due to be removed in 23.02Mike Kelly
* Removed weights and bias from Convolution, DepthwiseConv & FullyConnected layers * Removed the weight and bias ConstTensorHandles from the QueueDescriptors * Updated Workloads to take tensors from WorkloadInfo rather than the QueueDescriptors * Removed unused RedirectMembersToConstantInputs optimization and tests. Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: I9ffcdc4a1c0dff725539dd69fc435b700bd98a56
2022-12-07IVGCVSW-6853 Rewrite BuildArmComputePermutationVector()Teresa Charlin
* Some pemutation vectors were not converted correctly. * Add Transpose end to end test. * Comments added with an example to clarify the differences betweeen Transpose and Permute Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I6c0954ca6ce00ef5f2a6f3625abe6f4fd27b5cdf
2022-11-09IVGCVSW-7318 Support basic addition model in the TOSA Reference BackendRyan OShea
* Create Simple Addition EndtoEnd test * Create EndToEndTest file in TosaRef/test directory * Add AdditionEndToEnd test to CpuRef,CpuAcc,GpuAcc,TosaRef Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic44e2b457c25dcb41bb3b17c05cce0e74bf17a80
2022-07-27IVGCVSW-6896 Fix pre-import when using sync execute.Colm Donelan
* Refactor backend capability checks in LoadedNetwork. * ImportInputs should check the number of tensors does not exceed the number of inputs. * In EnqueueWorkload the check for for the count of input tensors was ignoring pre-imported inputs. * Added checks to verify ImportInputs/ImportOutputs worked as expected in EndToEndTestImpl. * Improve documentation on ImportInputs/ImportOutputs in IRuntime.hpp. * Disabled import tests in CL and Neon EndToEndTests that cannot work. Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: Iae4b2644a1c9f01ee72bce1afb211661cc9ae2e3
2022-06-22Revert "Revert "IVGCVSW-6873 Import inputs but don't export outputs fails.""Francis Murtagh
This reverts commit a0f8b15d4ddb5075f380003ff31b271d389d3b66. Reason for revert: <Test ClDmaBufInternalTests review > Change-Id: Ibc4a77fa008643849da7330391942e4c87b941e2
2022-06-21Revert "IVGCVSW-6873 Import inputs but don't export outputs fails."James Conroy
This reverts commit 03bf98a8bc51ad20eef4b9ca5fbf6ce15e063721. Reason for revert: Caused failures in tests located in internal repo. Change-Id: If35cb0ede349b270e4e7827324382e09455d8cfa
2022-06-20IVGCVSW-6873 Import inputs but don't export outputs fails.Colm Donelan
Only one bool is used to indicate whether inputs should be imported. However, its possible for the user to want to import inputs but not export outputs. In addition it's possible for a user to enabled import during optimize but then pass a memory source that does not require import. * Add m_ExportEnabled to INetwork.hpp. * Modify Network::dNetwork to consider both m_ImportEnabled and m_ExportEnabled. * Add ValidateSourcesMatchOptimizedNetwork to LoadedNetwork to validate import options between optimize and network load. * Update the TfLite delegate consider exportEnabled flag in the optimizer. !armnn-internal-tests:425350 Signed-off-by: Colm Donelan <colm.donelan@arm.com> Change-Id: I776eab81595898e43f91ab40306962eae61329f4
2022-05-23IVGCVSW-6123 ConstTensorsAsInputs: Conv2dKeith Davis
* Use new INetwork::AddConvolution2dLayer instead of deprecated version * Remove duplicated test in SerlializerTests * Fix some cosmetics Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I3407815bfdc1cdc01ca0a667b8e4d80d8621783f
2022-05-16IVGCVSW-6124 ConstTensorsAsInput: Conv2d - FrontEndKeith Davis
* Update Front-end and Tools. * Updated Serializer, Deserializer and unit tests to reflect this. * Updated TfLiteDelegate, TfLiteParser and OnnxParser. * Updated Ref. * Fixed resulting Neon / CL tests * Unified optimizers for conv2d ops * Optimizer Fix - Fp32ToBf16 * Partial implementation for ACL backends to fix VTS failures !android-nn-driver:7477 Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I5fb18877f7ee32643e15a9818945356274bb401b
2022-05-13IVGCVSW-6175 Add Pooling3d to NeonRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new NeonPooling3dWorkload header and source files * Add Pooling3d workload to NeonWorkloads.hpp * Add float32 tests for Pooling3d workload * Add Uint8 tests for Cl and NE pooling3d Signed-off-by: Ryan OShea <ryan.oshea3@arm.com> Change-Id: Ic992e1233d1eb8db52df2c8446183df1c907bc4d
2022-05-10IVGCVSW-6936 Sqrt for CpuRef, CpuAcc and GpuAccTeresa Charlin
* Add Unit Tests * Bug Fix: add Sqrt to Neon and Cl workload factories Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I0db1d813a4e7d15431e87e825e6d14e61f5ffb7d
2022-05-10IVGCVSW-6861 Add GATHERNd CL workloadTeresa Charlin
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I8ba7e56062c285c672dcaa9d13be319eb4f1fca6
2022-04-13IVGCVSW-6174 Add Cl Pooling3d WorkloadRyan OShea
* Add IsSupported for Pooling3d * Add CreateWorkload case for Pooling3d * Create new ClPooling3dWorkload header and source files * Add Pooling3d workload to ClWorkloads.hpp * Add tests for Pooling3d workload * Add Pooling3d build function to ArmComputeTensorUtils Change-Id: Ia270b0fe809a171ed73af14376de8708b346d500 Signed-off-by: Ryan OShea <ryan.oshea3@arm.com>
2022-04-01IVGCVSW-6732 Tests surrounded in '#if defined(ARMNNREF_ENABLED)' in ↵Cathal Corbett
android-nn-driver do not execute. * Change to src/backends/cl/workloads/ClLstmFloatWorkload.cpp fix LstmTests_GpuAcc tests. * Change to src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp & ClConvertFp32ToFp16Workload.hpp fix MeanTests_GpuAcc and Convolution2DTests_1.1 tests. * Added UnitTests to src/backends/cl/test/ClImportTensorHandleTests.cpp to test import on Convert Layers. !android-nn-driver:7264 Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: I0c46dc4b9c54eca8771ab12ed0302b6224606957
2022-03-23IVGCVSW-6706 Move headers to profiling/client/includeJim Flynn
!android-nn-driver:7337 Change-Id: Ide401623829cc99fb9b51e9bbce3482ce706a8dd Signed-off-by: Jim Flynn <jim.flynn@arm.com>
2022-03-08IVGCVSW-6772 Eliminate armnn/src/backends/backendsCommon/test/MockBackend.hppCathal Corbett
Signed-off-by: Cathal Corbett <cathal.corbett@arm.com> Change-Id: Ie99fe9786eb5e30585f437d0c6362c73688148db
2022-03-08IVGCVSW-6699 Add End-To-End tests to CL to check re-use of allocated dataDavid Monahan
* Added End-To-End tests which check that allocated buffers for Cl can be re-used when going from importing to copy and vice-versa * Change from the first patch: no longer try to align the buffers which are being copied Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: I2c2153a475ca16e4eb1aaa5a95af3423877651aa
2022-03-04Revert "IVGCVSW-6699 Add End-To-End tests to CL to check re-use of allocated ↵David Monahan
data" This reverts commit ae91a5e058da31e912c0768f516b2ef013c3b39e. Reason for revert: There is an intermittent failure which may affect the review jobs. If it becomes a problem merge this and ping Dave :) Change-Id: Ie0d56e4184a525e55cd2ae59042d060bd5609017
2022-03-04IVGCVSW-6699 Add End-To-End tests to CL to check re-use of allocated dataDavid Monahan
* Added End-To-End tests which check that allocated buffers for Cl can be re-used when going from importing to copy and vice-versa Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: Id7e4a4bb68ca9ec1b5e978be6286c5f110436df2
2022-03-03Revert "Revert "IVGCVSW-6267 Add support of Unidirectional Sequence Lstm ↵Cathal Corbett
fp32/fp16 to Cl"" This reverts commit 79cef69b1ec58f9ce010461eaaad04c896a4fe15. Reason for revert: 22.05 release. Change-Id: Id2ecbf563e8808694fb8605604e8c3c39c29cec2
2022-02-23IVGCVSW-6700 Disable importing on ClConv2d when datalayout is NCHWDavid Monahan
Signed-off-by: David Monahan <David.Monahan@arm.com> Change-Id: Ia916219a33535f4c288fa44fdc23961a3e54e788
2022-02-23Revert "IVGCVSW-6267 Add support of Unidirectional Sequence Lstm fp32/fp16 ↵Cathal Corbett
to Cl" This reverts commit ad9171701e6032b3ddf3573f85780bae30c512c6. Reason for revert: cannot update ACL pin until 22.02 release. !ComputeLibrary:7150 Change-Id: Ic19a3c2fe5d6f7e5568174f18ea73684b269f72d
generated by cgit v1.2.1 (git 2.23.0) at 2024-07-10 02:03:46 +0000