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path: root/src/armnnTfLiteParser/TfLiteParser.hpp
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2021-10-27IVGCVSW-6469 Add MirrorPad TfLiteParser and TfLiteDelegate SupportMatthew Sloyan
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ia1c97adb401c5381341408ec1e4da287ef2d48fe
2021-10-07IVGCVSW-6461 Building Arm NN failed after adding Conv3d to TFLiteparserMatthew Sloyan
* Add hash define to Conv3d for backwards compatibility when compiling with TF 2.3.1 Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I70eec3b26430240852938af34b065b32bab91ebe
2021-10-06IVGCVSW-6165 Add Support for Conv3d to TfLiteParserMatthew Sloyan
* Added CONV_3D operator support. * Fixed TfLiteParser test issue where QAsymmU8 tests were incorrectly using the Boolean comparison function. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: I9db03b54b6de63f918717af80c5ac5310fe26183
2021-09-03IVGCVSW-6262 Add support for Reduce ProdTeresa Charlin
* Tflite parser * Tflite delegate * Serializer * Deserializer * Ref, CpuAcc and GpuAcc workloads Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I601a9ee1680b372c7955d9a628857d08c3cfd377
2021-09-02IVGCVSW-6294 Added support for LRN to TfLiteParserMike Kelly
* Added support for LRN to TfLiteParser Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Ia34441a4adeecd1f17c65af047d6c207729703ec
2021-07-21IVGCVSW-6176 Add support for shape_signature in the tflite parserFinn Williams
* tflite shape_signatures will now be the preferred way to detect dynamic tensors * add test utility to the parser that converts a model's tensors to dynamic * by default tests will run a dynamic version of the model in addition to the original * fix dynamic shape inference of unpack operator * reactivate and fix quantize test * add shape inference to expand dims Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: If11ba19d813cd3590707583dff1e4eb0e6412a1d
2021-07-21Added comparison operators to TfLiteParserBruno Goncalves
E.g. Equal, NotEqual, Greater, GreaterOrEqual, Less and LessOrEqual Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com> Change-Id: Id56ef3cc19cc5c5daa19354010c9f25766e5fd00
2021-07-01IVGCVSW-6075 Add ParseExpandDims to TfliteParserTeresa Charlin
* Add ExpandDims tests in tfliteparser * Add support for negative axis to squeeze Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: I604c9b4ac6514895e9e3d4d85c2937e797d288e0
2021-06-18MLCE-510 Add CpuRef Shape Operator to ArmNNKeith Davis
* Add TfLiteParser and delegate support Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: Id3219ba7cc7128b5e73de2c7d8d076a40dcce9c5
2021-05-25IVGCVSW-3649 Add TfLite parser support for Prelu layerNarumol Prangnawarat
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Change-Id: I3dedcc86efe1a67c709d9da636953e2fc400107b
2021-04-15IVGCVSW-5829 Segfault in tflite-parser, int8 modelsMatthew Sloyan
* Updated ParseSplit TfLiteParser function to read correct axis data. * Improved validation in ParseSplit and ParseSplitV function. * Added TensorFlow BOOL support to TfLiteParser. * Added supported ElementWiseUnary operators to TfLiteParser E.g. ABS, LOGICAL_NOT and RSQRT. * Removed ParseExp and ParseNeg function implementation in favour of reusable ParseElementWiseUnary function. * Removed Exp.cpp and Neg.cpp files and moved tests to ElementWiseUnary.cpp. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ibce36e3ce4d95755dda88abc2ddde1e07e62c5e2
2021-04-12IVGCVSW-5410 Add front-end support for CASTmathad01
IVGCVSW-5415 Add TfLiteParser support for CAST * Added front end support for CAST, including support in the Reference workload, Serialization, Deserializtion, Unit tests, and TfLiteParser. Signed-off-by: mathad01 <matthew.haddon@arm.com> Change-Id: Iaf670ca5912a21ed6bc84f7f83a68b42154846bb
2021-04-09IVGCVSW-5804 TfLiteParser fails to correctly parse ArgMinMaxMatthew Sloyan
* Fix for GitHub#523. * Updated ParseArgMinMax function to read correct axis data. * Improved validation in ParseArgMinMax function. * Added ARG_MIN support to TfLiteParser. * Added ArgMinMax unit tests for TfLiteParser. Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: Ib4ce1a7c66e210c47859a130c4896aac958f2654
2021-03-25IVGCVSW-5741 Update FullyConnected in TfLiteParser to support NonConstWeightsFinn Williams
!armnn:5180 * Remove unnecessary memcopy for non permeuted const tensors Signed-off-by: Finn Williams <Finn.Williams@arm.com> Change-Id: Idc3ce2ac001e7d6be61819279de486f093730383
2021-02-09MLCE-347 'REDUCE_MIN, REDUCE_MAX, REDUCE_SUM Support'Sadik Armagan
* Added TfLiteParser support for REDUCE_MIN and REDUCE_MAX operators * Added ACL workloads support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators * Added TfLite Delegate support for REDUCE_MIN, REDUCE_MAX, and REDUCE_SUM operators Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I8085d59946bfd4ab78a59a61f899031ae53371a8
2021-02-08IVGCVSW-4901 Add semantic versioning to Parsers and TfLite DelegateMatthew Sloyan
* Added Version.hpp to all Parsers * Added Version.hpp to TfLite Delegate * Updated CMakeLists to use new versions * Added GetVersion method to parsers and TfLite Delegate Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: If29e1e6d9e615f9095ec1c01ad47acfff40b1dd5
2021-02-04IVGCVSW-5592 Implement Pimpl Idiom for Tf and TfLite ParsersKevin May
Signed-off-by: Kevin May <kevin.may@arm.com> Change-Id: I4a82aca4a2c47b3c598b91bc0075c09397be728a
2021-02-03backends/reference: Add ReduceSum operation supportSadik Armagan
This patch addes ReduceSum operation support for reference backend, which computes the sum of elements across dimensions of a tensor. Changelog v1: - Fix file header descriptions. Chagelog v2: - Fix line limit issue. - Fix type conversion issue. Changelog v3: - Remove tabs. - Modify newly added file headers. Changelog v4: - Symbol on header isn't allowed so drop it from newly added file headers. Changelog v5: - Remove tabs, fix the use of brackets and align lines correctly. Changelog v6: - Add serializer and deserializer support. Changelog v7: - Fix build error add missed code. Changelog v8: - Rename ReduceSumDecriptor to ReduceDescriptor - Update m_KeepDims field data type to bool on ReduceDescriptor - Add ReduceOperation field to ReduceDescriptor - Rename ReduceSumLayer to ReduceLayer - Update ReduceLayer to use ReduceDescriptor - Update ReduceLayer::ValidateTensorShapesFromInputs() function - Rename RefReduceSumWokload to RefReduceWorkload - Update workload to use ReduceDescriptor - Update workload to use Decoders and Encoders - Remove ReduceSum.hpp and ReduceSum.cpp - Added Reduce.hpp and Reduce.cpp - Move Mean.cpp (which is implementing REDUCE_MEAN) functionality to Reduce.cpp - Update RefMeanWorkload to call Reduce function with ReduceOperation::Mean argument - Remove Mean.hpp and Mean.cpp - Update the Serializer/Deserializer ArmnnSchema.fbs for ReduceLayer, ReduceDescriptor, and ReduceOperation - Update Serializer and Deserializer for serializing/parsing ReduceLayer - Added TfLiter parser Sum test for REDUCE_SUM operator - Make corresponding changes on front-end and Ref backend to support REDUCE_SUM operator Changelog v9: - Fixed build errors. Change-Id: I8c8e034f3df73f9565b3c18eff51ecca6c542195 Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
2021-01-22MLCE-335 'DEPTH_TO_SPACE and GATHER operator support in TfLiteParser'Sadik Armagan
* Added GATHER operator support to TfLiteParser * Added DEPTH_TO_SPACE operator support to TfLiteParser Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: Id5d3b54e2d850eb9f19417029efbeb73a3029e69
2020-12-17IVGCVSW-5614 Enable Hard Swish and Elu activationsMatthew Sloyan
* Enabled Hard Swish and Elu in TfLiteDelegate * Added support for Elu in TfLiteParser Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com> Change-Id: If09321b58568a98e14cabce610a1586556da041e
2020-09-24Add int32 and int64 ArgMax op supportInki Dae
This patch adds int32 and int64 ArgMax op support. Current ARMNN already has ArgMax op but not used, and it doesn't support int64 output type. So this patch adds a new type, Signed64, and also adds ArgMinMax computation function for int64 type support. In default, output tensor type of ArgMax op is int64 in case of tensorflow lite model so this patch makes a proper function - ArgMax op for int64 or int32 - to be called according to parsed output_type value. With this patch, ARMNN supports both types - int64 and int32 - for ArgMinMax op. Changelog v1: - Check if output data type of ArgMinMax op is valid or not. - Use template function to support int32 and int64 types of ArgMinMax function. - Keep using Signed32 as default data type of m_Output_Type. Change-Id: I7a8e7e38dd9e5acc81464571d8b4d51378fc7f14 Signed-off-by: Inki Dae <inki.dae@samsung.com>
2020-07-28Github#433 Add HardSwish support to TfLiteParserJan Eilers
Signed-off-by: Jan Eilers <jan.eilers@arm.com> Change-Id: Ic476f8d80bba080ab459db9e6a59cbafd307d129
2020-05-27Add NEG support to TFLite parserDarshan Patel
* Added unit tests * Updated Documentation Signed-off-by: Darshan Patel <darsh.jp@gmail.com> Change-Id: Id22ffebe60732a93798f72801eb8a2a23cdd7ec0
2020-05-27IVGCVSW-4187 Add LEAKY_RELU to TFLite parserSadik Armagan
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com> Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I3e934142487b92897eb487099a22d032f80e8e07
2020-05-25Add DIV support to TFLite parserDarshan Patel
* Added unit tests * Updated Documentation Signed-off-by: Darshan Patel <darsh.jp@gmail.com> Change-Id: Iadb5c76139d74d755d7f4be4b023b4417efe1e92
2020-04-29IVGCVSW-4186 Parse TfLite Exp and Split_V operatorsDerek Lamberti
Change-Id: I0cac7ebfe22f2782af3198e6231cb37fa51bbd62 Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
2020-01-28IVGCVSW-4335 Add support for per-channel QSymm8 to TfLite parserKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I52f777f56138a27655a821aff376ecd0d3d23511
2020-01-15IVGCVSW-4193 Add QUANTIZE to the TfLite parserSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I53431c70edb64c9283ae556407cc07e54469d8cc
2019-12-10IVGCVSW-4191 Add DEQUANTIZE to the TfLite ParserFinn Williams
!armnn:2421 Change-Id: Icdb02b7248ed408c3c8ad2e3e38df5b7cda1c545 Signed-off-by: Finn Williams <Finn.Williams@arm.com>
2019-12-05IVGCVSW-4179 Add RESIZE_NEAREST_NEIGHBOUR to the TfLite parserSadik Armagan
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com> Change-Id: I6359a8a405c86aef04cde75404393dd4ee917fa5
2019-11-19IVGCVSW-1530 Add TfLite slice parser and fix transpose perm vector creationjosh minor
* TfLite slice parser and relevant tests added * TfLite transpose parser logic added to translate Tf/np permutation vector definitions to Armnn definitions * TfLite transpose parser no permute data test modified to include data for default permutation vector when none specified Signed-off-by: josh minor <josh.minor@arm.com> Change-Id: Iebd30971bd180593dc6b8f0d5be1d1bc61a3a5bf
2019-10-24IVGCVSW-4007 Add StandInLayer for unsupported operations in TfLiteParserAron Virginas-Tar
* Fixed bug in custom operator support that caused all custom operators to be parsed as a DetectionPostProcessLayer * Added support for handling unsupported operators (built-in or custom) by replacing them with a StandInLayer in the generated network * Added options to TfLiteParser to control whether we want to use StandInLayers when we encounter unsupported operators, or we prefer to throw a ParserException as until now Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com> Change-Id: I125a63016c7c510b1fdde6033842db4f276718c4
2019-09-10IVGCVSW-3712 Add Transpose into TfLite ParserKeith Davis
Signed-off-by: Keith Davis <keith.davis@arm.com> Change-Id: I94e975ede3876c812f0f26b040e8c50a5597f86a
2019-08-20IVGCVSW-3650 Add TfLite Parser support for Transpose Convolution layerMatthew Jackson
* Added ParseTransposeConv to TfLite Parser * New TransposeConv test file * Updated documentation for supported Transpose Convolution Change-Id: Id7356d8525556805c164af693ae2b16f6a8492fa Signed-off-by: Matthew Jackson <matthew.jackson@arm.com>
2019-07-22IVGCVSW-3383 - Add TfLite Parser support for L2 Normalization layerMatthew Jackson
* Added ParseL2Normalization in TfLiteParser * Added new unit tests L2Normalization.cpp * Added documentation for supported L2 Normalization to TensorflorLiteSupport.md Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I83ea75d1791ac8a00390aed3e5d0a7b337fcd46d
2019-07-17IVGCVSW-3423 Add TfLite parser support for Stack (Pack) layerMatthew Jackson
* Added ParsePack method * New unit test Pack.cpp * Updated TensorFlowLiteSupport.md with new supported operator Signed-off-by: Matthew Jackson <matthew.jackson@arm.com> Change-Id: I2310b33ee26959b036bb4452a25c90cc1d4cbf20
2019-04-30IVGCVSW-2405 Rename SubGraph to SubgraphViewDerek Lamberti
Change-Id: Ie50aeccf053c20c3a01a75042bbc3acd824375af Signed-off-by: Derek Lamberti <derek.lamberti@arm.com> Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
2019-04-15IVGCVSW-2848 - Add TfLite Parser support for Unpack layerNina Drozd
* Added ParseUnpack in TfLiteParser * New Unpack test file with test reproducing unpack in DeepSpeechV1 model * Added documentation for supported Unpack to TensorflorLiteSupport.md Signed-off-by: Nina Drozd <nina.drozd@arm.com> Change-Id: Ie920d46254ff4b4ab544407ace4c1d489af83157
2019-04-09IVGCVSW-2845: Add TfLite Parser support for TanH activation layerNina Drozd
* Added ParseTanH in TfLiteParser * Added testcase for parsing TanH activation in Activations.cpp * Added new supported TanH operator in TensorflowLiteSupport.md Signed-off-by: Nina Drozd <nina.drozd@arm.com> Change-Id: Ie60f38994d76b077f86828c21c57381bdeeaeb5a
2019-04-08IVGCVSW-2844: Add TfLite Parser support for Split layerNina Drozd
* Added ParseSplit method * New Unit test Split.cpp * Updated TensorflowLiteSupport.md with new supported operator Change-Id: Iec80ba9ad7b48db8e86589ebae77bd7d8ed38fb2 Signed-off-by: Nina Drozd <nina.drozd@arm.com>
2019-02-26IVGCVSW-2560 Verify Inference test for TensorFlow Lite MobileNet SSDNarumol Prangnawarat
* Assign output shape of MobileNet SSD to ArmNN network * Add m_OverridenOutputShapes to TfLiteParser to set shape in GetNetworkOutputBindingInfo * Use input quantization instead of output quantization params * Correct data and datatype in Inference test Change-Id: I01ac2e07ed08e8928ba0df33a4847399e1dd8394 Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com> Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
2019-02-25Add strided-slice parser to tf-liteBruno Goncalves
Change-Id: I1821d7e8123c76823562dd2e8822c5293fcb18c3 Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com>
2019-02-25Add minimum parser to tf-liteBruno Goncalves
Change-Id: I617c2715e0fb8d01b96fa9d3d5d9a16a33477b66 Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com>
2019-02-25Add maximum parser to tf-liteBruno Goncalves
Change-Id: Idaf6dd3f4d96dad01e1dc1a0d3fd6c146780626d Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com>
2019-02-22Add space-to-batch-nd parser to tf-liteBruno Goncalves
Change-Id: I3bf86d44f811380559ec35eed0bc43b3bd97da80 Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com>
2019-02-22Add batch-to-space-nd parser to tf-liteBruno Goncalves
Change-Id: I1e210f88f19f38ab719008e119c8fed153a3dd95 Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com>
2019-02-22Add resize-bilinear parser to tf-liteBruno Goncalves
Change-Id: Id35db981b38348e5a941cfbb4cbdfe8cd617a254 Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com>
2019-02-22Add sub parser to tf-liteBruno Goncalves
Change-Id: I0e63d81d95528e6c278dc5fa8b87ccc1f8798130 Signed-off-by: Bruno Goncalves <bruno.slackware@gmail.com>
2019-02-21IVGCVSW-2429 Add Detection PostProcess Parser to TensorFlow Lite Parserkeidav01
* Added parser function in TFLiteParser * Removed custom options gating * Added unit test * Removed template usage in VerifyTensorInfo for DeserializeParser Change-Id: If198654ed70060855a05f8aaed010293405bd103 Signed-off-by: keidav01 <keith.davis@arm.com>
2019-01-29Added ConstantLayer support to TfLiteParserBruno Goncalves
Change-Id: Iecc4fe8208b442d9c872e56c3d47249f959c6cc1