| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2021-05-06 | IVGCVSW-5815 Generalise ConstCpuTensorHandle | James Conroy | |
| * Generalises ConstCpuTensorHandle and inherited classes by removing 'Cpu' from aliases. * New renamed classes: ConstTensorHandle, TensorHandle, ScopedTensorHandle, PassthroughTensorHandle, ConstPassthroughTensorHandle. Signed-off-by: James Conroy <james.conroy@arm.com> Change-Id: I1824e0e134202735fb77051f20a7252f161dfe16 | |||
| 2020-11-08 | IVGCVSW-5315 Create FuseBatchNorm class | Mike Kelly | |
| Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Signed-off-by: Mike Kelly <mike.kelly@arm.com> Change-Id: Id0625c58dbeea79874bf986b70d136ed9390bf83 | |||
| 2020-10-29 | IVGCVSW-5314 Create OptimizeForExclusiveConnection | Teresa Charlin | |
| * FuseBatchNorm class has been added to facilitate testing * Only Convolution2D FP32 being fused Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I049c4770946ddca21b08516d4c9f4d0d22bf9b45 | |||
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