4 files changed, 77 insertions, 5 deletions
diff --git a/src/backends/cl/test/ClCreateWorkloadTests.cpp b/src/backends/cl/test/ClCreateWorkloadTests.cpp
index 34914fca50..d8b2d4f786 100644
--- a/src/backends/cl/test/ClCreateWorkloadTests.cpp
+++ b/src/backends/cl/test/ClCreateWorkloadTests.cpp
@@ -1297,4 +1297,36 @@ TEST_CASE_FIXTURE(ClContextControlFixture, "CreateQuantizedLstmWorkload")
     ClCreateQuantizedLstmWorkloadTest<ClQuantizedLstmWorkload>();
 }
 
+template <armnn::DataType DataType>
+static void ClCreateActivationWorkloadReplaceFunctionsTest()
+{
+    std::shared_ptr<ClMemoryManager> memoryManager = std::make_shared<ClMemoryManager>(
+            std::make_unique<arm_compute::CLBufferAllocator>());
+
+    Graph graph;
+    ClWorkloadFactory factory = ClWorkloadFactoryHelper::GetFactory(memoryManager);
+    // input and output are created as armnn::TensorInfo tensorInfo({1, 1}, DataType)
+    auto workloadPtr = CreateActivationWorkloadTest<ClActivationWorkload, DataType>(factory, graph);
+
+    // new input and output tensor handlers are created and then replace in the workload
+    const ClTensorHandleFactory tensorHandleFactory(memoryManager);
+    TensorInfo inputInfo({2 , 2}, DataType::Float16);
+    TensorInfo outputInfo({2 , 2}, DataType::Float16);
+    unique_ptr<ITensorHandle> inputHandle  = tensorHandleFactory.CreateTensorHandle(inputInfo, true);
+    inputHandle->Manage();
+    inputHandle->Allocate();
+    unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.CreateTensorHandle(outputInfo, true);
+    outputHandle->Manage();
+    outputHandle->Allocate();
+
+    unsigned int slot = 0;
+    CHECK_THROWS_AS(workloadPtr->ReplaceInputTensorHandle(inputHandle.get(), slot), UnimplementedException);
+    CHECK_THROWS_AS(workloadPtr->ReplaceOutputTensorHandle(outputHandle.get(), slot), UnimplementedException);
+}
+
+TEST_CASE("ClReplaceFunctionsfromFloat32toFloat16ActivationWorkload")
+{
+    ClCreateActivationWorkloadReplaceFunctionsTest<armnn::DataType::Float32>();
+}
+
 }
diff --git a/src/backends/cl/workloads/ClActivationWorkload.cpp b/src/backends/cl/workloads/ClActivationWorkload.cpp
index 91a44f430a..a92f8fb573 100644
--- a/src/backends/cl/workloads/ClActivationWorkload.cpp
+++ b/src/backends/cl/workloads/ClActivationWorkload.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -32,7 +32,7 @@ arm_compute::Status ClActivationWorkloadValidate(const TensorInfo& input,
 ClActivationWorkload::ClActivationWorkload(const ActivationQueueDescriptor& descriptor,
                                            const WorkloadInfo& info,
                                            const arm_compute::CLCompileContext& clCompileContext)
-    : BaseWorkload<ActivationQueueDescriptor>(descriptor, info)
+    : ClBaseWorkload<ActivationQueueDescriptor>(descriptor, info)
 {
     // Report Profiling Details
     ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClActivationWorkload_Construct",
diff --git a/src/backends/cl/workloads/ClActivationWorkload.hpp b/src/backends/cl/workloads/ClActivationWorkload.hpp
index 683229e1f3..14835fb40b 100644
--- a/src/backends/cl/workloads/ClActivationWorkload.hpp
+++ b/src/backends/cl/workloads/ClActivationWorkload.hpp
@@ -1,11 +1,11 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #pragma once
 
-#include <armnn/backends/Workload.hpp>
+#include "ClBaseWorkload.hpp"
 
 #include <arm_compute/runtime/CL/functions/CLActivationLayer.h>
 
@@ -15,7 +15,7 @@ arm_compute::Status ClActivationWorkloadValidate(const TensorInfo& input,
                                                  const TensorInfo& output,
                                                  const ActivationDescriptor& descriptor);
 
-class ClActivationWorkload : public BaseWorkload<ActivationQueueDescriptor>
+class ClActivationWorkload : public ClBaseWorkload<ActivationQueueDescriptor>
 {
 public:
     ClActivationWorkload(const ActivationQueueDescriptor& descriptor,
diff --git a/src/backends/cl/workloads/ClBaseWorkload.hpp b/src/backends/cl/workloads/ClBaseWorkload.hpp
new file mode 100644
index 0000000000..e74fc84f4f
--- /dev/null
+++ b/src/backends/cl/workloads/ClBaseWorkload.hpp
@@ -0,0 +1,40 @@
+//
+// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <armnn/backends/Workload.hpp>
+
+namespace armnn
+{
+template <typename QueueDescriptor>
+class ClBaseWorkload : public BaseWorkload<QueueDescriptor>
+{
+public:
+    ClBaseWorkload(const QueueDescriptor& descriptor, const WorkloadInfo& info)
+            : BaseWorkload<QueueDescriptor>(descriptor, info)
+    {}
+
+    // Replace input tensor handle with the given TensorHandle and call Reconfigure()
+    void ReplaceInputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
+    {
+        this->m_Data.m_Inputs[slot] = tensorHandle;
+        Reconfigure();
+    }
+
+    // Replace output tensor handle with the given TensorHandle and call Reconfigure()
+    void ReplaceOutputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
+    {
+        this->m_Data.m_Outputs[slot] = tensorHandle;
+        Reconfigure();
+    }
+
+    // Reconfigure the workload configuration. Throw armnn::UnimplementedException by default.
+    virtual void Reconfigure()
+    {
+        throw armnn::UnimplementedException("Reconfigure not implemented for this workload");
+    }
+};
+} //namespace armnn