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-rw-r--r--src/backends/cl/workloads/ClActivationWorkload.cpp4
-rw-r--r--src/backends/cl/workloads/ClActivationWorkload.hpp6
-rw-r--r--src/backends/cl/workloads/ClBaseWorkload.hpp40
3 files changed, 45 insertions, 5 deletions
diff --git a/src/backends/cl/workloads/ClActivationWorkload.cpp b/src/backends/cl/workloads/ClActivationWorkload.cpp
index 91a44f430a..a92f8fb573 100644
--- a/src/backends/cl/workloads/ClActivationWorkload.cpp
+++ b/src/backends/cl/workloads/ClActivationWorkload.cpp
@@ -1,5 +1,5 @@
//
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
@@ -32,7 +32,7 @@ arm_compute::Status ClActivationWorkloadValidate(const TensorInfo& input,
ClActivationWorkload::ClActivationWorkload(const ActivationQueueDescriptor& descriptor,
const WorkloadInfo& info,
const arm_compute::CLCompileContext& clCompileContext)
- : BaseWorkload<ActivationQueueDescriptor>(descriptor, info)
+ : ClBaseWorkload<ActivationQueueDescriptor>(descriptor, info)
{
// Report Profiling Details
ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClActivationWorkload_Construct",
diff --git a/src/backends/cl/workloads/ClActivationWorkload.hpp b/src/backends/cl/workloads/ClActivationWorkload.hpp
index 683229e1f3..14835fb40b 100644
--- a/src/backends/cl/workloads/ClActivationWorkload.hpp
+++ b/src/backends/cl/workloads/ClActivationWorkload.hpp
@@ -1,11 +1,11 @@
//
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
// SPDX-License-Identifier: MIT
//
#pragma once
-#include <armnn/backends/Workload.hpp>
+#include "ClBaseWorkload.hpp"
#include <arm_compute/runtime/CL/functions/CLActivationLayer.h>
@@ -15,7 +15,7 @@ arm_compute::Status ClActivationWorkloadValidate(const TensorInfo& input,
const TensorInfo& output,
const ActivationDescriptor& descriptor);
-class ClActivationWorkload : public BaseWorkload<ActivationQueueDescriptor>
+class ClActivationWorkload : public ClBaseWorkload<ActivationQueueDescriptor>
{
public:
ClActivationWorkload(const ActivationQueueDescriptor& descriptor,
diff --git a/src/backends/cl/workloads/ClBaseWorkload.hpp b/src/backends/cl/workloads/ClBaseWorkload.hpp
new file mode 100644
index 0000000000..e74fc84f4f
--- /dev/null
+++ b/src/backends/cl/workloads/ClBaseWorkload.hpp
@@ -0,0 +1,40 @@
+//
+// Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <armnn/backends/Workload.hpp>
+
+namespace armnn
+{
+template <typename QueueDescriptor>
+class ClBaseWorkload : public BaseWorkload<QueueDescriptor>
+{
+public:
+ ClBaseWorkload(const QueueDescriptor& descriptor, const WorkloadInfo& info)
+ : BaseWorkload<QueueDescriptor>(descriptor, info)
+ {}
+
+ // Replace input tensor handle with the given TensorHandle and call Reconfigure()
+ void ReplaceInputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
+ {
+ this->m_Data.m_Inputs[slot] = tensorHandle;
+ Reconfigure();
+ }
+
+ // Replace output tensor handle with the given TensorHandle and call Reconfigure()
+ void ReplaceOutputTensorHandle(ITensorHandle* tensorHandle, unsigned int slot) override
+ {
+ this->m_Data.m_Outputs[slot] = tensorHandle;
+ Reconfigure();
+ }
+
+ // Reconfigure the workload configuration. Throw armnn::UnimplementedException by default.
+ virtual void Reconfigure()
+ {
+ throw armnn::UnimplementedException("Reconfigure not implemented for this workload");
+ }
+};
+} //namespace armnn