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-rw-r--r--delegate/src/test/ArmnnDelegateTest.cpp32
-rw-r--r--delegate/src/test/ElementwiseBinaryTest.cpp169
-rw-r--r--delegate/src/test/ElementwiseBinaryTestHelper.hpp211
-rw-r--r--delegate/src/test/ElementwiseUnaryTestHelper.hpp9
4 files changed, 403 insertions, 18 deletions
diff --git a/delegate/src/test/ArmnnDelegateTest.cpp b/delegate/src/test/ArmnnDelegateTest.cpp
index fdf786ff99..7cec70b022 100644
--- a/delegate/src/test/ArmnnDelegateTest.cpp
+++ b/delegate/src/test/ArmnnDelegateTest.cpp
@@ -7,6 +7,7 @@
#include <doctest/doctest.h>
#include <armnn_delegate.hpp>
+#include "ElementwiseUnaryTestHelper.hpp"
#include "tensorflow/lite/kernels/builtin_op_kernels.h"
#include <tensorflow/lite/interpreter.h>
@@ -19,30 +20,31 @@ TEST_SUITE("ArmnnDelegate")
TEST_CASE ("ArmnnDelegate Registered")
{
- std::unique_ptr<tflite::impl::Interpreter> tfLiteInterpreter;
- tfLiteInterpreter.reset(new tflite::impl::Interpreter);
+ using namespace tflite;
+ auto tfLiteInterpreter = std::make_unique<Interpreter>();
- // Create the network
tfLiteInterpreter->AddTensors(3);
- tfLiteInterpreter->SetInputs({0});
+ tfLiteInterpreter->SetInputs({0, 1});
tfLiteInterpreter->SetOutputs({2});
- TfLiteQuantizationParams quantizationParams;
- tfLiteInterpreter->SetTensorParametersReadWrite(0, kTfLiteFloat32, "", {3}, quantizationParams);
- tfLiteInterpreter->SetTensorParametersReadWrite(1, kTfLiteFloat32, "", {3}, quantizationParams);
- tfLiteInterpreter->SetTensorParametersReadWrite(2, kTfLiteFloat32, "", {3}, quantizationParams);
- TfLiteRegistration* nodeRegistration = tflite::ops::builtin::Register_ABS();
- void* data = malloc(sizeof(int));
+ tfLiteInterpreter->SetTensorParametersReadWrite(0, kTfLiteFloat32, "input1", {1,2,2,1}, TfLiteQuantization());
+ tfLiteInterpreter->SetTensorParametersReadWrite(1, kTfLiteFloat32, "input2", {1,2,2,1}, TfLiteQuantization());
+ tfLiteInterpreter->SetTensorParametersReadWrite(2, kTfLiteFloat32, "output", {1,2,2,1}, TfLiteQuantization());
- tfLiteInterpreter->AddNodeWithParameters({0}, {2}, nullptr, 0, data, nodeRegistration);
+ tflite::ops::builtin::BuiltinOpResolver opResolver;
+ const TfLiteRegistration* opRegister = opResolver.FindOp(BuiltinOperator_ADD, 1);
+ tfLiteInterpreter->AddNodeWithParameters({0, 1}, {2}, "", 0, nullptr, opRegister);
// create the Armnn Delegate
- auto delegateOptions = TfLiteArmnnDelegateOptionsDefault();
- auto delegate = TfLiteArmnnDelegateCreate(delegateOptions);
- auto status = tfLiteInterpreter->ModifyGraphWithDelegate(std::move(delegate));
+ std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
+ armnnDelegate::DelegateOptions delegateOptions(backends);
+ std::unique_ptr<TfLiteDelegate, decltype(&armnnDelegate::TfLiteArmnnDelegateDelete)>
+ theArmnnDelegate(armnnDelegate::TfLiteArmnnDelegateCreate(delegateOptions),
+ armnnDelegate::TfLiteArmnnDelegateDelete);
+
+ auto status = tfLiteInterpreter->ModifyGraphWithDelegate(std::move(theArmnnDelegate));
CHECK(status == kTfLiteOk);
CHECK(tfLiteInterpreter != nullptr);
-
}
}
diff --git a/delegate/src/test/ElementwiseBinaryTest.cpp b/delegate/src/test/ElementwiseBinaryTest.cpp
new file mode 100644
index 0000000000..bd4019a686
--- /dev/null
+++ b/delegate/src/test/ElementwiseBinaryTest.cpp
@@ -0,0 +1,169 @@
+//
+// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ElementwiseBinaryTestHelper.hpp"
+
+#include <armnn_delegate.hpp>
+
+#include <flatbuffers/flatbuffers.h>
+#include <tensorflow/lite/interpreter.h>
+#include <tensorflow/lite/kernels/register.h>
+#include <tensorflow/lite/model.h>
+#include <tensorflow/lite/schema/schema_generated.h>
+#include <tensorflow/lite/version.h>
+
+#include <doctest/doctest.h>
+
+namespace armnnDelegate
+{
+
+TEST_SUITE("ElementwiseBinaryTest")
+{
+
+TEST_CASE ("Add_Float32_GpuAcc_Test")
+{
+ // Create the ArmNN Delegate
+ std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc,
+ armnn::Compute::CpuRef };
+ // Set input data
+ std::vector<int32_t> input0Shape { 2, 2, 2, 3 };
+ std::vector<int32_t> input1Shape { 2, 2, 2, 3 };
+ std::vector<int32_t> outputShape { 2, 2, 2, 3 };
+
+ std::vector<float> input0Values =
+ {
+ 0.0f, 2.0f, 1.0f,
+ 0.2f, 1.0f, 2.0f,
+
+ 1.0f, 2.0f, 1.0f,
+ 0.2f, 1.0f, 2.0f,
+
+ 0.0f, 2.0f, 1.0f,
+ 4.2f, 1.0f, 2.0f,
+
+ 0.0f, 0.0f, 1.0f,
+ 0.2f, 1.0f, 2.0f,
+
+ };
+
+ std::vector<float> input1Values =
+ {
+ 1.0f, 2.0f, 1.0f,
+ 0.0f, 1.0f, 2.0f,
+
+ 1.0f, 2.0f, -2.0f,
+ 0.2f, 1.0f, 2.0f,
+
+ 0.0f, 2.0f, 1.0f,
+ 4.2f, 0.0f, -3.0f,
+
+ 0.0f, 0.0f, 1.0f,
+ 0.7f, 1.0f, 5.0f,
+ };
+
+ std::vector<float> expectedOutputValues =
+ {
+ 1.0f, 4.0f, 2.0f,
+ 0.2f, 2.0f, 4.0f,
+
+ 2.0f, 4.0f, -1.0f,
+ 0.4f, 2.0f, 4.0f,
+
+ 0.0f, 4.0f, 2.0f,
+ 8.4f, 1.0f, -1.0f,
+
+ 0.0f, 0.0f, 2.0f,
+ 0.9f, 2.0f, 7.0f,
+ };
+
+
+ ElementwiseBinaryFP32Test(tflite::BuiltinOperator_ADD,
+ tflite::ActivationFunctionType_NONE,
+ backends,
+ input0Shape,
+ input1Shape,
+ outputShape,
+ input0Values,
+ input1Values,
+ expectedOutputValues);
+}
+
+TEST_CASE ("Add_Broadcast_Float32_GpuAcc_Test")
+{
+ // Create the ArmNN Delegate
+ std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc,
+ armnn::Compute::CpuRef };
+ // Set input data
+ std::vector<int32_t> input0Shape { 1, 3, 2, 1 };
+ std::vector<int32_t> input1Shape { 1, 1, 2, 3 };
+ std::vector<int32_t> outputShape { 1, 3, 2, 3 };
+
+ std::vector<float> input0Values
+ {
+ 0.0f,
+ 1.0f,
+
+ 2.0f,
+ 3.0f,
+
+ 4.0f,
+ 5.0f,
+ };
+ std::vector<float> input1Values
+ {
+ 0.5f, 1.5f, 2.5f,
+ 3.5f, 4.5f, 5.5f,
+ };
+ // Set output data
+ std::vector<float> expectedOutputValues
+ {
+ 0.5f, 1.5f, 2.5f,
+ 4.5f, 5.5f, 6.5f,
+
+ 2.5f, 3.5f, 4.5f,
+ 6.5f, 7.5f, 8.5f,
+
+ 4.5f, 5.5f, 6.5f,
+ 8.5f, 9.5f, 10.5f,
+ };
+ ElementwiseBinaryFP32Test(tflite::BuiltinOperator_ADD,
+ tflite::ActivationFunctionType_NONE,
+ backends,
+ input0Shape,
+ input1Shape,
+ outputShape,
+ input0Values,
+ input1Values,
+ expectedOutputValues);
+}
+
+TEST_CASE ("Add_ActivationRELU_Float32_GpuAcc_Test")
+{
+ // Create the ArmNN Delegate
+ std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc,
+ armnn::Compute::CpuRef };
+ // Set input data
+ std::vector<int32_t> input0Shape { 1, 2, 2, 1 };
+ std::vector<int32_t> input1Shape { 1, 2, 2, 1 };
+ std::vector<int32_t> outputShape { 1, 2, 2, 1 };
+
+ std::vector<float> input0Values { 4.0f, 0.8f, 0.7f, -0.8f };
+ std::vector<float> input1Values { 0.7f, -1.2f, 0.8f, 0.5f };
+ // Set output data
+ std::vector<float> expectedOutputValues { 4.7f, 0.0f, 1.5f, 0.0f };
+ ElementwiseBinaryFP32Test(tflite::BuiltinOperator_ADD,
+ tflite::ActivationFunctionType_RELU,
+ backends,
+ input0Shape,
+ input1Shape,
+ outputShape,
+ input0Values,
+ input1Values,
+ expectedOutputValues);
+}
+
+}
+
+} // namespace armnnDelegate \ No newline at end of file
diff --git a/delegate/src/test/ElementwiseBinaryTestHelper.hpp b/delegate/src/test/ElementwiseBinaryTestHelper.hpp
new file mode 100644
index 0000000000..72f9f850c8
--- /dev/null
+++ b/delegate/src/test/ElementwiseBinaryTestHelper.hpp
@@ -0,0 +1,211 @@
+//
+// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#pragma once
+
+#include <armnn_delegate.hpp>
+
+#include <flatbuffers/flatbuffers.h>
+#include <tensorflow/lite/interpreter.h>
+#include <tensorflow/lite/kernels/register.h>
+#include <tensorflow/lite/model.h>
+#include <tensorflow/lite/schema/schema_generated.h>
+#include <tensorflow/lite/version.h>
+
+#include <doctest/doctest.h>
+
+namespace
+{
+
+std::vector<char> CreateElementwiseBinaryTfLiteModel(tflite::BuiltinOperator binaryOperatorCode,
+ tflite::ActivationFunctionType activationType,
+ tflite::TensorType tensorType,
+ const std::vector <int32_t>& input0TensorShape,
+ const std::vector <int32_t>& input1TensorShape,
+ const std::vector <int32_t>& outputTensorShape)
+{
+ using namespace tflite;
+ flatbuffers::FlatBufferBuilder flatBufferBuilder;
+
+ std::vector<flatbuffers::Offset<tflite::Buffer>> buffers;
+ buffers.push_back(CreateBuffer(flatBufferBuilder, flatBufferBuilder.CreateVector({})));
+
+ std::array<flatbuffers::Offset<Tensor>, 3> tensors;
+ tensors[0] = CreateTensor(flatBufferBuilder,
+ flatBufferBuilder.CreateVector<int32_t>(input0TensorShape.data(),
+ input0TensorShape.size()),
+ tensorType, 0);
+ tensors[1] = CreateTensor(flatBufferBuilder,
+ flatBufferBuilder.CreateVector<int32_t>(input1TensorShape.data(),
+ input1TensorShape.size()),
+ tensorType, 0);
+ tensors[2] = CreateTensor(flatBufferBuilder,
+ flatBufferBuilder.CreateVector<int32_t>(outputTensorShape.data(),
+ outputTensorShape.size()),
+ tensorType);
+
+ // create operator
+ tflite::BuiltinOptions operatorBuiltinOptionsType = tflite::BuiltinOptions_NONE;
+ flatbuffers::Offset<void> operatorBuiltinOptions = 0;
+ switch (binaryOperatorCode)
+ {
+ case BuiltinOperator_ADD:
+ {
+ operatorBuiltinOptionsType = BuiltinOptions_AddOptions;
+ operatorBuiltinOptions = CreateAddOptions(flatBufferBuilder, activationType).Union();
+ break;
+ }
+ case BuiltinOperator_DIV:
+ {
+ operatorBuiltinOptionsType = BuiltinOptions_DivOptions;
+ operatorBuiltinOptions = CreateDivOptions(flatBufferBuilder, activationType).Union();
+ break;
+ }
+ case BuiltinOperator_MUL:
+ {
+ operatorBuiltinOptionsType = BuiltinOptions_MulOptions;
+ operatorBuiltinOptions = CreateMulOptions(flatBufferBuilder, activationType).Union();
+ break;
+ }
+ case BuiltinOperator_SUB:
+ {
+ operatorBuiltinOptionsType = BuiltinOptions_SubOptions;
+ operatorBuiltinOptions = CreateSubOptions(flatBufferBuilder, activationType).Union();
+ break;
+ }
+ default:
+ break;
+ }
+ const std::vector<int32_t> operatorInputs{ {0, 1} };
+ const std::vector<int32_t> operatorOutputs{{2}};
+ flatbuffers::Offset <Operator> elementwiseBinaryOperator =
+ CreateOperator(flatBufferBuilder,
+ 0,
+ flatBufferBuilder.CreateVector<int32_t>(operatorInputs.data(), operatorInputs.size()),
+ flatBufferBuilder.CreateVector<int32_t>(operatorOutputs.data(), operatorOutputs.size()),
+ operatorBuiltinOptionsType,
+ operatorBuiltinOptions);
+
+ const std::vector<int> subgraphInputs{ {0, 1} };
+ const std::vector<int> subgraphOutputs{{2}};
+ flatbuffers::Offset <SubGraph> subgraph =
+ CreateSubGraph(flatBufferBuilder,
+ flatBufferBuilder.CreateVector(tensors.data(), tensors.size()),
+ flatBufferBuilder.CreateVector<int32_t>(subgraphInputs.data(), subgraphInputs.size()),
+ flatBufferBuilder.CreateVector<int32_t>(subgraphOutputs.data(), subgraphOutputs.size()),
+ flatBufferBuilder.CreateVector(&elementwiseBinaryOperator, 1));
+
+ flatbuffers::Offset <flatbuffers::String> modelDescription =
+ flatBufferBuilder.CreateString("ArmnnDelegate: Elementwise Binary Operator Model");
+ flatbuffers::Offset <OperatorCode> operatorCode = CreateOperatorCode(flatBufferBuilder, binaryOperatorCode);
+
+ flatbuffers::Offset <Model> flatbufferModel =
+ CreateModel(flatBufferBuilder,
+ TFLITE_SCHEMA_VERSION,
+ flatBufferBuilder.CreateVector(&operatorCode, 1),
+ flatBufferBuilder.CreateVector(&subgraph, 1),
+ modelDescription,
+ flatBufferBuilder.CreateVector(buffers.data(), buffers.size()));
+
+ flatBufferBuilder.Finish(flatbufferModel);
+
+ return std::vector<char>(flatBufferBuilder.GetBufferPointer(),
+ flatBufferBuilder.GetBufferPointer() + flatBufferBuilder.GetSize());
+}
+
+void ElementwiseBinaryFP32Test(tflite::BuiltinOperator binaryOperatorCode,
+ tflite::ActivationFunctionType activationType,
+ std::vector<armnn::BackendId>& backends,
+ std::vector<int32_t>& input0Shape,
+ std::vector<int32_t>& input1Shape,
+ std::vector<int32_t>& outputShape,
+ std::vector<float>& input0Values,
+ std::vector<float>& input1Values,
+ std::vector<float>& expectedOutputValues)
+{
+ using namespace tflite;
+ std::vector<char> modelBuffer = CreateElementwiseBinaryTfLiteModel(binaryOperatorCode,
+ activationType,
+ ::tflite::TensorType_FLOAT32,
+ input0Shape,
+ input1Shape,
+ outputShape);
+
+ const Model* tfLiteModel = GetModel(modelBuffer.data());
+ // Create TfLite Interpreters
+ std::unique_ptr<Interpreter> armnnDelegateInterpreter;
+ CHECK(InterpreterBuilder(tfLiteModel, ::tflite::ops::builtin::BuiltinOpResolver())
+ (&armnnDelegateInterpreter) == kTfLiteOk);
+ CHECK(armnnDelegateInterpreter != nullptr);
+ CHECK(armnnDelegateInterpreter->AllocateTensors() == kTfLiteOk);
+
+ std::unique_ptr<Interpreter> tfLiteInterpreter;
+ CHECK(InterpreterBuilder(tfLiteModel, ::tflite::ops::builtin::BuiltinOpResolver())
+ (&tfLiteInterpreter) == kTfLiteOk);
+ CHECK(tfLiteInterpreter != nullptr);
+ CHECK(tfLiteInterpreter->AllocateTensors() == kTfLiteOk);
+
+ // Create the ArmNN Delegate
+ armnnDelegate::DelegateOptions delegateOptions(backends);
+ std::unique_ptr<TfLiteDelegate, decltype(&armnnDelegate::TfLiteArmnnDelegateDelete)>
+ theArmnnDelegate(armnnDelegate::TfLiteArmnnDelegateCreate(delegateOptions),
+ armnnDelegate::TfLiteArmnnDelegateDelete);
+ CHECK(theArmnnDelegate != nullptr);
+ // Modify armnnDelegateInterpreter to use armnnDelegate
+ CHECK(armnnDelegateInterpreter->ModifyGraphWithDelegate(theArmnnDelegate.get()) == kTfLiteOk);
+
+ // Set input data
+ auto tfLiteDelegateInput0Id = tfLiteInterpreter->inputs()[0];
+ auto tfLiteDelageInput0Data = tfLiteInterpreter->typed_tensor<float>(tfLiteDelegateInput0Id);
+ for (unsigned int i = 0; i < input0Values.size(); ++i)
+ {
+ tfLiteDelageInput0Data[i] = input0Values[i];
+ }
+
+ auto tfLiteDelegateInput1Id = tfLiteInterpreter->inputs()[1];
+ auto tfLiteDelageInput1Data = tfLiteInterpreter->typed_tensor<float>(tfLiteDelegateInput1Id);
+ for (unsigned int i = 0; i < input1Values.size(); ++i)
+ {
+ tfLiteDelageInput1Data[i] = input1Values[i];
+ }
+
+ auto armnnDelegateInput0Id = armnnDelegateInterpreter->inputs()[0];
+ auto armnnDelegateInput0Data = armnnDelegateInterpreter->typed_tensor<float>(armnnDelegateInput0Id);
+ for (unsigned int i = 0; i < input0Values.size(); ++i)
+ {
+ armnnDelegateInput0Data[i] = input0Values[i];
+ }
+
+ auto armnnDelegateInput1Id = armnnDelegateInterpreter->inputs()[1];
+ auto armnnDelegateInput1Data = armnnDelegateInterpreter->typed_tensor<float>(armnnDelegateInput1Id);
+ for (unsigned int i = 0; i < input1Values.size(); ++i)
+ {
+ armnnDelegateInput1Data[i] = input1Values[i];
+ }
+
+ // Run EnqueWorkload
+ CHECK(tfLiteInterpreter->Invoke() == kTfLiteOk);
+ CHECK(armnnDelegateInterpreter->Invoke() == kTfLiteOk);
+
+ // Compare output data
+ auto tfLiteDelegateOutputId = tfLiteInterpreter->outputs()[0];
+ auto tfLiteDelageOutputData = tfLiteInterpreter->typed_tensor<float>(tfLiteDelegateOutputId);
+ auto armnnDelegateOutputId = armnnDelegateInterpreter->outputs()[0];
+ auto armnnDelegateOutputData = armnnDelegateInterpreter->typed_tensor<float>(armnnDelegateOutputId);
+ for (size_t i = 0; i < expectedOutputValues.size(); i++)
+ {
+ CHECK(expectedOutputValues[i] == armnnDelegateOutputData[i]);
+ CHECK(tfLiteDelageOutputData[i] == expectedOutputValues[i]);
+ CHECK(tfLiteDelageOutputData[i] == armnnDelegateOutputData[i]);
+ }
+
+ armnnDelegateInterpreter.reset(nullptr);
+}
+
+} // anonymous namespace
+
+
+
+
diff --git a/delegate/src/test/ElementwiseUnaryTestHelper.hpp b/delegate/src/test/ElementwiseUnaryTestHelper.hpp
index 4d45f4e964..b4a55cbe99 100644
--- a/delegate/src/test/ElementwiseUnaryTestHelper.hpp
+++ b/delegate/src/test/ElementwiseUnaryTestHelper.hpp
@@ -97,12 +97,15 @@ void ElementwiseUnaryFP32Test(tflite::BuiltinOperator unaryOperatorCode,
(&tfLiteInterpreter) == kTfLiteOk);
CHECK(tfLiteInterpreter != nullptr);
CHECK(tfLiteInterpreter->AllocateTensors() == kTfLiteOk);
+
// Create the ArmNN Delegate
armnnDelegate::DelegateOptions delegateOptions(backends);
- auto armnnDelegate = TfLiteArmnnDelegateCreate(delegateOptions);
- CHECK(armnnDelegate != nullptr);
+ std::unique_ptr<TfLiteDelegate, decltype(&armnnDelegate::TfLiteArmnnDelegateDelete)>
+ theArmnnDelegate(armnnDelegate::TfLiteArmnnDelegateCreate(delegateOptions),
+ armnnDelegate::TfLiteArmnnDelegateDelete);
+ CHECK(theArmnnDelegate != nullptr);
// Modify armnnDelegateInterpreter to use armnnDelegate
- CHECK(armnnDelegateInterpreter->ModifyGraphWithDelegate(armnnDelegate) == kTfLiteOk);
+ CHECK(armnnDelegateInterpreter->ModifyGraphWithDelegate(theArmnnDelegate.get()) == kTfLiteOk);
// Set input data
auto tfLiteDelegateInputId = tfLiteInterpreter->inputs()[0];
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-26 11:01:21 +0000