MLCE-510 Add CpuRef Shape Operator to ArmNN

 * Add TfLiteParser and delegate support

Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: Id3219ba7cc7128b5e73de2c7d8d076a40dcce9c5

3 files changed, 121 insertions, 0 deletions

diff --git a/src/armnnTfLiteParser/TfLiteParser.cpp b/src/armnnTfLiteParser/TfLiteParser.cpp
index 26c44a9f35..f38f45fcdf 100644
--- a/src/armnnTfLiteParser/TfLiteParser.cpp
+++ b/src/armnnTfLiteParser/TfLiteParser.cpp
@@ -648,6 +648,7 @@ TfLiteParserImpl::TfLiteParserImpl(const Optional<ITfLiteParser::TfLiteParserOpt
     m_ParserFunctions[tflite::BuiltinOperator_RESIZE_BILINEAR]         = &TfLiteParserImpl::ParseResizeBilinear;
     m_ParserFunctions[tflite::BuiltinOperator_RESIZE_NEAREST_NEIGHBOR] = &TfLiteParserImpl::ParseResizeNearestNeighbor;
     m_ParserFunctions[tflite::BuiltinOperator_RSQRT]                   = &TfLiteParserImpl::ParseRsqrt;
+    m_ParserFunctions[tflite::BuiltinOperator_SHAPE]                   = &TfLiteParserImpl::ParseShape;
     m_ParserFunctions[tflite::BuiltinOperator_SLICE]                   = &TfLiteParserImpl::ParseSlice;
     m_ParserFunctions[tflite::BuiltinOperator_SOFTMAX]                 = &TfLiteParserImpl::ParseSoftmax;
     m_ParserFunctions[tflite::BuiltinOperator_SPACE_TO_BATCH_ND]       = &TfLiteParserImpl::ParseSpaceToBatchND;
@@ -1637,6 +1638,41 @@ armnn::TensorInfo TfLiteParserImpl::OutputShapeOfSqueeze(const std::vector<uint3
     return outTensorInfo;
 }
 
+void TfLiteParserImpl::ParseShape(size_t subgraphIndex, size_t operatorIndex)
+{
+    CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
+
+    auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
+    CHECK_VALID_SIZE(inputs.size(), 1);
+    auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
+    CHECK_VALID_SIZE(outputs.size(), 1);
+
+    auto layerName = fmt::format("Shape:{}:{}", subgraphIndex, operatorIndex);
+
+    IConnectableLayer* layer = m_Network->AddShapeLayer(layerName.c_str());
+    ARMNN_ASSERT(layer != nullptr);
+
+
+    TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
+    layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
+
+    // Check if output tensor type is Signed32 or Signed64
+    if (outputTensorInfo.GetDataType() != armnn::DataType::Signed32 &&
+        outputTensorInfo.GetDataType() != armnn::DataType::Signed64)
+    {
+        throw ParseException(
+            fmt::format(
+                "Output tensor data type is not supported. (Supported types: Signed32 & Signed64) {}",
+                CHECK_LOCATION().AsString()));
+    }
+
+    auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
+    RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
+
+    auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
+    RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
+}
+
 void TfLiteParserImpl::ParseSqueeze(size_t subgraphIndex, size_t operatorIndex)
 {
     CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
diff --git a/src/armnnTfLiteParser/TfLiteParser.hpp b/src/armnnTfLiteParser/TfLiteParser.hpp
index da2ae126da..836c4e8f51 100644
--- a/src/armnnTfLiteParser/TfLiteParser.hpp
+++ b/src/armnnTfLiteParser/TfLiteParser.hpp
@@ -144,6 +144,7 @@ private:
     void ParseResizeBilinear(size_t subgraphIndex, size_t operatorIndex);
     void ParseResizeNearestNeighbor(size_t subgraphIndex, size_t operatorIndex);
     void ParseRsqrt(size_t subgraphIndex, size_t operatorIndex);
+    void ParseShape(size_t subgraphIndex, size_t operatorIndex);
     void ParseSlice(size_t subgraphIndex, size_t operatorIndex);
     void ParseSoftmax(size_t subgraphIndex, size_t operatorIndex);
     void ParseSpaceToBatchND(size_t subgraphIndex, size_t operatorIndex);
diff --git a/src/armnnTfLiteParser/test/Shape.cpp b/src/armnnTfLiteParser/test/Shape.cpp
new file mode 100644
index 0000000000..c82bc4ef57
--- /dev/null
+++ b/src/armnnTfLiteParser/test/Shape.cpp
@@ -0,0 +1,84 @@
+//
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// SPDX-License-Identifier: MIT
+//
+
+#include "ParserFlatbuffersFixture.hpp"
+#include "../TfLiteParser.hpp"
+
+TEST_SUITE("TensorflowLiteParser_Shape")
+{
+struct ShapeFixture : public ParserFlatbuffersFixture
+{
+    explicit ShapeFixture(const std::string& inputShape,
+                          const std::string& outputShape,
+                          const std::string& inputDataType,
+                          const std::string& outputDataType)
+     {
+        m_JsonString = R"(
+            {
+                "version": 3,
+                "operator_codes": [ { "builtin_code": "SHAPE" } ],
+                "subgraphs": [ {
+                    "tensors": [
+                        {
+                            "shape": )" + inputShape + R"(,
+                            "type": )" + inputDataType + R"(,
+                            "buffer": 0,
+                            "name": "inputTensor",
+                            "quantization": {
+                                "min": [ 0.0 ],
+                                "max": [ 255.0 ],
+                                "scale": [ 1.0 ],
+                                "zero_point": [ 0 ],
+                            }
+                        },
+                        {
+                            "shape": )" + outputShape + R"(,
+                            "type": )" + outputDataType + R"(,
+                            "buffer": 1,
+                            "name": "outputTensor",
+                            "quantization": {
+                                "min": [ 0.0 ],
+                                "max": [ 255.0 ],
+                                "scale": [ 1.0 ],
+                                "zero_point": [ 0 ],
+                            }
+                        }
+                    ],
+                    "inputs": [ 0 ],
+                    "outputs": [ 1 ],
+                    "operators": [
+                        {
+                          "opcode_index": 0,
+                          "inputs": [ 0 ],
+                          "outputs": [ 1 ],
+                          "custom_options_format": "FLEXBUFFERS"
+                        }
+                    ],
+                } ],
+                "buffers" : [ {}, {} ]
+            }
+        )";
+        SetupSingleInputSingleOutput("inputTensor", "outputTensor");
+    }
+};
+
+
+struct SimpleShapeFixture : ShapeFixture
+{
+    SimpleShapeFixture() : ShapeFixture("[ 1, 3, 3, 1 ]",
+                                       "[ 4 ]",
+                                       "INT32",
+                                       "INT32") {}
+};
+
+TEST_CASE_FIXTURE(SimpleShapeFixture, "SimpleShapeFixture")
+{
+    RunTest<1, armnn::DataType::Signed32>(
+            0,
+            {{"inputTensor", { 1, 1, 1, 1, 1, 1, 1, 1, 1 }}},
+            {{"outputTensor",{ 1, 3, 3, 1 }}});
+}
+
+}
\ No newline at end of file