GitHub #719 Set quantization parameter scale to 1.0, instead of 0.0.

* Arm NN does not account for int8 or uint8 not quantized types, Tensorflow does.
Not quantized int8 and uint8 is the same as quantized int8 and uint8 with scale = 1.0 and offset= 0
Default offset/zero_point was already 0, this review sets the default scale to 1.0.

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ibc3eecc281de516c2cc706e17bde01c64ff9556e

9 files changed, 34 insertions, 34 deletions

diff --git a/src/backends/backendsCommon/test/WorkloadDataValidation.cpp b/src/backends/backendsCommon/test/WorkloadDataValidation.cpp
index 2a09f6508f..6125e62cb2 100644
--- a/src/backends/backendsCommon/test/WorkloadDataValidation.cpp
+++ b/src/backends/backendsCommon/test/WorkloadDataValidation.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017,2022 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017,2022-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -494,7 +494,7 @@ TEST_CASE("LstmQueueDescriptor_Validate")
 {
     armnn::DataType dataType = armnn::DataType::Float32;
 
-    float qScale = 0.0f;
+    float qScale = 1.0f;
     int32_t qOffset = 0;
 
     unsigned int batchSize = 2;
diff --git a/src/backends/backendsCommon/test/layerTests/ActivationTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/ActivationTestImpl.cpp
index 1ef47ddf7b..1dcbdfac9e 100644
--- a/src/backends/backendsCommon/test/layerTests/ActivationTestImpl.cpp
+++ b/src/backends/backendsCommon/test/layerTests/ActivationTestImpl.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -316,7 +316,7 @@ LayerTestResult<T, 4> ConstantLinearActivationTestCommon(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
     const armnn::ITensorHandleFactory& tensorHandleFactory,
-    float qScale = 0.0f,
+    float qScale = 1.0f,
     int32_t qOffset = 0)
 {
     IgnoreUnused(memoryManager);
@@ -1226,7 +1226,7 @@ LayerTestResult<T, 4> CompareActivationTestImpl(
     const armnn::ITensorHandleFactory& refTensorHandleFactory,
     armnn::ActivationFunction f,
     unsigned int batchSize = 5,
-    float qScale = 0.0f,
+    float qScale = 1.0f,
     int32_t qOffset = 0)
 {
     IgnoreUnused(memoryManager);
diff --git a/src/backends/backendsCommon/test/layerTests/FullyConnectedTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/FullyConnectedTestImpl.cpp
index f7519a73bc..35496ce3b2 100644
--- a/src/backends/backendsCommon/test/layerTests/FullyConnectedTestImpl.cpp
+++ b/src/backends/backendsCommon/test/layerTests/FullyConnectedTestImpl.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017,2022 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017,2022-2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -172,7 +172,7 @@ LayerTestResult<T, 2> FullyConnectedLargeTestCommon(
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
     const armnn::ITensorHandleFactory& tensorHandleFactory,
     bool transposeWeights,
-    float qScale = 0.0f,
+    float qScale = 1.0f,
     int32_t qOffset = 0)
 {
     unsigned int inputWidth = 1;
diff --git a/src/backends/backendsCommon/test/layerTests/InstanceNormalizationTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/InstanceNormalizationTestImpl.cpp
index 8d03ff6ea9..ff58506444 100644
--- a/src/backends/backendsCommon/test/layerTests/InstanceNormalizationTestImpl.cpp
+++ b/src/backends/backendsCommon/test/layerTests/InstanceNormalizationTestImpl.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2019 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2019, 2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -32,7 +32,7 @@ LayerTestResult<T, 4> InstanceNormTestImpl(
     const std::vector<float>& inputValues,
     const std::vector<float>& expectedOutputValues,
     armnn::InstanceNormalizationQueueDescriptor descriptor,
-    float qScale = 0.0f,
+    float qScale = 1.0f,
     int32_t qOffset = 0)
 {
     IgnoreUnused(memoryManager);
diff --git a/src/backends/backendsCommon/test/layerTests/LstmTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/LstmTestImpl.cpp
index 2eaaeb5c9b..d666dcbeb1 100644
--- a/src/backends/backendsCommon/test/layerTests/LstmTestImpl.cpp
+++ b/src/backends/backendsCommon/test/layerTests/LstmTestImpl.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -33,7 +33,7 @@ void LstmUtilsVectorBatchVectorAddTestImpl(
         std::vector<float>& expectedOutput,
         armnn::TensorShape& expectedShape)
 {
-    float qScale = 0.0f;
+    float qScale = 1.0f;
     int32_t qOffset = 0;
     armnn::TensorInfo tensorInfo({nBatch, vSize}, ArmnnType,  qScale, qOffset );
 
@@ -60,7 +60,7 @@ void LstmUtilsZeroVectorTestImpl(
         std::vector<float>& expectedOutput,
         armnn::TensorShape& expectedShape)
 {
-    float qScale = 0.0f;
+    float qScale = 1.0f;
     int32_t qOffset = 0;
 
     armnn::TensorInfo tensorInfo({vSize}, ArmnnType,  qScale, qOffset );
@@ -89,7 +89,7 @@ void LstmUtilsMeanStddevNormalizationTestImpl(
         std::vector<float>& expectedOutput,
         armnn::TensorShape& expectedShape)
 {
-    float qScale = 0.0f;
+    float qScale = 1.0f;
     int32_t qOffset = 0;
     armnn::TensorInfo tensorInfo({nBatch, vSize}, ArmnnType,  qScale, qOffset );
 
@@ -117,7 +117,7 @@ void LstmUtilsVectorBatchVectorCwiseProductTestImpl(
         std::vector<float>& expectedOutput,
         armnn::TensorShape& expectedShape)
 {
-    float qScale = 0.0f;
+    float qScale = 1.0f;
     int32_t qOffset = 0;
     armnn::TensorInfo tensorInfo({nBatch, vSize}, ArmnnType,  qScale, qOffset );
 
@@ -149,7 +149,7 @@ LstmNoCifgNoPeepholeNoProjectionTestImpl(
         const std::vector<T>& outputExpected,
         const armnn::TensorShape& inputShape,
         const armnn::TensorShape& outputExpectedShape,
-        float qScale = 0.0f,
+        float qScale = 1.0f,
         int32_t qOffset = 0,
         armnn::DataType constantDataType = armnn::DataType::Float32)
 {
@@ -345,7 +345,7 @@ LstmLayerNoCifgWithPeepholeWithProjectionTestImpl(armnn::IWorkloadFactory& workl
                                                   const armnn::ITensorHandleFactory& tensorHandleFactory,
                                                   const std::vector<T>& input,
                                                   const std::vector<T>& outputExpected,
-                                                  float qScale = 0.0f,
+                                                  float qScale = 1.0f,
                                                   int32_t qOffset = 0,
                                                   armnn::DataType constantDataType = armnn::DataType::Float32)
 {
@@ -1020,7 +1020,7 @@ LayerTestResult<T, 2> LstmLayerWithCifgWithPeepholeNoProjectionTestImpl(
         const std::vector<T>& outputExpected,
         const armnn::TensorShape& inputShape,
         const armnn::TensorShape& outputExpectedShape,
-        float qScale = 0.0f,
+        float qScale = 1.0f,
         int32_t qOffset = 0,
         armnn::DataType constantDataType = armnn::DataType::Float32)
 {
@@ -1252,7 +1252,7 @@ LstmLayerNoCifgWithPeepholeWithProjectionWithLayerNormTestImpl(armnn::IWorkloadF
                                                   const armnn::ITensorHandleFactory& tensorHandleFactory,
                                                   const std::vector<T>& input,
                                                   const std::vector<T>& outputExpected,
-                                                  float qScale = 0.0f,
+                                                  float qScale = 1.0f,
                                                   int32_t qOffset = 0,
                                                   armnn::DataType constantDataType = armnn::DataType::Float32)
 {
diff --git a/src/backends/backendsCommon/test/layerTests/SplitterTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/SplitterTestImpl.cpp
index 9e9c29b088..9e3d83c0f4 100644
--- a/src/backends/backendsCommon/test/layerTests/SplitterTestImpl.cpp
+++ b/src/backends/backendsCommon/test/layerTests/SplitterTestImpl.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -22,7 +22,7 @@ std::vector<LayerTestResult<T,3>> SplitterTestCommon(
     armnn::IWorkloadFactory& workloadFactory,
     const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager,
     const armnn::ITensorHandleFactory& tensorHandleFactory,
-    float qScale = 0.0f,
+    float qScale = 1.0f,
     int32_t qOffset = 0)
 {
     IgnoreUnused(memoryManager);
diff --git a/src/backends/backendsCommon/test/layerTests/UnidirectionalSequenceLstmTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/UnidirectionalSequenceLstmTestImpl.cpp
index 6effa9c85d..4a63d39800 100644
--- a/src/backends/backendsCommon/test/layerTests/UnidirectionalSequenceLstmTestImpl.cpp
+++ b/src/backends/backendsCommon/test/layerTests/UnidirectionalSequenceLstmTestImpl.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -26,7 +26,7 @@ UnidirectionalSequenceLstmTimeMajorSingleBatchTestImpl(
     const std::vector<T>& outputExpected,
     const armnn::TensorShape& inputShape,
     const armnn::TensorShape& outputExpectedShape,
-    float qScale = 0.0f,
+    float qScale = 1.0f,
     int32_t qOffset = 0,
     armnn::DataType constantDataType = armnn::DataType::Float32)
 {
@@ -222,7 +222,7 @@ LayerTestResult<T, 3> UnidirectionalSequenceLstmLayerFloat32TestImpl(
     const std::vector<T>& outputExpected,
     const armnn::TensorShape& inputShape,
     const armnn::TensorShape& outputExpectedShape,
-    float qScale = 0.0f,
+    float qScale = 1.0f,
     int32_t qOffset = 0,
     armnn::DataType constantDataType = armnn::DataType::Float32) {
     IgnoreUnused(memoryManager);
@@ -411,7 +411,7 @@ UnidirectionalSequenceLstmLayerFloat32TimeMajorTestImpl(
     const std::vector<T>& outputExpected,
     const armnn::TensorShape& inputShape,
     const armnn::TensorShape& outputExpectedShape,
-    float qScale = 0.0f,
+    float qScale = 1.0f,
     int32_t qOffset = 0,
     armnn::DataType constantDataType = armnn::DataType::Float32) {
     IgnoreUnused(memoryManager);
diff --git a/src/backends/neon/test/NeonCreateWorkloadTests.cpp b/src/backends/neon/test/NeonCreateWorkloadTests.cpp
index 66718cc481..96429a84e1 100644
--- a/src/backends/neon/test/NeonCreateWorkloadTests.cpp
+++ b/src/backends/neon/test/NeonCreateWorkloadTests.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -357,8 +357,8 @@ static void NeonCreateFullyConnectedWorkloadTest()
     auto outputHandle = PolymorphicDowncast<IAclTensorHandle*>(queueDescriptor.m_Outputs[0]);
 
     // Checks that outputs and inputs are as we expect them (see definition of CreateFullyConnectedWorkloadTest).
-    float inputsQScale = DataType == armnn::DataType::QAsymmU8 ? 1.0f : 0.0;
-    float outputQScale = DataType == armnn::DataType::QAsymmU8 ? 2.0f : 0.0;
+    float inputsQScale = 1.0f;
+    float outputQScale = DataType == armnn::DataType::QAsymmU8 ? 2.0f : 1.0;
     CHECK(TestNeonTensorHandleInfo(inputHandle, TensorInfo({3, 1, 4, 5}, DataType, inputsQScale)));
     CHECK(TestNeonTensorHandleInfo(outputHandle, TensorInfo({3, 7}, DataType, outputQScale)));
 }
diff --git a/src/backends/reference/test/RefCreateWorkloadTests.cpp b/src/backends/reference/test/RefCreateWorkloadTests.cpp
index c46a9e5bac..894dd75ef2 100644
--- a/src/backends/reference/test/RefCreateWorkloadTests.cpp
+++ b/src/backends/reference/test/RefCreateWorkloadTests.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
+// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -479,8 +479,8 @@ TEST_CASE("RefCreateFullyConnectedWithBlobWorkloadTest")
                                                          armnn::DataType::Float32>(factory, graph);
 
     // Checks that outputs and inputs are as we expect them (see definition of CreateFullyConnectedWorkloadTest).
-    float inputsQScale = 0.0f;
-    float outputQScale = 0.0f;
+    float inputsQScale = 1.0f;
+    float outputQScale = 1.0f;
     CheckInputOutput(std::move(workload),
         TensorInfo({ 3, 1, 4, 5 }, armnn::DataType::Float32, inputsQScale),
         TensorInfo({ 3, 7 }, armnn::DataType::Float32, outputQScale));
@@ -496,8 +496,8 @@ TEST_CASE("CreateFullyConnectedWorkloadWeightsBiasesAsInputsFloat32")
                                                                   armnn::DataType::Float32>(factory, graph);
 
     // Checks that outputs and inputs are as we expect them (see definition of CreateFullyConnectedWorkloadTest).
-    float inputsQScale = 0.0f;
-    float outputQScale = 0.0f;
+    float inputsQScale = 1.0f;
+    float outputQScale = 1.0f;
     CheckInputsOutput(std::move(workload),
                       TensorInfo({ 3, 1, 4, 5 }, armnn::DataType::Float32, inputsQScale),
                       TensorInfo({ 7, 20 }, armnn::DataType::Float32, inputsQScale),
@@ -512,8 +512,8 @@ static void RefCreateFullyConnectedWorkloadTest()
     auto workload = CreateFullyConnectedWorkloadTest<FullyConnectedWorkloadType, DataType>(factory, graph);
 
     // Checks that outputs and inputs are as we expect them (see definition of CreateFullyConnectedWorkloadTest).
-    float inputsQScale = DataType == armnn::DataType::QAsymmU8 ? 1.0f : 0.0;
-    float outputQScale = DataType == armnn::DataType::QAsymmU8 ? 2.0f : 0.0;
+    float inputsQScale = DataType == armnn::DataType::QAsymmU8 ? 1.0f : 1.0f;
+    float outputQScale = DataType == armnn::DataType::QAsymmU8 ? 2.0f : 1.0f;
     CheckInputOutput(std::move(workload),
         TensorInfo({ 3, 1, 4, 5 }, DataType, inputsQScale),
         TensorInfo({ 3, 7 }, DataType, outputQScale));