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authorjimfly01 <jim.flynn@arm.com>2018-10-26 15:55:50 +0100
committerLes Bell <les.bell@arm.com>2018-10-29 14:54:10 +0000
commit382a91d5029e83002bda4ab006f9c73340d679fe (patch)
tree0f96de71540963208a028806c4290d87ece2f9ce /src/backends/test/LayerTests.hpp
parent19483db955cfa570d04d0fdf65bf8fad161ea3e9 (diff)
downloadarmnn-382a91d5029e83002bda4ab006f9c73340d679fe.tar.gz
IVGCVSW-2074: Updated DepthwiseConvolution2dAsymmetricTest for NHWC
Change-Id: I1bc8d2f270d4abfaa62e4843b8d96bcf462c6b09
Diffstat (limited to 'src/backends/test/LayerTests.hpp')
-rw-r--r--src/backends/test/LayerTests.hpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/backends/test/LayerTests.hpp b/src/backends/test/LayerTests.hpp
index 8846297ff1..fec73d08f4 100644
--- a/src/backends/test/LayerTests.hpp
+++ b/src/backends/test/LayerTests.hpp
@@ -81,7 +81,8 @@ LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul1Test(armnn::IWorkloadFa
bool biasEnabled);
LayerTestResult<float, 4> DepthwiseConvolution2dAsymmetricTest(armnn::IWorkloadFactory& workloadFactory,
- bool biasEnabled);
+ bool biasEnabled,
+ const armnn::DataLayoutIndexed& layout);
LayerTestResult<float, 4> SimpleMaxPooling2dSize2x2Stride2x2Test(armnn::IWorkloadFactory& workloadFactory,
bool forceNoPadding);