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| author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2020-03-16 16:36:10 +0000 |
|---|---|---|
| committer | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2020-03-19 15:41:12 +0000 |
| commit | ea54a01f6bd30f013cbe88ae1751985bc86b6af5 (patch) | |
| tree | 7edb7d659ea4210c1256beb5edf57601b317c82d /src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp | |
| parent | 25334cf3d53fe7fff98776b44a199ca341f62f1a (diff) | |
| download | armnn-ea54a01f6bd30f013cbe88ae1751985bc86b6af5.tar.gz | |
IVGCVSW-4516 Add ConvertFp32ToBf16Layer and Ref workload support
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I9099a4f840fb747336f77d20a0868b64e801a310
Diffstat (limited to 'src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp')
| -rw-r--r-- | src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp b/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp new file mode 100644 index 0000000000..181b236e83 --- /dev/null +++ b/src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp @@ -0,0 +1,27 @@ +// +// Copyright © 2020 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "RefConvertFp32ToBf16Workload.hpp" +#include "RefWorkloadUtils.hpp" + +#include <armnnUtils/FloatingPointConverter.hpp> + +#include <BFloat16.hpp> + +namespace armnn +{ + +void RefConvertFp32ToBf16Workload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefConvertFp32ToBf16Workload_Execute"); + + const float* const input = GetInputTensorDataFloat(0, m_Data); + BFloat16* const output = GetOutputTensorDataBFloat16(0, m_Data); + + unsigned int numElements = GetTensorInfo(m_Data.m_Inputs[0]).GetNumElements(); + armnnUtils::FloatingPointConverter::ConvertFloat32ToBFloat16(input, numElements, output); +} + +} //namespace armnn |