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| author | Nikhil Raj <nikhil.raj@arm.com> | 2018-10-18 10:11:04 +0100 |
|---|---|---|
| committer | Matthew Bentham <matthew.bentham@arm.com> | 2018-10-22 16:57:54 +0100 |
| commit | e4dfd6ead59e17828f8814f0ecc5fa67f0c72868 (patch) | |
| tree | bb3da260b428d16987374ad3482c46ebb68c20fc /src/backends/reference/test/RefLayerTests.cpp | |
| parent | 3e9e11541c177abd7101962ef1e703d70d718c56 (diff) | |
| download | armnn-e4dfd6ead59e17828f8814f0ecc5fa67f0c72868.tar.gz | |
IVGCVSW-1865 - Support NHWC for Convolution2D (CpuRef)
* Updated the ConvImpl.hpp to use DataLayoutIndex
* Enabled unit test for CpuRef
* Update CreateWorkload Tests for ref with NHWC
Change-Id: Id309b7ef677489d63dcb5e09bd48ab9624b5ebfb
Diffstat (limited to 'src/backends/reference/test/RefLayerTests.cpp')
| -rw-r--r-- | src/backends/reference/test/RefLayerTests.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/backends/reference/test/RefLayerTests.cpp b/src/backends/reference/test/RefLayerTests.cpp index 21371611bb..259739ba55 100644 --- a/src/backends/reference/test/RefLayerTests.cpp +++ b/src/backends/reference/test/RefLayerTests.cpp @@ -36,6 +36,8 @@ ARMNN_AUTO_TEST_CASE(SimpleConvolution2dAsymmetricPaddingLargerThanHalfKernelSiz Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest) ARMNN_AUTO_TEST_CASE(SimpleConvolution2dAsymmetricPadding, Convolution2dAsymmetricPaddingTest) +ARMNN_AUTO_TEST_CASE(SimpleConvolution2dSquareNhwc, SimpleConvolution2d3x3NhwcTest, false) + // Depthwise Convolution ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2d, DepthwiseConvolution2dTest, true) ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dUint8, DepthwiseConvolution2dUint8Test, true) |