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| author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2022-01-28 17:59:18 +0000 |
|---|---|---|
| committer | Jim Flynn <jim.flynn@arm.com> | 2022-01-31 12:53:51 +0000 |
| commit | e2af6f4322a1e2b8b3c391fb721a6a80c281477f (patch) | |
| tree | b0dd53289e27304a6d724821459cb0f4b6343a39 /src/backends/cl/workloads/ClConvolution2dWorkload.cpp | |
| parent | fd313fef775ed210f8dab84452ea382a0b4164b0 (diff) | |
| download | armnn-e2af6f4322a1e2b8b3c391fb721a6a80c281477f.tar.gz | |
IVGCVSW-6552 Add support of aligned host memory
* Add AllocatedData functions to OutputHandler
* Enable import aligned memory in ImportInputs
* Enable import aligned memory in ImportOutputs
* Allow to import input and output if the memory is aligned
* Implement Reconfigure function on ClConvolution2dWorkload
* End-to-end test on Ref and Cl to ensure that input and output memory
are imported when aligned
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I9e5e4c26d1ac2f1d806803ade5f64c6479c51718
Diffstat (limited to 'src/backends/cl/workloads/ClConvolution2dWorkload.cpp')
| -rw-r--r-- | src/backends/cl/workloads/ClConvolution2dWorkload.cpp | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp index 705e92d307..cdfa885f67 100644 --- a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp +++ b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp @@ -90,6 +90,10 @@ ClConvolution2dWorkload::ClConvolution2dWorkload(const Convolution2dQueueDescrip arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + // Create Proxy tensor and set the initial tensor handle to it + m_InputProxy = std::make_unique<ICLTensorProxy>(&input); + m_OutputProxy = std::make_unique<ICLTensorProxy>(&output); + arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); input.info()->set_data_layout(aclDataLayout); output.info()->set_data_layout(aclDataLayout); @@ -101,10 +105,10 @@ ClConvolution2dWorkload::ClConvolution2dWorkload(const Convolution2dQueueDescrip { ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "ClConvolution2dWorkload_configure"); m_ConvolutionLayer.configure(clCompileContext, - &input, + m_InputProxy.get(), m_KernelTensor.get(), m_BiasTensor.get(), - &output, + m_OutputProxy.get(), padStrideInfo, arm_compute::WeightsInfo(), aclDilationInfo, @@ -174,4 +178,13 @@ void ClConvolution2dWorkload::FreeUnusedTensors() FreeTensorIfUnused(m_BiasTensor); } +void ClConvolution2dWorkload::Reconfigure() +{ + ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "ClConvolution2dWorkload_Reconfigure"); + arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); + m_InputProxy->set(&input); + m_OutputProxy->set(&output); +} + } //namespace armnn |