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| author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2021-05-24 18:50:24 +0100 |
|---|---|---|
| committer | Jim Flynn <jim.flynn@arm.com> | 2021-05-25 13:09:40 +0000 |
| commit | bfaee6b574301a54eab07a6021c39ae710977f7f (patch) | |
| tree | 2283bebc47633d744880af8530bf1603ff131f0f /src/armnnTfLiteParser/test/Prelu.cpp | |
| parent | 37c430efaa85f84905cf96ace21f310339374053 (diff) | |
| download | armnn-bfaee6b574301a54eab07a6021c39ae710977f7f.tar.gz | |
IVGCVSW-3649 Add TfLite parser support for Prelu layer
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I3dedcc86efe1a67c709d9da636953e2fc400107b
Diffstat (limited to 'src/armnnTfLiteParser/test/Prelu.cpp')
| -rw-r--r-- | src/armnnTfLiteParser/test/Prelu.cpp | 159 |
1 files changed, 159 insertions, 0 deletions
diff --git a/src/armnnTfLiteParser/test/Prelu.cpp b/src/armnnTfLiteParser/test/Prelu.cpp new file mode 100644 index 0000000000..b4aa8d7f4d --- /dev/null +++ b/src/armnnTfLiteParser/test/Prelu.cpp @@ -0,0 +1,159 @@ +// +// Copyright © 2021 Arm Ltd. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include <boost/test/unit_test.hpp> +#include "ParserFlatbuffersFixture.hpp" +#include "../TfLiteParser.hpp" + +#include <string> + +BOOST_AUTO_TEST_SUITE(TensorflowLiteParser) + +struct PreluFixture : public ParserFlatbuffersFixture +{ + explicit PreluFixture(const std::string& inputShape, + const std::string& alphaShape, + const std::string& outputShape, + const std::string& inputIndex, + const std::string& alphaData) + { + m_JsonString = R"( + { + "version": 3, + "operator_codes": [ + { + "builtin_code": "PRELU", + "version": 1 + } + ], + "subgraphs": [ + { + "tensors": [ + { + "shape": )" + inputShape + R"(, + "type": "FLOAT32", + "buffer": 1, + "name": "input0", + "quantization": { + "details_type": "NONE", + "quantized_dimension": 0 + }, + "is_variable": false + }, + { + "shape": )" + alphaShape + R"(, + "type": "FLOAT32", + "buffer": 2, + "name": "input1", + "quantization": { + "details_type": "NONE", + "quantized_dimension": 0 + }, + "is_variable": false + }, + { + "shape": )" + outputShape + R"(, + "type": "FLOAT32", + "buffer": 3, + "name": "output", + "quantization": { + "details_type": "NONE", + "quantized_dimension": 0 + }, + "is_variable": false + } + ], + "inputs": )" + inputIndex + R"(, + "outputs": [ + 2 + ], + "operators": [ + { + "opcode_index": 0, + "inputs": [ + 0, + 1 + ], + "outputs": [ + 2 + ], + "builtin_options_type": "NONE", + "custom_options_format": "FLEXBUFFERS" + } + ], + "name": "main" + } + ], + "description": "MLIR Converted.", + "buffers": [ + { + }, + { + }, + { )" + alphaData + R"( + }, + { + } + ] + } + )"; + Setup(); + } +}; + +struct SimplePreluFixture : PreluFixture +{ + SimplePreluFixture() : PreluFixture("[ 2, 3 ]", + "[ 1, 1 ]", + "[ 2, 3 ]", + "[ 0, 1 ]", + "") {} +}; + +struct PreluConstAlphaFixture : PreluFixture +{ + PreluConstAlphaFixture() : PreluFixture( + "[ 2, 3 ]", + "[ 2, 3 ]", + "[ 2, 3 ]", + "[ 0 ]", + "\"data\": [ 0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 128, 62, 0, 0, 128, 62 ]"){} +}; + +struct PreluDynamicTensorFixture : PreluFixture +{ + PreluDynamicTensorFixture() : PreluFixture("[ 2, 3 ]", + "[ 1, 1 ]", + "[]", + "[ 0 ]", + "\"data\": [ 0, 0, 128, 62 ]") {} +}; + +BOOST_FIXTURE_TEST_CASE(SimplePrelu, SimplePreluFixture) +{ + RunTest<2, armnn::DataType::Float32>( + 0, + {{"input0", { -14.f, 2.f, 0.f, 1.f, -5.f, 14.f }},{"input1", { 0.25f }}}, + {{"output", { -3.5f, 2.f, 0.f, 1.f, -1.25f, 14.f }}}); +} + +BOOST_FIXTURE_TEST_CASE(PreluConstAlpha, PreluConstAlphaFixture) +{ + RunTest<2, armnn::DataType::Float32>( + 0, + {{"input0", { -14.f, 2.f, 0.f, 1.f, -5.f, 14.f }}}, + {{"output", { -3.5f, 2.f, 0.f, 1.f, -1.25f, 14.f }}}); +} + +BOOST_FIXTURE_TEST_CASE(PreluDynamicTensor, PreluDynamicTensorFixture) +{ + RunTest<2, armnn::DataType::Float32, armnn::DataType::Float32>( + 0, + {{"input0", { -14.f, 2.f, 0.f, 1.f, -5.f, 14.f }}}, + {{"output", { -3.5f, 2.f, 0.f, 1.f, -1.25f, 14.f }}}, + true); +} + +BOOST_AUTO_TEST_SUITE_END() |