Release 18.05

134 files changed, 4113 insertions, 2392 deletions

diff --git a/src/armnn/Descriptors.cpp b/src/armnn/Descriptors.cpp
index 0b11b44260..be04294e85 100644
--- a/src/armnn/Descriptors.cpp
+++ b/src/armnn/Descriptors.cpp
@@ -177,22 +177,30 @@ ViewsDescriptor::ViewsDescriptor()
 
 ViewsDescriptor::ViewsDescriptor(uint32_t numViews, uint32_t numDimensions /*= 4*/)
     : m_Origins(numViews, numDimensions)
-    , m_ViewSizes(numViews && numDimensions > 0 ? new uint32_t *[numViews]() : nullptr)
+    , m_ViewSizes(numViews > 0 && numDimensions > 0 ?
+                      new uint32_t *[numViews]() : nullptr)
 {
-    for (uint32_t i = 0; GetNumDimensions() > 0 && i < GetNumViews(); ++i)
+    if (m_ViewSizes)
     {
-        m_ViewSizes[i] = new uint32_t[GetNumDimensions()]();
+        for (uint32_t i = 0; GetNumDimensions() > 0 && i < GetNumViews(); ++i)
+        {
+            m_ViewSizes[i] = new uint32_t[GetNumDimensions()]();
+        }
     }
 }
 
 ViewsDescriptor::ViewsDescriptor(const ViewsDescriptor& other)
     : m_Origins(other.m_Origins)
-    , m_ViewSizes(other.GetNumViews() && other.GetNumDimensions() > 0 ? new uint32_t *[other.GetNumViews()]() : nullptr)
+    , m_ViewSizes(other.GetNumViews() > 0 && other.GetNumDimensions() > 0 ?
+                      new uint32_t *[other.GetNumViews()]() : nullptr)
 {
-    for (uint32_t i = 0; GetNumDimensions() > 0 && i < GetNumViews(); ++i)
+    if (m_ViewSizes)
     {
-        m_ViewSizes[i] = new uint32_t[GetNumDimensions()]();
-        memcpy(m_ViewSizes[i], other.m_ViewSizes[i], GetNumDimensions() * sizeof(uint32_t));
+        for (uint32_t i = 0; GetNumDimensions() > 0 && i < GetNumViews(); ++i)
+        {
+            m_ViewSizes[i] = new uint32_t[GetNumDimensions()]();
+            memcpy(m_ViewSizes[i], other.m_ViewSizes[i], GetNumDimensions() * sizeof(uint32_t));
+        }
     }
 }
 
@@ -204,11 +212,14 @@ ViewsDescriptor::ViewsDescriptor(ViewsDescriptor&& other)
 
 ViewsDescriptor::~ViewsDescriptor()
 {
-    for (uint32_t i = 0; GetNumDimensions() > 0 && i < GetNumViews(); ++i)
+    if (m_ViewSizes)
     {
-        delete[] m_ViewSizes[i];
+        for (uint32_t i = 0; GetNumDimensions() > 0 && i < GetNumViews(); ++i)
+        {
+            delete[] m_ViewSizes[i];
+        }
+        delete[] m_ViewSizes;
     }
-    delete[] m_ViewSizes;
 }
 
 ViewsDescriptor& ViewsDescriptor::operator=(ViewsDescriptor rhs)
@@ -239,6 +250,12 @@ Status ViewsDescriptor::SetViewOriginCoord(uint32_t view, uint32_t coord, uint32
 
 Status ViewsDescriptor::SetViewSize(uint32_t view, uint32_t coord, uint32_t value)
 {
+    if (!m_ViewSizes)
+    {
+        BOOST_LOG_TRIVIAL(error) << "ViewsDescriptor::SetViewSize: invalid view sizes";
+        return Status::Failure;
+    }
+
     if (view >= GetNumViews())
     {
         BOOST_LOG_TRIVIAL(error) << "ViewsDescriptor::SetViewSize: view argument:" << view <<
diff --git a/src/armnn/Graph.cpp b/src/armnn/Graph.cpp
index af3b17ea8b..87bdc2962f 100644
--- a/src/armnn/Graph.cpp
+++ b/src/armnn/Graph.cpp
@@ -3,7 +3,7 @@
 // See LICENSE file in the project root for full license information.
 //
 #include "Graph.hpp"
-#include "Layers.hpp"
+#include "LayersFwd.hpp"
 
 #include <armnn/Utils.hpp>
 #include <armnn/TypesUtils.hpp>
@@ -121,20 +121,7 @@ Status Graph::SerializeToDot(std::ostream& stream)
                 {
                     // Construct the label attribute with HTML markup
                     std::stringstream ss;
-                    {
-                        ss << "< [";
-                        const TensorShape& shape = outputSlot->GetTensorInfo().GetShape();
-                        for (unsigned int i = 0; i < shape.GetNumDimensions(); i++)
-                        {
-                            if (i != 0)
-                            {
-                                ss << ",";
-                            }
-                            ss << shape[i];
-                        }
-                        ss << "] >";
-                    }
-
+                    ss << "< " << outputSlot->GetTensorInfo().GetShape() << " >";
                     edge.GetAttributeSet().AddAttribute("label", ss);
                 }
             }
diff --git a/src/armnn/Graph.hpp b/src/armnn/Graph.hpp
index 34aefbf085..06b6fd32ae 100644
--- a/src/armnn/Graph.hpp
+++ b/src/armnn/Graph.hpp
@@ -4,7 +4,7 @@
 //
 #pragma once
 
-#include "Layers.hpp"
+#include "LayersFwd.hpp"
 
 #include <armnn/Types.hpp>
 #include <armnn/TensorFwd.hpp>
@@ -254,8 +254,8 @@ public:
         }
     }
     template <typename... Args>
-    LayerInGraph(Graph& graph, Iterator insertBefore, Args&&... args)
-        // Ignore insertBefore. Always add to the back of the inputs.
+    LayerInGraph(Graph& graph, Iterator, Args&&... args)
+        // Ignore Iterator argument. Always add to the back of the inputs.
         : LayerInGraph(graph, std::forward<Args>(args)...)
     {
     }
diff --git a/src/armnn/Layer.hpp b/src/armnn/Layer.hpp
index f9f2f22bea..2a199afc24 100644
--- a/src/armnn/Layer.hpp
+++ b/src/armnn/Layer.hpp
@@ -20,6 +20,7 @@
 #include <memory>
 #include <string>
 #include <vector>
+#include <iostream>
 
 #include <boost/numeric/conversion/cast.hpp>
 #include <boost/core/ignore_unused.hpp>
@@ -85,7 +86,19 @@ public:
 
     ~OutputSlot()
     {
-        DisconnectAll();
+        try
+        {
+            // Coverity fix: DisconnectAll() may throw uncaught exceptions.
+            DisconnectAll();
+        }
+        catch (const std::exception& e)
+        {
+            // Coverity fix: BOOST_LOG_TRIVIAL (typically used to report errors) may throw an
+            // exception of type std::length_error.
+            // Using stderr instead in this context as there is no point in nesting try-catch blocks here.
+            std::cerr << "WARNING: An error has occurred when disconnecting all output slots: "
+                      << e.what() << std::endl;
+        }
     }
 
     Layer& GetOwningLayer() const { return m_OwningLayer; }
@@ -140,7 +153,19 @@ inline InputSlot::~InputSlot()
 {
     if (m_Connection != nullptr)
     {
-        m_Connection->Disconnect(*this);
+        try
+        {
+            // Coverity fix: Disconnect() may throw uncaught exceptions.
+            m_Connection->Disconnect(*this);
+        }
+        catch (const std::exception& e)
+        {
+            // Coverity fix: BOOST_LOG_TRIVIAL (typically used to report errors) may throw an
+            // exception of type std::length_error.
+            // Using stderr instead in this context as there is no point in nesting try-catch blocks here.
+            std::cerr << "WARNING: An error has occurred when disconnecting an input slot: "
+                      << e.what() << std::endl;
+        }
     }
 }
 
@@ -221,7 +246,7 @@ public:
 
     /// Helper to serialize the layer parameters to string
     /// (currently used in DotSerializer and company)
-    virtual void SerializeLayerParameters(ParameterStringifyFunction & fn) const {}
+    virtual void SerializeLayerParameters(ParameterStringifyFunction &) const {}
 
     // IConnectableLayer
 
diff --git a/src/armnn/LayerSupport.cpp b/src/armnn/LayerSupport.cpp
index 0567b94905..a0f6276e2b 100644
--- a/src/armnn/LayerSupport.cpp
+++ b/src/armnn/LayerSupport.cpp
@@ -99,12 +99,14 @@ bool IsConstantSupported(Compute compute,
 
 bool IsConvolution2dSupported(Compute compute,
                               const TensorInfo& input,
+                              const TensorInfo& output,
                               const Convolution2dDescriptor& descriptor,
                               const TensorInfo& weights,
+                              const TensorInfo& biases,
                               char* reasonIfUnsupported,
                               size_t reasonIfUnsupportedMaxLength)
 {
-    FORWARD_LAYER_SUPPORT_FUNC(compute, IsConvolution2dSupported, input, descriptor, weights);
+    FORWARD_LAYER_SUPPORT_FUNC(compute, IsConvolution2dSupported, input, output, descriptor, weights, biases);
 }
 
 bool IsDepthwiseConvolutionSupported(Compute compute,
diff --git a/src/armnn/Layers.cpp b/src/armnn/Layers.cpp
deleted file mode 100644
index 48a02aba9c..0000000000
--- a/src/armnn/Layers.cpp
+++ /dev/null
@@ -1,1029 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// See LICENSE file in the project root for full license information.
-//
-#include "Layers.hpp"
-#include "Graph.hpp"
-
-#include "backends/CpuTensorHandle.hpp"
-#include "backends/Workload.hpp"
-#include "backends/WorkloadFactory.hpp"
-
-#include "Permute.hpp"
-
-#include <queue>
-
-
-namespace armnn
-{
-
-template <typename LayerType, typename ... Params>
-LayerType* Layer::CloneBase(Graph& graph, Params&& ... params) const
-{
-    LayerType* const layer = graph.AddLayer<LayerType>(std::forward<Params>(params)...);
-
-    layer->SetComputeDevice(m_ComputeDevice);
-    layer->SetGuid(GetGuid());
-
-    return layer;
-}
-
-ActivationLayer::ActivationLayer(const ActivationDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::Activation, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> ActivationLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    ActivationQueueDescriptor descriptor;
-    return factory.CreateActivation(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-ActivationLayer* ActivationLayer::Clone(Graph& graph) const
-{
-    return CloneBase<ActivationLayer>(graph, m_Param, GetName());
-}
-
-void ActivationLayer::ValidateTensorShapesFromInputs()
-{
-    auto& info = GetInputSlot(0).GetConnection()->GetTensorInfo();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(info.GetShape()),
-                     "ActivationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-AdditionLayer::AdditionLayer(const char* name)
-    : Layer(2, 1, LayerType::Addition, name)
-{
-}
-
-std::unique_ptr<IWorkload> AdditionLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    AdditionQueueDescriptor descriptor;
-    return factory.CreateAddition(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-AdditionLayer* AdditionLayer::Clone(Graph& graph) const
-{
-    return CloneBase<AdditionLayer>(graph, GetName());
-}
-
-void AdditionLayer::ValidateTensorShapesFromInputs()
-{
-    auto& input0 = GetInputSlot(0).GetConnection()->GetTensorInfo();
-    auto& input1 = GetInputSlot(1).GetConnection()->GetTensorInfo();
-
-    // Get the max of the inputs
-    BOOST_ASSERT(input0.GetNumDimensions() == input1.GetNumDimensions());
-    unsigned int numDims = input0.GetNumDimensions();
-    std::vector<unsigned int> dims(numDims);
-
-    // validate inputs are broadcast compatible
-#if !NDEBUG
-    for (unsigned int i = 0; i < numDims; i++)
-    {
-        unsigned int dim0 = input0.GetShape()[i];
-        unsigned int dim1 = input1.GetShape()[i];
-        if (dim0 != dim1)
-        {
-            BOOST_ASSERT_MSG(dim0 == 1 || dim1 == 1, "Dimensions should either match or one should be of size 1.");
-        }
-    }
-#endif
-
-    for (unsigned int i = 0; i < numDims; i++)
-    {
-        unsigned int dim0 = input0.GetShape()[i];
-        unsigned int dim1 = input1.GetShape()[i];
-        dims[i] = std::max(dim0, dim1);
-    }
-
-    TensorShape outShape(numDims, dims.data());
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "AdditionLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-BatchNormalizationLayer::BatchNormalizationLayer(const armnn::BatchNormalizationDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::BatchNormalization, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> BatchNormalizationLayer::CreateWorkload(const Graph& graph,
-                                                                   const IWorkloadFactory& factory) const
-{
-    BatchNormalizationQueueDescriptor descriptor;
-
-    descriptor.m_Mean = m_Mean.get();
-    descriptor.m_Variance = m_Variance.get();
-    descriptor.m_Beta = m_Beta.get();
-    descriptor.m_Gamma = m_Gamma.get();
-    return factory.CreateBatchNormalization(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-BatchNormalizationLayer* BatchNormalizationLayer::Clone(Graph& graph) const
-{
-    auto layer = CloneBase<BatchNormalizationLayer>(graph, m_Param, GetName());
-
-    layer->m_Mean = m_Mean ? std::make_unique<ScopedCpuTensorHandle>(*m_Mean) : nullptr;
-    layer->m_Variance = m_Variance ? std::make_unique<ScopedCpuTensorHandle>(*m_Variance) : nullptr;
-    layer->m_Beta = m_Beta ? std::make_unique<ScopedCpuTensorHandle>(*m_Beta) : nullptr;
-    layer->m_Gamma = m_Gamma ? std::make_unique<ScopedCpuTensorHandle>(*m_Gamma) : nullptr;
-
-    return std::move(layer);
-}
-
-void BatchNormalizationLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "BatchNormalizationLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "BatchNormalizationLayer: TensorInfo must be set on connected OutputSlot.");
-
-    auto& info = GetInputSlot(0).GetConnection()->GetTensorInfo();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(info.GetShape()),
-                     "BatchNormalizationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-Convolution2dLayer::Convolution2dLayer(const Convolution2dDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::Convolution2d, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> Convolution2dLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    Convolution2dQueueDescriptor descriptor;
-
-    descriptor.m_Weight = m_Weight.get();
-    if (m_Param.m_BiasEnabled)
-    {
-        descriptor.m_Bias = m_Bias.get();
-    }
-    return factory.CreateConvolution2d(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-Convolution2dLayer* Convolution2dLayer::Clone(Graph& graph) const
-{
-    auto layer = CloneBase<Convolution2dLayer>(graph, m_Param, GetName());
-    layer->m_Weight = m_Weight ? std::make_unique<ScopedCpuTensorHandle>(*m_Weight) : nullptr;
-
-    if (layer->m_Param.m_BiasEnabled)
-    {
-        layer->m_Bias = m_Bias ? std::make_unique<ScopedCpuTensorHandle>(*m_Bias) : nullptr;
-    }
-
-    return std::move(layer);
-}
-
-void Convolution2dLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "Convolution2dLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "Convolution2dLayer: TensorInfo must be set on connected OutputSlot.");
-
-
-    IOutputSlot* input = GetInputSlot(0).GetConnection();
-    const TensorShape& inputShape = input->GetTensorInfo().GetShape();
-    const TensorShape filterShape = m_Weight->GetTensorInfo().GetShape();
-
-    // If we support multiple batch dimensions in the future, then this assert will need to change.
-    BOOST_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Convolutions will always have 4D input.");
-
-    unsigned int inWidth = inputShape[3];
-    unsigned int inHeight = inputShape[2];
-    unsigned int inBatchSize = inputShape[0];
-
-    unsigned int filterWidth = filterShape[3];
-    unsigned int readWidth = (inWidth + m_Param.m_PadLeft + m_Param.m_PadRight) - (filterWidth);
-    unsigned int outWidth =  1+(readWidth / m_Param.m_StrideX);
-
-    unsigned int filterHeight = filterShape[2];
-    unsigned int readHeight = (inHeight + m_Param.m_PadTop + m_Param.m_PadBottom) - (filterHeight);
-    unsigned int outHeight = 1+(readHeight / m_Param.m_StrideY);
-
-    unsigned int outChannels = filterShape[0];
-    unsigned int outBatchSize = inBatchSize;
-
-    TensorShape shapeOut({outBatchSize, outChannels, outHeight, outWidth});
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(shapeOut),
-                     "Convolution2dLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-
-DepthwiseConvolution2dLayer::DepthwiseConvolution2dLayer(const DepthwiseConvolution2dDescriptor& param,
-                                                         const char* name)
-    : LayerWithParameters(1, 1, LayerType::DepthwiseConvolution2d, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> DepthwiseConvolution2dLayer::CreateWorkload(const Graph&                  graph,
-                                                                       const IWorkloadFactory& factory) const
-{
-    DepthwiseConvolution2dQueueDescriptor descriptor;
-
-    descriptor.m_Weight = m_Weight.get();
-    if (m_Param.m_BiasEnabled)
-    {
-        descriptor.m_Bias = m_Bias.get();
-    }
-    return factory.CreateDepthwiseConvolution2d(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-DepthwiseConvolution2dLayer* DepthwiseConvolution2dLayer::Clone(Graph& graph) const
-{
-    auto layer      = CloneBase<DepthwiseConvolution2dLayer>(graph, m_Param, GetName());
-    layer->m_Weight = m_Weight ? std::make_unique<ScopedCpuTensorHandle>(*m_Weight) : nullptr;
-
-    if (layer->m_Param.m_BiasEnabled)
-    {
-        layer->m_Bias = m_Bias ? std::make_unique<ScopedCpuTensorHandle>(*m_Bias) : nullptr;
-    }
-
-    return std::move(layer);
-}
-
-void DepthwiseConvolution2dLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "DepthwiseConvolution2dLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "DepthwiseConvolution2dLayer: TensorInfo must be set on connected OutputSlot.");
-
-    IOutputSlot* input = GetInputSlot(0).GetConnection();
-    const TensorShape& inputShape = input->GetTensorInfo().GetShape();
-    const TensorShape filterShape = m_Weight->GetTensorInfo().GetShape();
-
-    BOOST_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Convolutions will always have 4D input.");
-
-    unsigned int inWidth = inputShape[3];
-    unsigned int inHeight = inputShape[2];
-    unsigned int inBatchSize = inputShape[0];
-
-    unsigned int filterWidth = filterShape[3];
-    unsigned int readWidth = (inWidth + m_Param.m_PadLeft + m_Param.m_PadRight) - (filterWidth);
-    unsigned int outWidth =  1+(readWidth / m_Param.m_StrideX);
-
-    unsigned int filterHeight = filterShape[2];
-    unsigned int readHeight = (inHeight + m_Param.m_PadTop + m_Param.m_PadBottom) - (filterHeight);
-    unsigned int outHeight = 1+(readHeight / m_Param.m_StrideY);
-    unsigned int depthMultiplier = filterShape[0];
-
-    unsigned int outChannels = filterShape[1]*depthMultiplier;
-    unsigned int outBatchSize = inBatchSize;
-
-    TensorShape outShape({outBatchSize, outChannels, outHeight, outWidth});
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "DepthwiseConvolution2dLayer: "
-                         "TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-FakeQuantizationLayer::FakeQuantizationLayer(const FakeQuantizationDescriptor& param, const char* name)
-: LayerWithParameters(1, 1, LayerType::FakeQuantization, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> FakeQuantizationLayer::CreateWorkload(const Graph& graph,
-                                                                const IWorkloadFactory& factory) const
-{
-    FakeQuantizationQueueDescriptor descriptor;
-    return factory.CreateFakeQuantization(descriptor, PrepInfoAndDesc(descriptor, graph) );
-}
-
-FakeQuantizationLayer* FakeQuantizationLayer::Clone(Graph& graph) const
-{
-    return CloneBase<FakeQuantizationLayer>(graph, m_Param, GetName());
-}
-
-void FakeQuantizationLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "FakeQuantizationLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "FakeQuantizationLayer: TensorInfo must be set on connected OutputSlot.");
-
-
-    IOutputSlot* input = GetInputSlot(0).GetConnection();
-
-    // input and output shapes are the same
-    TensorShape const& outShape = input->GetTensorInfo().GetShape();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "FakeQuantizationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-FloorLayer::FloorLayer(const char* name)
- : Layer(1, 1, LayerType::Floor, name)
-{
-}
-
-std::unique_ptr<IWorkload> FloorLayer::CreateWorkload(const Graph& graph,
-    const IWorkloadFactory& factory) const
-{
-    FloorQueueDescriptor descriptor;
-    return factory.CreateFloor(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-FloorLayer* FloorLayer::Clone(Graph& graph) const
-{
-    return CloneBase<FloorLayer>(graph, GetName());
-}
-
-void FloorLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "FloorLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "FloorLayer: TensorInfo must be set on connected OutputSlot.");
-
-    // input and output shapes are the same
-    IOutputSlot* input = GetInputSlot(0).GetConnection();
-    TensorShape const& outShape = input->GetTensorInfo().GetShape();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "FloorLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-FullyConnectedLayer::FullyConnectedLayer(const FullyConnectedDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::FullyConnected, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> FullyConnectedLayer::CreateWorkload(const Graph& graph,
-                                                               const IWorkloadFactory& factory) const
-{
-    FullyConnectedQueueDescriptor descriptor;
-
-    descriptor.m_Weight = m_Weight.get();
-    if (m_Param.m_BiasEnabled)
-    {
-        descriptor.m_Bias = m_Bias.get();
-    }
-    return factory.CreateFullyConnected(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-FullyConnectedLayer* FullyConnectedLayer::Clone(Graph& graph) const
-{
-    auto layer = CloneBase<FullyConnectedLayer>(graph, m_Param, GetName());
-
-    layer->m_Weight = m_Weight ? std::make_unique<ScopedCpuTensorHandle>(*m_Weight) : nullptr;
-    if (layer->m_Param.m_BiasEnabled)
-    {
-        layer->m_Bias = m_Bias ? std::make_unique<ScopedCpuTensorHandle>(*m_Bias) : nullptr;
-    }
-
-    return std::move(layer);
-}
-
-void FullyConnectedLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "FullyConnectedLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "FullyConnectedLayer: TensorInfo must be set on connected OutputSlot.");
-
-
-    TensorShape const& weightShape = m_Weight->GetTensorInfo().GetShape();
-
-    // output for FC is [1, w[1]]
-    unsigned int batches = GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape()[0];
-    unsigned int dimIdx = m_Param.m_TransposeWeightMatrix ? 0 : 1;
-    TensorShape outShape({batches, weightShape[dimIdx]});
-
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "FullyConnectedLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-InputLayer::InputLayer(LayerBindingId id, const char* name)
-    : BindableLayer(0, 1, LayerType::Input, name, id)
-{
-}
-
-std::unique_ptr<IWorkload> InputLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    return nullptr;
-}
-
-InputLayer* InputLayer::Clone(Graph& graph) const
-{
-    return CloneBase<InputLayer>(graph, GetBindingId(), GetName());
-}
-
-void InputLayer::ValidateTensorShapesFromInputs()
-{
-    //The input layer should already have it's inputs set during graph building phase in the driver/parser.
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).IsTensorInfoSet(),
-                                               "InputLayer should already have the TensorInfo set.");
-}
-
-
-MergerLayer::MergerLayer(const OriginsDescriptor& param, const char* name)
-    : LayerWithParameters(param.GetNumViews(), 1, LayerType::Merger, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> MergerLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    MergerQueueDescriptor descriptor;
-
-    // copy the view origins to the descriptor
-    descriptor.m_ViewOrigins.reserve(m_Param.GetNumViews());
-    for (unsigned int i = 0; i < m_Param.GetNumViews(); ++i)
-    {
-        descriptor.m_ViewOrigins.emplace_back(
-            std::vector<unsigned int>(m_Param.GetViewOrigin(i), m_Param.GetViewOrigin(i) + m_Param.GetNumDimensions()));
-    }
-
-    return factory.CreateMerger(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-void MergerLayer::CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory)
-{
-    //if sub tensors are supported than the merger
-    //just needs to make sure that the outputs of the prev layer
-    //are made subtensors of the output of the merger layer
-    m_OutputHandlers[0].CreateTensorHandles(factory);
-    if (factory.SupportsSubTensors())
-    {
-        std::queue<MergerLayer*> m_MergerLayers;
-
-        m_MergerLayers.push(this);
-        while (!m_MergerLayers.empty())
-        {
-            MergerLayer* currentLayer = m_MergerLayers.front();
-            ITensorHandle* parentTensor = currentLayer->GetOutputHandler(0).GetData();
-
-            m_MergerLayers.pop();
-
-            const unsigned int numInputSlots = currentLayer->GetNumInputSlots();
-            for (unsigned int i = 0; i < numInputSlots; ++i)
-            {
-                OutputSlot* slot = currentLayer->GetInputSlot(i).GetConnectedOutputSlot();
-                OutputHandler& outputHandler = slot->GetOutputHandler();
-                outputHandler.SetData(factory.CreateSubTensorHandle(*parentTensor,
-                                                                    outputHandler.GetTensorInfo().GetShape(),
-                                                                    currentLayer->m_Param.GetViewOrigin(i)));
-
-                Layer& inputLayer = slot->GetOwningLayer();
-                if (inputLayer.GetType() == LayerType::Merger)
-                {
-                    m_MergerLayers.push(boost::polymorphic_downcast<MergerLayer*>(&inputLayer));
-                }
-            }
-        }
-    }
-}
-
-MergerLayer* MergerLayer::Clone(Graph& graph) const
-{
-    return CloneBase<MergerLayer>(graph, m_Param, GetName());
-}
-
-void MergerLayer::ValidateTensorShapesFromInputs()
-{
-    // Validate Merger layer
-    ConditionalThrow<LayerValidationException>(m_Param.GetNumViews() == GetNumInputSlots(),
-                     "MergerLayer: Num Inputs must match num views.");
-
-    unsigned int numDims = m_Param.GetNumDimensions();
-    for (unsigned int i=0; i<GetNumInputSlots(); i++)
-    {
-        auto& inputInfo = GetInputSlot(i).GetConnection()->GetTensorInfo();
-
-        boost::ignore_unused(inputInfo);
-        ConditionalThrow<LayerValidationException>(numDims == inputInfo.GetNumDimensions(),
-                         "MergerLayer: Num Dimensions must match all inputs.");
-    }
-
-    // Find the bounding box (extents) of all the views
-    std::vector<unsigned int> extentMin(numDims);
-    std::vector<unsigned int> extentMax(numDims);
-    for (unsigned int i = 0; i < GetNumInputSlots(); i++)
-    {
-        const uint32_t* origin = m_Param.GetViewOrigin(i);
-        const armnn::TensorShape& shape = GetInputSlot(i).GetConnection()->GetTensorInfo().GetShape();
-        for (unsigned int d = 0; d < numDims; d++)
-        {
-            extentMin[d] = std::min(extentMin[d], origin[d]);
-            extentMax[d] = std::max(extentMax[d], origin[d] + shape[d]);
-        }
-    }
-
-    // Check that the bounding box starts at the origin
-    if (!std::all_of(extentMin.begin(), extentMin.end(), [](unsigned int s) { return s == 0; }))
-    {
-        throw LayerValidationException("MergerLayer: there is no view that starts at the origin");
-    }
-
-    // Check that there are no overlaps of views (this would lead to undefined output at those locations).
-    // Check each pair of views against each other
-    // (and don't bother to check against self, or check the same pair both ways round)
-    for (unsigned int a = 0; a < GetNumInputSlots(); a++)
-    {
-        const uint32_t* aOrigin = m_Param.GetViewOrigin(a);
-        const armnn::TensorShape& aShape = GetInputSlot(a).GetConnection()->GetTensorInfo().GetShape();
-        for (unsigned int b = 0; b < a; b++)
-        {
-            const uint32_t* bOrigin = m_Param.GetViewOrigin(b);
-            const armnn::TensorShape& bShape = GetInputSlot(b).GetConnection()->GetTensorInfo().GetShape();
-
-            bool allAxesOverlap = true;
-            for (unsigned int d = 0; d < numDims && allAxesOverlap; d++)
-            {
-                unsigned int a1 = aOrigin[d];
-                unsigned int a2 = aOrigin[d] + aShape[d];
-
-                unsigned int b1 = bOrigin[d];
-                unsigned int b2 = bOrigin[d] + bShape[d];
-
-                if (a2 <= b1 || b2 <= a1)
-                {
-                    allAxesOverlap = false;
-                }
-            }
-            if (allAxesOverlap)
-            {
-                throw LayerValidationException("MergerLayer: Some views overlap.");
-            }
-        }
-    }
-
-    // Check that there are no "holes", i.e. regions of the output which is not covered by a view.
-    // Because we already checked that there are no overlaps, this can be done simply by checking that
-    // the total 'volume' of the views is the same as the output.
-    unsigned int totalViewsVolume = 0;
-    for (unsigned int i = 0; i < GetNumInputSlots(); i++)
-    {
-        totalViewsVolume += GetInputSlot(i).GetConnection()->GetTensorInfo().GetNumElements();
-    }
-    unsigned int outputVolume = 1;
-    for (unsigned int d = 0; d < numDims; d++)
-    {
-        outputVolume *= (extentMax[d] - extentMin[d]);
-    }
-    if (totalViewsVolume != outputVolume)
-    {
-        throw LayerValidationException("MergerLayer: there are some gaps between views");
-    }
-
-    TensorShape outShape(numDims, extentMax.data());
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "MergerLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-MultiplicationLayer::MultiplicationLayer(const char* name)
-    : Layer(2, 1, LayerType::Multiplication, name)
-{
-}
-
-std::unique_ptr<IWorkload> MultiplicationLayer::CreateWorkload(const Graph&            graph,
-                                                               const IWorkloadFactory& factory) const
-{
-    MultiplicationQueueDescriptor descriptor;
-
-    return factory.CreateMultiplication(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-MultiplicationLayer* MultiplicationLayer::Clone(Graph& graph) const
-{
-    return CloneBase<MultiplicationLayer>(graph, GetName());
-}
-
-void MultiplicationLayer::ValidateTensorShapesFromInputs()
-{
-    auto& input0 = GetInputSlot(0).GetConnection()->GetTensorInfo();
-    auto& input1 = GetInputSlot(1).GetConnection()->GetTensorInfo();
-
-    // Get the max of the inputs
-    BOOST_ASSERT(input0.GetNumDimensions() == input1.GetNumDimensions());
-    unsigned int numDims = input0.GetNumDimensions();
-    std::vector<unsigned int> dims(numDims);
-
-    // validate inputs are broadcast compatible
-#if !NDEBUG
-    for (unsigned int i = 0; i < numDims; i++)
-    {
-        unsigned int dim0 = input0.GetShape()[i];
-        unsigned int dim1 = input1.GetShape()[i];
-        if (dim0 != dim1)
-        {
-            BOOST_ASSERT_MSG(dim0 == 1 || dim1 == 1, "Dimensions should either match or one should be of size 1.");
-        }
-    }
-#endif
-
-    for (unsigned int i = 0; i < numDims; i++)
-    {
-        unsigned int dim0 = input0.GetShape()[i];
-        unsigned int dim1 = input1.GetShape()[i];
-        dims[i] = std::max(dim0, dim1);
-    }
-
-    TensorShape outShape(numDims, dims.data());
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "MultiplicationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-NormalizationLayer::NormalizationLayer(const NormalizationDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::Normalization, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> NormalizationLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    NormalizationQueueDescriptor descriptor;
-    return factory.CreateNormalization(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-NormalizationLayer* NormalizationLayer::Clone(Graph& graph) const
-{
-    return CloneBase<NormalizationLayer>(graph, m_Param, GetName());
-}
-
-void NormalizationLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                                               "NormalizationLayer: Input slot must be connected.");
-
-    const TensorShape& outShape = GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "NormalizationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-OutputLayer::OutputLayer(LayerBindingId id, const char* name)
-    : BindableLayer(1, 0, LayerType::Output, name, id)
-{
-}
-
-std::unique_ptr<IWorkload> OutputLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    return nullptr;
-}
-
-OutputLayer* OutputLayer::Clone(Graph& graph) const
-{
-    return CloneBase<OutputLayer>(graph, GetBindingId(), GetName());
-}
-
-void OutputLayer::ValidateTensorShapesFromInputs()
-{
-    // Just validate the input is connected
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                                               "OutputLayer: Input slot must be connected.");
-}
-
-PermuteLayer::PermuteLayer(const PermuteDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::Permute, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> PermuteLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    PermuteQueueDescriptor descriptor;
-    return factory.CreatePermute(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-PermuteLayer* PermuteLayer::Clone(Graph& graph) const
-{
-    return CloneBase<PermuteLayer>(graph, m_Param, GetName());
-}
-
-void PermuteLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "PermuteLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "PermuteLayer: TensorInfo must be set on connected InputSlot.");
-
-    const TensorInfo& infoIn = GetInputSlot(0).GetConnection()->GetTensorInfo();
-    TensorShape shapeOut = armnnUtils::Permuted(infoIn.GetShape(), m_Param.m_DimMappings);
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(shapeOut),
-                     "PermuteLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-Pooling2dLayer::Pooling2dLayer(const Pooling2dDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::Pooling2d, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> Pooling2dLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    Pooling2dQueueDescriptor descriptor;
-    return factory.CreatePooling2d(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-Pooling2dLayer* Pooling2dLayer::Clone(Graph& graph) const
-{
-    return CloneBase<Pooling2dLayer>(graph, m_Param, GetName());
-}
-
-void Pooling2dLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "Pooling2dLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "Pooling2dLayer: TensorInfo must be set on connected InputSlot.");
-
-    IOutputSlot* input = GetInputSlot(0).GetConnection();
-    const TensorShape& inputShape = input->GetTensorInfo().GetShape();
-
-    // If we support multiple batch dimensions in the future, then this assert will need to change.
-    BOOST_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Pooling2dLayer will always have 4D input.");
-
-
-    unsigned int inWidth = inputShape[3];
-    unsigned int inHeight = inputShape[2];
-    unsigned int inChannels = inputShape[1];
-    unsigned int inBatchSize = inputShape[0];
-
-    bool isGlobalPooling = (m_Param.m_StrideX==0 && m_Param.m_StrideY==0);
-    unsigned int outWidth = 1;
-    unsigned int outHeight = 1;
-    if (!isGlobalPooling)
-    {
-        BOOST_ASSERT_MSG(m_Param.m_StrideX!=0 && m_Param.m_StrideY!=0,
-                         "Stride can only be zero when performing global pooling");
-
-        auto CalcSize = [](auto inSize, auto lowPad, auto highPad, auto poolSize, auto stride, auto padMethod,
-                           auto outputShapeRounding)
-            {
-                unsigned int readSize = inSize + lowPad + highPad - poolSize;
-                float div = static_cast<float>(readSize) / static_cast<float>(stride);
-
-                unsigned int size = 0;
-                switch (outputShapeRounding)
-                {
-                    case OutputShapeRounding::Ceiling:
-                        size = static_cast<unsigned int>(ceil(div)) + 1;
-                        break;
-                    case OutputShapeRounding ::Floor:
-                        size = static_cast<unsigned int>(floor(div)) + 1;
-                        break;
-                    default:
-                        BOOST_ASSERT_MSG(false, "Unsupported Output Shape Rounding");
-                }
-
-                // Make sure that border operations will start from inside the input and not the padded area
-                // This is what both Caffe and CL does...
-                if ((size - 1)*stride >= inSize + lowPad)
-                {
-                    --size;
-                }
-
-                return size;
-            };
-
-        outWidth = CalcSize(inWidth, m_Param.m_PadLeft, m_Param.m_PadRight, m_Param.m_PoolWidth, m_Param.m_StrideX,
-                            m_Param.m_PaddingMethod, m_Param.m_OutputShapeRounding);
-        outHeight= CalcSize(inHeight, m_Param.m_PadTop, m_Param.m_PadBottom, m_Param.m_PoolHeight, m_Param.m_StrideY,
-                            m_Param.m_PaddingMethod, m_Param.m_OutputShapeRounding);
-
-
-    }
-    unsigned int outChannels = inChannels;
-    unsigned int outBatchSize = inBatchSize;
-
-    TensorShape shapeOut({outBatchSize, outChannels, outHeight, outWidth});
-
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(shapeOut),
-               "Pooling2dLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-SoftmaxLayer::SoftmaxLayer(const SoftmaxDescriptor &param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::Softmax, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> SoftmaxLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    SoftmaxQueueDescriptor descriptor;
-    return factory.CreateSoftmax(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-SoftmaxLayer* SoftmaxLayer::Clone(Graph& graph) const
-{
-    return CloneBase<SoftmaxLayer>(graph, m_Param, GetName());
-}
-
-void SoftmaxLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                                               "SoftmaxLayer: Input slot must be connected.");
-    const TensorShape& outShape = GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "SoftmaxLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-SplitterLayer::SplitterLayer(const ViewsDescriptor& param, const char* name)
-    : LayerWithParameters(1, param.GetNumViews(), LayerType::Splitter, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> SplitterLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    SplitterQueueDescriptor descriptor;
-
-    // copy the window origins to the descriptor
-    for (unsigned int i = 0; i < m_Param.GetNumViews(); ++i)
-    {
-        descriptor.m_ViewOrigins.emplace_back(
-            std::vector<unsigned int>(m_Param.GetViewOrigin(i), m_Param.GetViewOrigin(i) + m_Param.GetNumDimensions()));
-    }
-
-    return factory.CreateSplitter(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-void SplitterLayer::CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory)
-{
-    //if sub tensors are supported than all the "splitter" need to do is to
-    //set the outputs to be appropriate sub tensors of the input.
-    if (factory.SupportsSubTensors())
-    {
-        const OutputHandler& outputHandler = GetInputSlots()[0].GetConnectedOutputSlot()->GetOutputHandler();
-
-        ITensorHandle* inputData = outputHandler.GetData();
-        //create the outputs as subtensors of the input
-        for (unsigned int i = 0; i < m_Param.GetNumViews(); ++i)
-        {
-            m_OutputHandlers[i].SetData(factory.CreateSubTensorHandle(*inputData,
-                                                                      m_OutputHandlers[i].GetTensorInfo().GetShape(),
-                                                                      m_Param.GetViewOrigin(i)));
-        }
-    }
-    else
-    {
-        for (unsigned int i = 0; i < m_Param.GetNumViews(); ++i)
-        {
-            m_OutputHandlers[i].CreateTensorHandles(factory);
-        }
-    }
-}
-
-SplitterLayer* SplitterLayer::Clone(Graph& graph) const
-{
-    return CloneBase<SplitterLayer>(graph, m_Param, GetName());
-}
-
-void SplitterLayer::ValidateTensorShapesFromInputs()
-{
-    //Output shapes must match View shapes.
-    for (unsigned int viewIdx = 0; viewIdx < m_Param.GetNumViews(); viewIdx++)
-    {
-        const uint32_t* sizes = m_Param.GetViewSizes(viewIdx);
-
-        TensorShape outShape(m_Param.GetNumDimensions(), sizes);
-        ConditionalThrow<LayerValidationException>(GetOutputSlot(viewIdx).ValidateTensorShape(outShape),
-                         "SplitterLayer: View sizes must match output tensor shapes.");
-    }
-}
-
-MemCopyLayer::MemCopyLayer(const char* name)
-    : Layer(1, 1, LayerType::MemCopy, name)
-{
-}
-
-MemCopyLayer* MemCopyLayer::Clone(Graph& graph) const
-{
-    return CloneBase<MemCopyLayer>(graph, GetName());
-}
-
-std::unique_ptr<IWorkload> MemCopyLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
-{
-    MemCopyQueueDescriptor descriptor;
-    return factory.CreateMemCopy(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-void MemCopyLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "MemCopyLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "MemCopyLayer: TensorInfo must be set on connected OutputSlot.");
-
-
-    IOutputSlot* input = GetInputSlot(0).GetConnection();
-
-    // input and output shapes are the same
-    TensorShape const& outShape = input->GetTensorInfo().GetShape();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "MemCopyLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-ResizeBilinearLayer::ResizeBilinearLayer(const ResizeBilinearDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::ResizeBilinear, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> ResizeBilinearLayer::CreateWorkload(const Graph& graph,
-                                                               const IWorkloadFactory& factory) const
-{
-    ResizeBilinearQueueDescriptor descriptor;
-    return factory.CreateResizeBilinear(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-ResizeBilinearLayer* ResizeBilinearLayer::Clone(Graph& graph) const
-{
-    return CloneBase<ResizeBilinearLayer>(graph, m_Param, GetName());
-}
-
-void ResizeBilinearLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "MemCopyLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "MemCopyLayer: TensorInfo must be set on connected OutputSlot.");
-
-    const TensorShape& inputShape = GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape();
-    unsigned int outWidth = m_Param.m_TargetWidth;
-    unsigned int outHeight = m_Param.m_TargetHeight;
-    unsigned int outChannels = inputShape[1];
-    unsigned int outBatch = inputShape[0];
-    TensorShape outShape({outBatch, outChannels, outHeight, outWidth});
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "ResizeBilinearLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-L2NormalizationLayer::L2NormalizationLayer(const char* name)
-    : Layer(1, 1, LayerType::L2Normalization, name)
-{
-}
-
-std::unique_ptr<IWorkload> L2NormalizationLayer::CreateWorkload(const Graph& graph,
-    const IWorkloadFactory& factory) const
-{
-    L2NormalizationQueueDescriptor descriptor;
-    return factory.CreateL2Normalization(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-L2NormalizationLayer* L2NormalizationLayer::Clone(Graph& graph) const
-{
-    return CloneBase<L2NormalizationLayer>(graph, GetName());
-}
-
-void L2NormalizationLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "L2NormalizationLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "L2NormalizationLayer: TensorInfo must be set on connected OutputSlot.");
-
-    IOutputSlot* input = GetInputSlot(0).GetConnection();
-
-    // input and output shapes are the same
-    TensorShape const& outShape = input->GetTensorInfo().GetShape();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "L2NormalizationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-ConstantLayer::ConstantLayer(const std::shared_ptr<ScopedCpuTensorHandle>& input, const char* name)
-    : Layer(0, 1, LayerType::Constant, name)
-    , m_LayerOutput(input)
-{
-}
-
-std::unique_ptr<IWorkload> ConstantLayer::CreateWorkload(const Graph& graph,
-    const IWorkloadFactory& factory) const
-{
-    ConstantQueueDescriptor descriptor;
-    descriptor.m_LayerOutput = m_LayerOutput.get();
-    return factory.CreateConstant(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-ConstantLayer* ConstantLayer::Clone(Graph& graph) const
-{
-    // Cloned layers share the same layer output object
-    return CloneBase<ConstantLayer>(graph, m_LayerOutput, GetName());
-}
-
-void ConstantLayer::ValidateTensorShapesFromInputs()
-{
-    // get the output shape from the value of the constant layer
-    TensorShape const& outShape = m_LayerOutput->GetTensorInfo().GetShape();
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(outShape),
-                     "ConstantLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-ReshapeLayer::ReshapeLayer(const ReshapeDescriptor& param, const char* name)
-    : LayerWithParameters(1, 1, LayerType::Reshape, param, name)
-{
-}
-
-std::unique_ptr<IWorkload> ReshapeLayer::CreateWorkload(const Graph& graph,
-    const IWorkloadFactory& factory) const
-{
-    ReshapeQueueDescriptor descriptor;
-    return factory.CreateReshape(descriptor, PrepInfoAndDesc(descriptor, graph));
-}
-
-ReshapeLayer* ReshapeLayer::Clone(Graph& graph) const
-{
-    return CloneBase<ReshapeLayer>(graph, m_Param, GetName());
-}
-
-void ReshapeLayer::ValidateTensorShapesFromInputs()
-{
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
-                     "ReshapeLayer: InputSlot must be connected to an OutputSlot");
-    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
-                     "ReshapeLayer: TensorInfo must be set on connected OutputSlot.");
-    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).ValidateTensorShape(m_Param.m_TargetShape),
-                     "ReshapeLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.");
-}
-
-}
diff --git a/src/armnn/Layers.hpp b/src/armnn/Layers.hpp
deleted file mode 100644
index cb460e125f..0000000000
--- a/src/armnn/Layers.hpp
+++ /dev/null
@@ -1,437 +0,0 @@
-//
-// Copyright © 2017 Arm Ltd. All rights reserved.
-// See LICENSE file in the project root for full license information.
-//
-#pragma once
-
-#include "LayersFwd.hpp"
-
-#include "Layer.hpp"
-#include "InternalTypes.hpp"
-
-#include <armnn/Descriptors.hpp>
-
-#include <boost/core/ignore_unused.hpp>
-
-namespace armnn
-{
-
-class ScopedCpuTensorHandle;
-
-template <typename Parameters>
-class LayerWithParameters : public Layer
-{
-public:
-    using DescriptorType = Parameters;
-
-    const Parameters& GetParameters() const { return m_Param; }
-
-    /// Helper to serialize the layer parameters to string
-    /// (currently used in DotSerializer and company)
-    void SerializeLayerParameters(ParameterStringifyFunction & fn) const
-    {
-        StringifyLayerParameters<Parameters>::Serialize(fn, m_Param);
-    }
-
-protected:
-    LayerWithParameters(unsigned int numInputSlots,
-                        unsigned int numOutputSlots,
-                        LayerType type,
-                        const Parameters& param,
-                        const char* name)
-    :   Layer(numInputSlots, numOutputSlots, type, name)
-    ,   m_Param(param)
-    {
-    }
-
-    ~LayerWithParameters() = default;
-
-    /// Helper function to reduce duplication in *Layer::CreateWorkload
-    template <typename QueueDescriptor>
-    WorkloadInfo PrepInfoAndDesc(QueueDescriptor& descriptor, const Graph& graph) const
-    {
-        descriptor.m_Parameters = m_Param;
-        return Layer::PrepInfoAndDesc(descriptor, graph);
-    }
-
-    /// The parameters for the layer (not including tensor-valued weights etc.)
-    Parameters m_Param;
-};
-
-class ActivationLayer : public LayerWithParameters<ActivationDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    ActivationLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    ActivationLayer(const ActivationDescriptor &param, const char* name);
-    ~ActivationLayer() = default;
-};
-
-class AdditionLayer : public Layer
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    AdditionLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    AdditionLayer(const char* name);
-    ~AdditionLayer() = default;
-};
-
-class BatchNormalizationLayer : public LayerWithParameters<BatchNormalizationDescriptor>
-{
-public:
-    std::unique_ptr<ScopedCpuTensorHandle> m_Mean;
-    std::unique_ptr<ScopedCpuTensorHandle> m_Variance;
-    std::unique_ptr<ScopedCpuTensorHandle> m_Beta;
-    std::unique_ptr<ScopedCpuTensorHandle> m_Gamma;
-
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    BatchNormalizationLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    BatchNormalizationLayer(const BatchNormalizationDescriptor& param, const char* name);
-    ~BatchNormalizationLayer() = default;
-};
-
-class Convolution2dLayer : public LayerWithParameters<Convolution2dDescriptor>
-{
-public:
-    std::unique_ptr<ScopedCpuTensorHandle> m_Weight;
-    std::unique_ptr<ScopedCpuTensorHandle> m_Bias;
-
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    Convolution2dLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    Convolution2dLayer(const Convolution2dDescriptor& param, const char* name);
-    ~Convolution2dLayer() = default;
-};
-
-class DepthwiseConvolution2dLayer : public LayerWithParameters<DepthwiseConvolution2dDescriptor>
-{
-public:
-    std::unique_ptr<ScopedCpuTensorHandle> m_Weight;
-    std::unique_ptr<ScopedCpuTensorHandle> m_Bias;
-
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    DepthwiseConvolution2dLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    DepthwiseConvolution2dLayer(const DepthwiseConvolution2dDescriptor& param, const char* name);
-    ~DepthwiseConvolution2dLayer() = default;
-};
-
-class FakeQuantizationLayer : public LayerWithParameters<FakeQuantizationDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    FakeQuantizationLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    FakeQuantizationLayer(const FakeQuantizationDescriptor& descriptor, const char* name);
-    ~FakeQuantizationLayer() = default;
-};
-
-class FloorLayer : public Layer
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    FloorLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    FloorLayer(const char* name);
-    ~FloorLayer() = default;
-};
-
-class FullyConnectedLayer : public LayerWithParameters<FullyConnectedDescriptor>
-{
-public:
-    std::unique_ptr<ScopedCpuTensorHandle> m_Weight;
-    std::unique_ptr<ScopedCpuTensorHandle> m_Bias;
-
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    FullyConnectedLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    FullyConnectedLayer(const FullyConnectedDescriptor& param, const char* name);
-    ~FullyConnectedLayer() = default;
-};
-
-class InputLayer : public BindableLayer
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    InputLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    InputLayer(LayerBindingId id, const char* name);
-    ~InputLayer() = default;
-};
-
-class MergerLayer : public LayerWithParameters<OriginsDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-    virtual void CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory) override;
-
-    MergerLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    MergerLayer(const OriginsDescriptor& param, const char* name);
-    ~MergerLayer() = default;
-};
-
-class MultiplicationLayer : public Layer
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    MultiplicationLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    MultiplicationLayer(const char* name);
-    ~MultiplicationLayer() = default;
-};
-
-class NormalizationLayer : public LayerWithParameters<NormalizationDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    NormalizationLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    NormalizationLayer(const NormalizationDescriptor& param, const char* name);
-    ~NormalizationLayer() = default;
-};
-
-class OutputLayer : public BindableLayer
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-    virtual void CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory) override
-    {
-        boost::ignore_unused(graph, factory);
-    }
-
-    OutputLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    OutputLayer(LayerBindingId id, const char* name);
-    ~OutputLayer() = default;
-};
-
-class PermuteLayer : public LayerWithParameters<PermuteDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    PermuteLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-    const PermutationVector& GetPermutation() const
-    {
-        return m_Param.m_DimMappings;
-    }
-
-    bool IsInverse(const Layer& other) const
-    {
-        return (other.GetType() == LayerType::Permute) &&
-            GetPermutation().IsInverse(boost::polymorphic_downcast<const PermuteLayer*>(&other)->GetPermutation());
-    }
-
-    bool IsEqual(const Layer& other) const
-    {
-        return (other.GetType() == LayerType::Permute) &&
-               GetPermutation().IsEqual(boost::polymorphic_downcast<const PermuteLayer*>(&other)->GetPermutation());
-    }
-
-protected:
-    PermuteLayer(const PermuteDescriptor& param, const char* name);
-    ~PermuteLayer() = default;
-};
-
-class Pooling2dLayer : public LayerWithParameters<Pooling2dDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    Pooling2dLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    Pooling2dLayer(const Pooling2dDescriptor& param, const char* name);
-    ~Pooling2dLayer() = default;
-};
-
-class SoftmaxLayer : public LayerWithParameters<SoftmaxDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-
-    SoftmaxLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    SoftmaxLayer(const SoftmaxDescriptor& param, const char* name);
-    ~SoftmaxLayer() = default;
-};
-
-class SplitterLayer : public LayerWithParameters<ViewsDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
-                                                      const IWorkloadFactory& factory) const override;
-    virtual void CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory) override;
-
-    SplitterLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    SplitterLayer(const ViewsDescriptor& param, const char* name);
-    ~SplitterLayer() = default;
-};
-
-class MemCopyLayer : public Layer
-{
-public:
-    virtual std::unique_ptr<IWorkload>
-    CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const override;
-
-    MemCopyLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    MemCopyLayer(const char* name);
-    ~MemCopyLayer() = default;
-};
-
-class ResizeBilinearLayer : public LayerWithParameters<ResizeBilinearDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload>
-        CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const override;
-
-    ResizeBilinearLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    ResizeBilinearLayer(const ResizeBilinearDescriptor& param, const char* name);
-    ~ResizeBilinearLayer() = default;
-};
-
-class L2NormalizationLayer : public Layer
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
-        const IWorkloadFactory& factory) const override;
-
-    L2NormalizationLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    L2NormalizationLayer(const char* name);
-    ~L2NormalizationLayer() = default;
-};
-
-class ConstantLayer : public Layer
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
-        const IWorkloadFactory& factory) const override;
-
-    ConstantLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-protected:
-    ConstantLayer(const std::shared_ptr<ScopedCpuTensorHandle>& input, const char* name);
-    ~ConstantLayer() = default;
-
-private:
-    std::shared_ptr<ScopedCpuTensorHandle> m_LayerOutput;
-};
-
-class ReshapeLayer : public LayerWithParameters<ReshapeDescriptor>
-{
-public:
-    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
-        const IWorkloadFactory& factory) const override;
-
-    ReshapeLayer* Clone(Graph& graph) const override;
-
-    void ValidateTensorShapesFromInputs() override;
-
-    bool IsEqual(const Layer& other) const
-    {
-        return (other.GetType() == LayerType::Reshape) &&
-               m_Param.m_TargetShape == boost::polymorphic_downcast<const ReshapeLayer*>(&other)->m_Param.m_TargetShape;
-    }
-
-protected:
-    ReshapeLayer(const ReshapeDescriptor& desc, const char* name);
-    ~ReshapeLayer() = default;
-};
-
-}
diff --git a/src/armnn/LayersFwd.hpp b/src/armnn/LayersFwd.hpp
index a77c723751..64d5dcea9b 100644
--- a/src/armnn/LayersFwd.hpp
+++ b/src/armnn/LayersFwd.hpp
@@ -6,6 +6,29 @@
 
 #include "InternalTypes.hpp"
 
+#include "layers/ActivationLayer.hpp"
+#include "layers/AdditionLayer.hpp"
+#include "layers/BatchNormalizationLayer.hpp"
+#include "layers/ConstantLayer.hpp"
+#include "layers/Convolution2dLayer.hpp"
+#include "layers/DepthwiseConvolution2dLayer.hpp"
+#include "layers/FakeQuantizationLayer.hpp"
+#include "layers/FloorLayer.hpp"
+#include "layers/FullyConnectedLayer.hpp"
+#include "layers/InputLayer.hpp"
+#include "layers/L2NormalizationLayer.hpp"
+#include "layers/MemCopyLayer.hpp"
+#include "layers/MergerLayer.hpp"
+#include "layers/MultiplicationLayer.hpp"
+#include "layers/NormalizationLayer.hpp"
+#include "layers/OutputLayer.hpp"
+#include "layers/PermuteLayer.hpp"
+#include "layers/Pooling2dLayer.hpp"
+#include "layers/ReshapeLayer.hpp"
+#include "layers/ResizeBilinearLayer.hpp"
+#include "layers/SoftmaxLayer.hpp"
+#include "layers/SplitterLayer.hpp"
+
 namespace armnn
 {
 
diff --git a/src/armnn/LoadedNetwork.cpp b/src/armnn/LoadedNetwork.cpp
index 14712d209c..3c73d4ccfe 100644
--- a/src/armnn/LoadedNetwork.cpp
+++ b/src/armnn/LoadedNetwork.cpp
@@ -5,11 +5,11 @@
 
 #include "LoadedNetwork.hpp"
 #include "Layer.hpp"
-#include "Layers.hpp"
 #include "Graph.hpp"
 #include "Network.hpp"
 #include "Runtime.hpp"
 #include "Profiling.hpp"
+#include "HeapProfiling.hpp"
 
 #ifdef ARMCOMPUTECL_ENABLED
 #include <arm_compute/core/CL/OpenCL.h>
@@ -28,13 +28,13 @@ namespace armnn
 using namespace std;
 
 std::unique_ptr<LoadedNetwork> LoadedNetwork::MakeLoadedNetwork(std::unique_ptr<OptimizedNetwork> net,
-    const WorkloadFactories& workloadFactories)
+                                                                bool useCpuRefAsFallback)
 {
     std::unique_ptr<LoadedNetwork> loadedNetwork;
 
     try
     {
-        loadedNetwork.reset(new LoadedNetwork(std::move(net), workloadFactories));
+        loadedNetwork.reset(new LoadedNetwork(std::move(net), useCpuRefAsFallback));
     }
     catch (const std::runtime_error& error)
     {
@@ -58,8 +58,9 @@ std::unique_ptr<LoadedNetwork> LoadedNetwork::MakeLoadedNetwork(std::unique_ptr<
     return loadedNetwork;
 }
 
-LoadedNetwork::LoadedNetwork(std::unique_ptr<OptimizedNetwork> net, const WorkloadFactories& workloadFactories)
-:   m_OptimizedNetwork(std::move(net))
+LoadedNetwork::LoadedNetwork(std::unique_ptr<OptimizedNetwork> net, bool useCpuRefAsFallback)
+    : m_CpuRef(useCpuRefAsFallback)
+    , m_OptimizedNetwork(std::move(net))
 {
     Graph& order = m_OptimizedNetwork->GetGraph().TopologicalSort();
     //first create tensor handlers
@@ -68,13 +69,13 @@ LoadedNetwork::LoadedNetwork(std::unique_ptr<OptimizedNetwork> net, const Worklo
     //(for example the splitter and merger layers)
     for (auto&& layer : order)
     {
-        layer->CreateTensorHandles(m_OptimizedNetwork->GetGraph(), *GetWorkloadFactory(*layer, workloadFactories));
+        layer->CreateTensorHandles(m_OptimizedNetwork->GetGraph(), GetWorkloadFactory(*layer));
     }
 
     //then create workloads
     for (auto&& layer : order)
     {
-        const shared_ptr<IWorkloadFactory> workloadFactory = GetWorkloadFactory(*layer, workloadFactories);
+        const IWorkloadFactory& workloadFactory = GetWorkloadFactory(*layer);
 
         switch (layer->GetType())
         {
@@ -86,7 +87,7 @@ LoadedNetwork::LoadedNetwork(std::unique_ptr<OptimizedNetwork> net, const Worklo
             }
         default:
             {
-                auto workload = layer->CreateWorkload(m_OptimizedNetwork->GetGraph(), *workloadFactory);
+                auto workload = layer->CreateWorkload(m_OptimizedNetwork->GetGraph(), workloadFactory);
 
                 if (!workload)
                 {
@@ -105,6 +106,11 @@ LoadedNetwork::LoadedNetwork(std::unique_ptr<OptimizedNetwork> net, const Worklo
 
     // set up memory
     m_OptimizedNetwork->GetGraph().AllocateDynamicBuffers();
+
+    // finalize the workload factories before execution
+    m_CpuRef.Finalize();
+    m_CpuAcc.Finalize();
+    m_GpuAcc.Finalize();
 }
 
 TensorInfo LoadedNetwork::GetInputTensorInfo(LayerBindingId layerId) const
@@ -136,27 +142,26 @@ TensorInfo LoadedNetwork::GetOutputTensorInfo(LayerBindingId layerId) const
     throw InvalidArgumentException(boost::str(boost::format("No output layer is associated with id %1%") % layerId));
 }
 
-const shared_ptr<IWorkloadFactory> LoadedNetwork::GetWorkloadFactory(const Layer& layer,
-    const WorkloadFactories& workloadFactories) const
+const IWorkloadFactory& LoadedNetwork::GetWorkloadFactory(const Layer& layer) const
 {
-    shared_ptr<IWorkloadFactory> workloadFactory;
+    const IWorkloadFactory* workloadFactory = nullptr;
 
     switch (layer.GetComputeDevice())
     {
         case Compute::CpuAcc:
         {
-            workloadFactory = workloadFactories.m_CpuAcc;
+            workloadFactory = &m_CpuAcc;
             break;
         }
         case Compute::GpuAcc:
         {
-            workloadFactory = workloadFactories.m_GpuAcc;
+            workloadFactory = &m_GpuAcc;
             break;
         }
         case Compute::CpuRef:
         default:
         {
-            workloadFactory = workloadFactories.m_CpuRef;
+            workloadFactory = &m_CpuRef;
             break;
         }
     }
@@ -168,7 +173,7 @@ const shared_ptr<IWorkloadFactory> LoadedNetwork::GetWorkloadFactory(const Layer
                      "Factory does not support layer");
     boost::ignore_unused(reasonIfUnsupported);
 
-    return workloadFactory;
+    return *workloadFactory;
 }
 
 namespace {
@@ -266,8 +271,7 @@ private:
 }
 
 Status LoadedNetwork::EnqueueWorkload(const InputTensors& inputTensors,
-                                      const OutputTensors& outputTensors,
-                                      const WorkloadFactories& workloadFactories)
+                                      const OutputTensors& outputTensors)
 {
     ARMNN_UPDATE_PROFILING_EVENT_TAG();
     ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "EnqueueWorkload");
@@ -293,20 +297,21 @@ Status LoadedNetwork::EnqueueWorkload(const InputTensors& inputTensors,
     for (const BindableLayer* inputLayer : graph.GetInputLayers())
     {
         const TensorPin& pin = workloadData.GetInputTensorPin(inputLayer->GetBindingId());
-        EnqueueInput(*inputLayer, pin.GetTensorHandle(), pin.GetTensorInfo(), workloadFactories);
+        EnqueueInput(*inputLayer, pin.GetTensorHandle(), pin.GetTensorInfo());
     }
 
     // for each output to the network, call EnqueueOutput with the data passed by the user
     for (const BindableLayer* outputLayer : graph.GetOutputLayers())
     {
         const TensorPin& pin = workloadData.GetOutputTensorPin(outputLayer->GetBindingId());
-        EnqueueOutput(*outputLayer, pin.GetTensorHandle(), pin.GetTensorInfo(), workloadFactories);
+        EnqueueOutput(*outputLayer, pin.GetTensorHandle(), pin.GetTensorInfo());
     }
 
     bool executionSucceeded = true;
 
     {
         ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Execute");
+        ARMNN_SCOPED_HEAP_PROFILING("Executing");
         executionSucceeded = Execute();
     }
 
@@ -316,8 +321,7 @@ Status LoadedNetwork::EnqueueWorkload(const InputTensors& inputTensors,
     return executionSucceeded ? Status::Success : Status::Failure;
 }
 
-void LoadedNetwork::EnqueueInput(const BindableLayer& layer, ITensorHandle* tensorHandle, const TensorInfo& tensorInfo,
-    const WorkloadFactories& workloadFactories)
+void LoadedNetwork::EnqueueInput(const BindableLayer& layer, ITensorHandle* tensorHandle, const TensorInfo& tensorInfo)
 {
     if (layer.GetType() != LayerType::Input)
     {
@@ -344,14 +348,13 @@ void LoadedNetwork::EnqueueInput(const BindableLayer& layer, ITensorHandle* tens
     inputQueueDescriptor.m_Outputs.push_back(outputTensorHandle);
     info.m_OutputTensorInfos.push_back(outputTensorInfo);
 
-    shared_ptr<IWorkloadFactory> workloadFactory = GetWorkloadFactory(layer, workloadFactories);
-    auto inputWorkload = workloadFactory->CreateInput(inputQueueDescriptor, info);
+    const IWorkloadFactory& workloadFactory = GetWorkloadFactory(layer);
+    auto inputWorkload = workloadFactory.CreateInput(inputQueueDescriptor, info);
     BOOST_ASSERT_MSG(inputWorkload, "No input workload created");
     m_WorkloadQueue.insert(m_WorkloadQueue.begin(), move(inputWorkload));
 }
 
-void LoadedNetwork::EnqueueOutput(const BindableLayer& layer, ITensorHandle* tensorHandle,
-    const TensorInfo& tensorInfo, const WorkloadFactories& workloadFactories)
+void LoadedNetwork::EnqueueOutput(const BindableLayer& layer, ITensorHandle* tensorHandle, const TensorInfo& tensorInfo)
 {
     if (layer.GetType() != LayerType::Output)
     {
@@ -381,8 +384,8 @@ void LoadedNetwork::EnqueueOutput(const BindableLayer& layer, ITensorHandle* ten
     outputQueueDescriptor.m_Inputs.push_back(inputTensorHandle);
     info.m_InputTensorInfos.push_back(inputTensorInfo);
 
-    shared_ptr<IWorkloadFactory> workloadFactory = GetWorkloadFactory(layer, workloadFactories);
-    auto                         outputWorkload  = workloadFactory->CreateOutput(outputQueueDescriptor, info);
+    const IWorkloadFactory& workloadFactory = GetWorkloadFactory(layer);
+    auto outputWorkload = workloadFactory.CreateOutput(outputQueueDescriptor, info);
     BOOST_ASSERT_MSG(outputWorkload, "No output workload created");
     m_WorkloadQueue.push_back(move(outputWorkload));
 }
diff --git a/src/armnn/LoadedNetwork.hpp b/src/armnn/LoadedNetwork.hpp
index d6af11e779..79a0b267e9 100644
--- a/src/armnn/LoadedNetwork.hpp
+++ b/src/armnn/LoadedNetwork.hpp
@@ -8,6 +8,9 @@
 #include "armnn/Types.hpp"
 #include "Network.hpp"
 #include "LayerFwd.hpp"
+#include "backends/RefWorkloadFactory.hpp"
+#include "backends/NeonWorkloadFactory.hpp"
+#include "backends/ClWorkloadFactory.hpp"
 #include "backends/Workload.hpp"
 #include "backends/WorkloadFactory.hpp"
 
@@ -21,38 +24,35 @@ namespace cl
 namespace armnn
 {
 
-struct WorkloadFactories;
-
 class LoadedNetwork
 {
 public:
     TensorInfo GetInputTensorInfo(LayerBindingId layerId) const;
     TensorInfo GetOutputTensorInfo(LayerBindingId layerId) const;
 
-    Status EnqueueWorkload(const InputTensors& inputTensors, const OutputTensors& outputTensors,
-        const WorkloadFactories& workloadFactories);
+    Status EnqueueWorkload(const InputTensors& inputTensors, const OutputTensors& outputTensors);
 
     static std::unique_ptr<LoadedNetwork> MakeLoadedNetwork(std::unique_ptr<OptimizedNetwork> net,
-        const WorkloadFactories& workloadFactories);
+                                                            bool useCpuRefAsFallback);
 
 private:
-    LoadedNetwork(std::unique_ptr<OptimizedNetwork> net, const WorkloadFactories& workloadFactories);
+    LoadedNetwork(std::unique_ptr<OptimizedNetwork> net, bool useCpuRefAsFallback);
 
-    void EnqueueInput(const BindableLayer& layer, ITensorHandle* tensorHandle, const TensorInfo& tensorInfo,
-        const WorkloadFactories& workloadFactories);
+    void EnqueueInput(const BindableLayer& layer, ITensorHandle* tensorHandle, const TensorInfo& tensorInfo);
 
-    void EnqueueOutput(const BindableLayer& layer, ITensorHandle* tensorHandle,
-        const TensorInfo& tensorInfo, const WorkloadFactories& workloadFactories);
+    void EnqueueOutput(const BindableLayer& layer, ITensorHandle* tensorHandle, const TensorInfo& tensorInfo);
 
     bool Execute();
 
     void TidyWorkloadQueue(size_t numInputs, size_t numOutputs);
 
-    const std::shared_ptr<IWorkloadFactory> GetWorkloadFactory(const Layer& layer,
-        const WorkloadFactories& workloadFactories) const;
+    const IWorkloadFactory& GetWorkloadFactory(const Layer& layer) const;
 
-    std::unique_ptr<OptimizedNetwork> m_OptimizedNetwork;
+    RefWorkloadFactory  m_CpuRef;
+    NeonWorkloadFactory m_CpuAcc;
+    ClWorkloadFactory   m_GpuAcc;
 
+    std::unique_ptr<OptimizedNetwork> m_OptimizedNetwork;
     std::vector< std::unique_ptr<IWorkload> > m_WorkloadQueue;
 };
 
diff --git a/src/armnn/Network.cpp b/src/armnn/Network.cpp
index 77390cb0a4..0a5325c2a4 100644
--- a/src/armnn/Network.cpp
+++ b/src/armnn/Network.cpp
@@ -7,7 +7,6 @@
 #include "Layer.hpp"
 #include "backends/CpuTensorHandle.hpp"
 #include "backends/WorkloadFactory.hpp"
-#include "Layers.hpp"
 #include "Optimizer.hpp"
 
 #include <armnn/Utils.hpp>
diff --git a/src/armnn/Runtime.cpp b/src/armnn/Runtime.cpp
index e0d6a9add0..0ca3446e1b 100644
--- a/src/armnn/Runtime.cpp
+++ b/src/armnn/Runtime.cpp
@@ -6,6 +6,8 @@
 
 #include "armnn/Version.hpp"
 
+#include <iostream>
+
 #ifdef ARMCOMPUTECL_ENABLED
 #include <arm_compute/core/CL/OpenCL.h>
 #include <arm_compute/core/CL/CLKernelLibrary.h>
@@ -46,13 +48,15 @@ Status Runtime::LoadNetwork(NetworkId& networkIdOut, IOptimizedNetworkPtr inNetw
     IOptimizedNetwork* rawNetwork = inNetwork.release();
     unique_ptr<LoadedNetwork> loadedNetwork = LoadedNetwork::MakeLoadedNetwork(
         std::unique_ptr<OptimizedNetwork>(boost::polymorphic_downcast<OptimizedNetwork*>(rawNetwork)),
-        m_WorkloadFactories);
+        m_UseCpuRefAsFallback);
 
     if (!loadedNetwork)
     {
         return Status::Failure;
     }
 
+    std::lock_guard<std::mutex> lockGuard(m_Mutex);
+
     networkIdOut = GenerateNetworkId();
 
     // store the network
@@ -66,9 +70,22 @@ Status Runtime::UnloadNetwork(NetworkId networkId)
 #ifdef ARMCOMPUTECL_ENABLED
     if (arm_compute::CLScheduler::get().context()() != NULL)
     {
-        arm_compute::CLScheduler::get().sync();
+        // wait for all queued CL requests to finish before unloading the network they may be using
+        try
+        {
+            // Coverity fix: arm_compute::CLScheduler::sync() may throw an exception of type cl::Error.
+            arm_compute::CLScheduler::get().sync();
+        }
+        catch (const cl::Error&)
+        {
+            BOOST_LOG_TRIVIAL(warning) << "WARNING: Runtime::UnloadNetwork(): an error occurred while waiting for "
+                                          "the queued CL requests to finish";
+            return Status::Failure;
+        }
     }
 #endif
+    std::lock_guard<std::mutex> lockGuard(m_Mutex);
+
     if (m_LoadedNetworks.erase(networkId) == 0)
     {
         BOOST_LOG_TRIVIAL(warning) << "WARNING: Runtime::UnloadNetwork(): " << networkId << " not found!";
@@ -77,7 +94,8 @@ Status Runtime::UnloadNetwork(NetworkId networkId)
 #ifdef ARMCOMPUTECL_ENABLED
     if (arm_compute::CLScheduler::get().context()() != NULL && m_LoadedNetworks.empty())
     {
-        m_WorkloadFactories.m_GpuAcc.get()->LoadOpenClRuntime();
+        // There are no loaded networks left, so clear the CL cache to free up memory
+        m_ClContextControl.ClearClCache();
     }
 #endif
     BOOST_LOG_TRIVIAL(debug) << "Runtime::UnloadNetwork(): Unloaded network with ID: " << networkId;
@@ -85,56 +103,81 @@ Status Runtime::UnloadNetwork(NetworkId networkId)
 }
 
 Runtime::Runtime(const CreationOptions& options)
-: m_NetworkIdCounter(0)
+    : m_ClContextControl(options.m_ClTunedParameters)
+    , m_NetworkIdCounter(0)
 {
     BOOST_LOG_TRIVIAL(info) << "ArmNN v" << ARMNN_VERSION << "\n";
     BOOST_LOG_TRIVIAL(info) << "Using compute device: " << options.m_DefaultComputeDevice << "\n";
     m_DeviceSpec.DefaultComputeDevice = options.m_DefaultComputeDevice;
 
-   // If useCpuRefAsFallback is false, the reference workload factory will be prevented from creating
-   // operation workloads, unless the default compute device is precisely the reference backend.
-    m_WorkloadFactories.m_CpuRef = make_shared<RefWorkloadFactory>(
-        options.m_DefaultComputeDevice == Compute::CpuRef ? true : options.m_UseCpuRefAsFallback);
-    m_WorkloadFactories.m_CpuAcc = make_shared<NeonWorkloadFactory>();
-    m_WorkloadFactories.m_GpuAcc = make_shared<ClWorkloadFactory>(options.m_ClTunedParameters);
-
-    if (options.m_DefaultComputeDevice == Compute::GpuAcc)
-    {
-        m_WorkloadFactories.m_GpuAcc.get()->LoadOpenClRuntime();
-    }
+    // If useCpuRefAsFallback is false, the reference workload factory will be prevented from creating
+    // operation workloads, unless the default compute device is precisely the reference backend.
+    // This option is passed to the LoadedNetwork, which owns the workload factories.
+    m_UseCpuRefAsFallback = options.m_DefaultComputeDevice == Compute::CpuRef || options.m_UseCpuRefAsFallback;
 }
 
 Runtime::~Runtime()
 {
     std::vector<int> networkIDs;
-    std::transform(m_LoadedNetworks.begin(), m_LoadedNetworks.end(),
-                   std::back_inserter(networkIDs),
-                   [](const auto &pair) { return pair.first; });
+    try
+    {
+        // Coverity fix: The following code may throw an exception of type std::length_error.
+        std::transform(m_LoadedNetworks.begin(), m_LoadedNetworks.end(),
+                       std::back_inserter(networkIDs),
+                       [](const auto &pair) { return pair.first; });
+    }
+    catch (const std::exception& e)
+    {
+        // Coverity fix: BOOST_LOG_TRIVIAL (typically used to report errors) may throw an
+        // exception of type std::length_error.
+        // Using stderr instead in this context as there is no point in nesting try-catch blocks here.
+        std::cerr << "WARNING: An error has occurred when getting the IDs of the networks to unload: " << e.what()
+                  << "\nSome of the loaded networks may not be unloaded" << std::endl;
+    }
+    // We then proceed to unload all the networks which IDs have been appended to the list
+    // up to the point the exception was thrown (if any).
 
     for (auto networkID : networkIDs)
     {
-        UnloadNetwork(networkID);
+        try
+        {
+            // Coverity fix: UnloadNetwork() may throw an exception of type std::length_error,
+            // boost::log::v2s_mt_posix::odr_violation or boost::log::v2s_mt_posix::system_error
+            UnloadNetwork(networkID);
+        }
+        catch (const std::exception& e)
+        {
+            // Coverity fix: BOOST_LOG_TRIVIAL (typically used to report errors) may throw an
+            // exception of type std::length_error.
+            // Using stderr instead in this context as there is no point in nesting try-catch blocks here.
+            std::cerr << "WARNING: An error has occurred when unloading network " << networkID << ": " << e.what()
+                      << std::endl;
+        }
     }
 }
 
+LoadedNetwork* Runtime::GetLoadedNetworkPtr(NetworkId networkId) const
+{
+    std::lock_guard<std::mutex> lockGuard(m_Mutex);
+    return m_LoadedNetworks.at(networkId).get();
+}
+
 TensorInfo Runtime::GetInputTensorInfo(NetworkId networkId, LayerBindingId layerId) const
 {
-    LoadedNetwork* net = m_LoadedNetworks.at(networkId).get();
-    return net->GetInputTensorInfo(layerId);
+    return GetLoadedNetworkPtr(networkId)->GetInputTensorInfo(layerId);
 }
 
 TensorInfo Runtime::GetOutputTensorInfo(NetworkId networkId, LayerBindingId layerId) const
 {
-    const LoadedNetwork* net = m_LoadedNetworks.at(networkId).get();
-    return net->GetOutputTensorInfo(layerId);
+    return GetLoadedNetworkPtr(networkId)->GetOutputTensorInfo(layerId);
 }
 
 Status Runtime::EnqueueWorkload(NetworkId networkId,
                                      const InputTensors& inputTensors,
                                      const OutputTensors& outputTensors)
 {
-    LoadedNetwork* loadedNetwork = m_LoadedNetworks.at(networkId).get();
-    return loadedNetwork->EnqueueWorkload(inputTensors, outputTensors, m_WorkloadFactories);
+    LoadedNetwork* loadedNetwork = GetLoadedNetworkPtr(networkId);
+    return loadedNetwork->EnqueueWorkload(inputTensors, outputTensors);
 }
 
 }
diff --git a/src/armnn/Runtime.hpp b/src/armnn/Runtime.hpp
index 86fd48d6d2..3879e1dd52 100644
--- a/src/armnn/Runtime.hpp
+++ b/src/armnn/Runtime.hpp
@@ -8,22 +8,14 @@
 #include "armnn/INetwork.hpp"
 #include "armnn/IRuntime.hpp"
 #include "armnn/Tensor.hpp"
-#include "backends/RefWorkloadFactory.hpp"
-#include "backends/NeonWorkloadFactory.hpp"
-#include "backends/ClWorkloadFactory.hpp"
+#include "backends/ClContextControl.hpp"
 
+#include <mutex>
 #include <unordered_map>
 
 namespace armnn
 {
 
-struct WorkloadFactories
-{
-    std::shared_ptr<RefWorkloadFactory> m_CpuRef;
-    std::shared_ptr<NeonWorkloadFactory> m_CpuAcc;
-    std::shared_ptr<ClWorkloadFactory> m_GpuAcc;
-};
-
 class Runtime final : public IRuntime
 {
 public:
@@ -63,12 +55,18 @@ private:
 
     int GenerateNetworkId();
 
+    LoadedNetwork* GetLoadedNetworkPtr(NetworkId networkId) const;
+
+    mutable std::mutex m_Mutex;
+
     std::unordered_map<NetworkId, std::unique_ptr<LoadedNetwork>> m_LoadedNetworks;
 
-    WorkloadFactories m_WorkloadFactories;
+    ClContextControl m_ClContextControl;
 
     int m_NetworkIdCounter;
 
+    bool m_UseCpuRefAsFallback;
+
     DeviceSpec m_DeviceSpec;
 };
 
diff --git a/src/armnn/SerializeLayerParameters.cpp b/src/armnn/SerializeLayerParameters.cpp
index e8c2bba29b..3c435dfced 100644
--- a/src/armnn/SerializeLayerParameters.cpp
+++ b/src/armnn/SerializeLayerParameters.cpp
@@ -37,19 +37,7 @@ StringifyLayerParameters<ReshapeDescriptor>::Serialize(ParameterStringifyFunctio
                                                        const ReshapeDescriptor & desc)
 {
     std::stringstream ss;
-    ss <<  "[";
-    bool addComma = false;
-    for (unsigned int i=0; i<desc.m_TargetShape.GetNumDimensions(); ++i)
-    {
-        if (addComma)
-        {
-            ss << ",";
-        }
-        ss << desc.m_TargetShape[i];
-        addComma = true;
-    }
-    ss << "]";
-
+    ss << desc.m_TargetShape;
     fn("TargetShape",ss.str());
 }
 
@@ -152,5 +140,32 @@ StringifyLayerParameters<FullyConnectedDescriptor>::Serialize(ParameterStringify
     fn("TransposeWeightMatrix", (desc.m_TransposeWeightMatrix?"true":"false"));
 }
 
+void
+StringifyLayerParameters<OriginsDescriptor>::Serialize(ParameterStringifyFunction & fn,
+                                                       const OriginsDescriptor & desc)
+{
+    uint32_t numViews = desc.GetNumViews();
+    uint32_t numDims  = desc.GetNumDimensions();
+
+    for (uint32_t view=0; view<numViews; ++view)
+    {
+        std::stringstream key;
+        key << "MergeTo#" << view;
+        std::stringstream value;
+        value << "[";
+        auto viewData = desc.GetViewOrigin(view);
+
+        for (uint32_t dim=0; dim<numDims; ++dim)
+        {
+            if(dim > 0)
+            {
+                value << ",";
+            }
+            value << viewData[dim];
+        }
+        value << "]";
+        fn(key.str(), value.str());
+    }
+}
 
 }
diff --git a/src/armnn/SerializeLayerParameters.hpp b/src/armnn/SerializeLayerParameters.hpp
index b00816067d..1a2ab1b61b 100644
--- a/src/armnn/SerializeLayerParameters.hpp
+++ b/src/armnn/SerializeLayerParameters.hpp
@@ -70,4 +70,9 @@ template <> struct StringifyLayerParameters<FullyConnectedDescriptor>
     static void Serialize(ParameterStringifyFunction & fn, const FullyConnectedDescriptor & desc);
 };
 
+template <> struct StringifyLayerParameters<OriginsDescriptor>
+{
+    static void Serialize(ParameterStringifyFunction & fn, const OriginsDescriptor & desc);
+};
+
 }
\ No newline at end of file
diff --git a/src/armnn/Utils.cpp b/src/armnn/Utils.cpp
index fb8f4d6f72..fbde701a2a 100644
--- a/src/armnn/Utils.cpp
+++ b/src/armnn/Utils.cpp
@@ -9,10 +9,10 @@
 
 namespace armnn
 {
-
 void ConfigureLogging(bool printToStandardOutput, bool printToDebugOutput, LogSeverity severity)
 {
-    armnnUtils::ConfigureLogging(boost::log::core::get().get(), printToStandardOutput, printToDebugOutput, severity);
+    using armnnUtils::ConfigureLogging;
+    ConfigureLogging(boost::log::core::get().get(), printToStandardOutput, printToDebugOutput, severity);
 }
 
 // Default to logging completely disabled.
diff --git a/src/armnn/backends/AclBaseMemoryManager.cpp b/src/armnn/backends/AclBaseMemoryManager.cpp
new file mode 100644
index 0000000000..fc796995c7
--- /dev/null
+++ b/src/armnn/backends/AclBaseMemoryManager.cpp
@@ -0,0 +1,32 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "AclBaseMemoryManager.hpp"
+
+namespace armnn
+{
+
+#if ARMCOMPUTENEON_ENABLED || ARMCOMPUTECL_ENABLED
+AclBaseMemoryManager::AclBaseMemoryManager(std::unique_ptr<arm_compute::IAllocator> alloc)
+{
+    // (re)create the memory manager components
+    m_Allocator = std::move(alloc);
+    m_IntraLayerLifetimeMgr = std::make_shared<arm_compute::BlobLifetimeManager>();
+    m_IntraLayerPoolMgr     = std::make_shared<arm_compute::PoolManager>();
+    m_IntraLayerMemoryMgr   = std::make_shared<arm_compute::MemoryManagerOnDemand>(m_IntraLayerLifetimeMgr,
+                                                                                   m_IntraLayerPoolMgr);
+}
+
+void AclBaseMemoryManager::Finalize()
+{
+    // Set allocator that the memory manager will use
+    m_IntraLayerMemoryMgr->set_allocator(m_Allocator.get());
+    // Number of pools that the manager will create. This specifies how many layers you want to run in parallel
+    m_IntraLayerMemoryMgr->set_num_pools(1);
+    // Finalize the memory manager. (Validity checks, memory allocations, etc)
+    m_IntraLayerMemoryMgr->finalize();
+}
+#endif
+
+}
diff --git a/src/armnn/backends/AclBaseMemoryManager.hpp b/src/armnn/backends/AclBaseMemoryManager.hpp
new file mode 100644
index 0000000000..74b596fe97
--- /dev/null
+++ b/src/armnn/backends/AclBaseMemoryManager.hpp
@@ -0,0 +1,46 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "WorkloadFactory.hpp"
+
+#if ARMCOMPUTENEON_ENABLED || ARMCOMPUTECL_ENABLED
+#include "arm_compute/runtime/IAllocator.h"
+#include "arm_compute/runtime/BlobLifetimeManager.h"
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+#include "arm_compute/runtime/PoolManager.h"
+
+#include <memory>
+#endif
+
+namespace armnn
+{
+
+// ARM Compute Base Memory Manager
+class AclBaseMemoryManager
+{
+public:
+
+    AclBaseMemoryManager() { }
+    virtual ~AclBaseMemoryManager() { }
+
+#if ARMCOMPUTENEON_ENABLED || ARMCOMPUTECL_ENABLED
+    AclBaseMemoryManager(std::unique_ptr<arm_compute::IAllocator> alloc);
+
+    void Finalize();
+
+    std::shared_ptr<arm_compute::MemoryManagerOnDemand>& Get() { return m_IntraLayerMemoryMgr; }
+
+protected:
+
+    mutable std::unique_ptr<arm_compute::IAllocator>            m_Allocator;
+    mutable std::shared_ptr<arm_compute::BlobLifetimeManager>   m_IntraLayerLifetimeMgr;
+    mutable std::shared_ptr<arm_compute::PoolManager>           m_IntraLayerPoolMgr;
+    mutable std::shared_ptr<arm_compute::MemoryManagerOnDemand> m_IntraLayerMemoryMgr;
+#endif
+
+};
+
+} //namespace armnn
diff --git a/src/armnn/backends/ArmComputeTensorUtils.hpp b/src/armnn/backends/ArmComputeTensorUtils.hpp
index 9a13caf495..84547f9c80 100644
--- a/src/armnn/backends/ArmComputeTensorUtils.hpp
+++ b/src/armnn/backends/ArmComputeTensorUtils.hpp
@@ -9,6 +9,7 @@
 
 #include <arm_compute/core/ITensor.h>
 #include <arm_compute/core/TensorInfo.h>
+#include <arm_compute/core/Types.h>
 
 #include <boost/cast.hpp>
 
@@ -38,6 +39,19 @@ arm_compute::NormalizationLayerInfo BuildArmComputeNormalizationLayerInfo(const
 /// Utility function used to setup an arm_compute::PermutationVector object from an armnn::PermutationVector
 arm_compute::PermutationVector BuildArmComputePermutationVector(const armnn::PermutationVector& vector);
 
+/// Utility function used to setup an arm_compute::PadStrideInfo object from an armnn layer descriptor
+template <typename Descriptor>
+arm_compute::PadStrideInfo BuildArmComputePadStrideInfo(const Descriptor &descriptor)
+{
+    return arm_compute::PadStrideInfo(descriptor.m_StrideX,
+                                      descriptor.m_StrideY,
+                                      descriptor.m_PadLeft,
+                                      descriptor.m_PadRight,
+                                      descriptor.m_PadTop,
+                                      descriptor.m_PadBottom,
+                                      arm_compute::DimensionRoundingType::FLOOR);
+}
+
 /// Sets up the given ArmCompute tensor's dimensions based on the given ArmNN tensor.
 template <typename Tensor>
 void BuildArmComputeTensor(Tensor& tensor, const armnn::TensorInfo& tensorInfo)
diff --git a/src/armnn/backends/ClContextControl.cpp b/src/armnn/backends/ClContextControl.cpp
new file mode 100644
index 0000000000..f086328e55
--- /dev/null
+++ b/src/armnn/backends/ClContextControl.cpp
@@ -0,0 +1,234 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+
+#include "ClContextControl.hpp"
+
+#include "armnn/Exceptions.hpp"
+
+#ifdef ARMCOMPUTECL_ENABLED
+#include <arm_compute/core/CL/CLKernelLibrary.h>
+#include <arm_compute/runtime/CL/CLScheduler.h>
+#endif
+
+#include <boost/assert.hpp>
+#include <boost/format.hpp>
+#include <boost/log/trivial.hpp>
+#include <boost/polymorphic_cast.hpp>
+
+#include "LeakChecking.hpp"
+
+namespace cl
+{
+class Context;
+class CommandQueue;
+class Device;
+}
+
+namespace armnn
+{
+
+ClContextControl::ClContextControl(IClTunedParameters* clTunedParameters)
+    : m_clTunedParameters(boost::polymorphic_downcast<ClTunedParameters*>(clTunedParameters))
+{
+#ifdef ARMCOMPUTECL_ENABLED
+    try
+    {
+        std::vector<cl::Platform> platforms;
+        cl::Platform::get(&platforms);
+
+        // Select default platform as the first element
+        cl::Platform::setDefault(platforms[0]);
+
+        std::vector<cl::Device> devices;
+        platforms[0].getDevices(CL_DEVICE_TYPE_GPU, &devices);
+
+        // Select default device as the first element
+        cl::Device::setDefault(devices[0]);
+    }
+    catch (const cl::Error& clError)
+    {
+        throw ClRuntimeUnavailableException(boost::str(boost::format(
+            "Could not initialize the CL runtime. Error description: %1%. CL error code: %2%"
+        ) % clError.what() % clError.err()));
+    }
+
+    // Remove the use of global CL context
+    cl::Context::setDefault(cl::Context{});
+    BOOST_ASSERT(cl::Context::getDefault()() == NULL);
+
+    // Remove the use of global CL command queue
+    cl::CommandQueue::setDefault(cl::CommandQueue{});
+    BOOST_ASSERT(cl::CommandQueue::getDefault()() == NULL);
+
+    // always load the OpenCL runtime
+    LoadOpenClRuntime();
+#endif
+}
+
+ClContextControl::~ClContextControl()
+{
+#ifdef ARMCOMPUTECL_ENABLED
+    // load the OpencCL runtime without the tuned parameters to free the memory for them
+    try
+    {
+        UnloadOpenClRuntime();
+    }
+    catch (const cl::Error& clError)
+    {
+        // this should not happen, it is ignored if it does
+
+        // Coverity fix: BOOST_LOG_TRIVIAL (previously used here to report the error) may throw an
+        // exception of type std::length_error.
+        // Using stderr instead in this context as there is no point in nesting try-catch blocks here.
+        std::cerr << "A CL error occurred unloading the runtime tuner parameters: "
+                  << clError.what() << ". CL error code is: " << clError.err() << std::endl;
+    }
+#endif
+}
+
+void ClContextControl::LoadOpenClRuntime()
+{
+    DoLoadOpenClRuntime(true);
+}
+
+void ClContextControl::UnloadOpenClRuntime()
+{
+    DoLoadOpenClRuntime(false);
+}
+
+void ClContextControl::DoLoadOpenClRuntime(bool useTunedParameters)
+{
+#ifdef ARMCOMPUTECL_ENABLED
+    cl::Device device = cl::Device::getDefault();
+    cl::Context context;
+    cl::CommandQueue commandQueue;
+
+    if (arm_compute::CLScheduler::get().context()() != NULL)
+    {
+        // wait for all queued CL requests to finish before reinitialising it
+        arm_compute::CLScheduler::get().sync();
+    }
+
+    try
+    {
+        arm_compute::CLKernelLibrary::get().clear_programs_cache();
+        // initialise the scheduler with a dummy context to release the LLVM data (which only happens when there are no
+        // context references); it is initialised again, with a proper context, later.
+        arm_compute::CLScheduler::get().init(context, commandQueue, device);
+        arm_compute::CLKernelLibrary::get().init(".", context, device);
+
+        {
+            //
+            // Here we replace the context with a new one which in
+            // the memory leak checks shows as an extra allocation but
+            // because of the scope of the leak check it doesn't count
+            // the disposal of the original object. On the other hand it
+            // does count the creation of this context which it flags
+            // as a memory leak. By adding the following line we prevent
+            // this to happen.
+            //
+            ARMNN_DISABLE_LEAK_CHECKING_IN_SCOPE();
+            context = cl::Context(device);
+        }
+
+        bool enableProfiling = false;
+#if ARMNN_PROFILING_ENABLED
+        enableProfiling = true;
+#endif
+        if (useTunedParameters &&
+            m_clTunedParameters && m_clTunedParameters->m_Mode == IClTunedParameters::Mode::UpdateTunedParameters)
+        {
+            enableProfiling = true; // Needed for the CLTuner to work.
+        }
+
+        if (enableProfiling)
+        {
+            // Create a new queue with profiling enabled
+            commandQueue = cl::CommandQueue(context, device, CL_QUEUE_PROFILING_ENABLE);
+        }
+        else
+        {
+            // Use default queue
+            commandQueue = cl::CommandQueue(context, device);
+        }
+    }
+    catch (const cl::Error& clError)
+    {
+        throw ClRuntimeUnavailableException(boost::str(boost::format(
+            "Could not initialize the CL runtime. Error description: %1%. CL error code: %2%"
+        ) % clError.what() % clError.err()));
+    }
+
+    // Note the first argument (path to cl source code) will be ignored as they should be embedded in the armcompute.
+    arm_compute::CLKernelLibrary::get().init(".", context, device);
+
+    arm_compute::ICLTuner* tuner = nullptr;
+    if (useTunedParameters && m_clTunedParameters)
+    {
+        tuner = &m_clTunedParameters->m_Tuner;
+    }
+    arm_compute::CLScheduler::get().init(context, commandQueue, device, tuner);
+#endif
+}
+
+void ClContextControl::ClearClCache()
+{
+    DoLoadOpenClRuntime(true);
+}
+
+armnn::IClTunedParameters* IClTunedParameters::CreateRaw(armnn::IClTunedParameters::Mode mode)
+{
+    return new ClTunedParameters(mode);
+}
+
+armnn::IClTunedParametersPtr IClTunedParameters::Create(armnn::IClTunedParameters::Mode mode)
+{
+    return IClTunedParametersPtr(CreateRaw(mode), &IClTunedParameters::Destroy);
+}
+
+void IClTunedParameters::Destroy(IClTunedParameters* params)
+{
+    delete params;
+}
+
+ClTunedParameters::ClTunedParameters(armnn::IClTunedParameters::Mode mode)
+    : m_Mode(mode)
+#ifdef ARMCOMPUTECL_ENABLED
+    , m_Tuner(mode == ClTunedParameters::Mode::UpdateTunedParameters)
+#endif
+{
+}
+
+void ClTunedParameters::Load(const char* filename)
+{
+#ifdef ARMCOMPUTECL_ENABLED
+    try
+    {
+        m_Tuner.load_from_file(filename);
+    }
+    catch (const std::exception& e)
+    {
+        throw armnn::Exception(std::string("Failed to load tuned parameters file '") + filename + "': " +
+            e.what());
+    }
+#endif
+}
+
+void ClTunedParameters::Save(const char* filename) const
+{
+#ifdef ARMCOMPUTECL_ENABLED
+    try
+    {
+        m_Tuner.save_to_file(filename);
+    }
+    catch (const std::exception& e)
+    {
+        throw armnn::Exception(std::string("Failed to save tuned parameters file to '") + filename + "': " +
+            e.what());
+    }
+#endif
+}
+
+} // namespace armnn
diff --git a/src/armnn/backends/ClContextControl.hpp b/src/armnn/backends/ClContextControl.hpp
new file mode 100644
index 0000000000..8098e30b75
--- /dev/null
+++ b/src/armnn/backends/ClContextControl.hpp
@@ -0,0 +1,60 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "armnn/IRuntime.hpp"
+
+#ifdef ARMCOMPUTECL_ENABLED
+#include <arm_compute/runtime/CL/CLTuner.h>
+#endif
+
+namespace armnn
+{
+
+class IClTunedParameters;
+class ClTunedParameters;
+
+// ARM Compute OpenCL context control
+class ClContextControl
+{
+public:
+
+    ClContextControl(IClTunedParameters* clTunedParameters = nullptr);
+
+    virtual ~ClContextControl();
+
+    void LoadOpenClRuntime();
+
+    // Users should call this (after freeing all of the cl::Context objects they use)
+    // to release the cached memory used by the compute library.
+    void UnloadOpenClRuntime();
+
+    // Clear the CL cache, without losing the tuned parameter settings
+    void ClearClCache();
+
+private:
+
+    void DoLoadOpenClRuntime(bool useTunedParameters);
+
+    ClTunedParameters* m_clTunedParameters;
+
+};
+
+class ClTunedParameters : public IClTunedParameters
+{
+public:
+    ClTunedParameters(armnn::IClTunedParameters::Mode mode);
+
+    virtual void Load(const char* filename);
+    virtual void Save(const char* filename) const;
+
+    Mode m_Mode;
+
+#ifdef ARMCOMPUTECL_ENABLED
+    arm_compute::CLTuner m_Tuner;
+#endif
+};
+
+} // namespace armnn
diff --git a/src/armnn/backends/ClLayerSupport.cpp b/src/armnn/backends/ClLayerSupport.cpp
index 5f0e4ea622..8905adf1fc 100644
--- a/src/armnn/backends/ClLayerSupport.cpp
+++ b/src/armnn/backends/ClLayerSupport.cpp
@@ -16,6 +16,7 @@
 
 #ifdef ARMCOMPUTECL_ENABLED
 #include "ClWorkloads/ClAdditionFloat32Workload.hpp"
+#include "ClWorkloads/ClConvolution2dBaseWorkload.hpp"
 #include "ClWorkloads/ClPooling2dBaseWorkload.hpp"
 #include "ClWorkloads/ClPermuteWorkload.hpp"
 #include "ClWorkloads/ClNormalizationFloat32Workload.hpp"
@@ -110,7 +111,7 @@ bool IsClDepthwiseConvolution2dDescParamsSupported(std::string* reasonIfUnsuppor
     {
         if (reasonIfUnsupported)
         {
-            *reasonIfUnsupported = "Depwthwise convolution Weight tensor needs to be 4d";
+            *reasonIfUnsupported = "Depthwise convolution Weight tensor needs to be 4d";
         }
         return false;
     }
@@ -233,16 +234,19 @@ bool IsDirectConvolution2dParamsSupportedCl(std::string* reasonIfUnsupported,
 }
 
 bool IsConvolution2dSupportedCl(const TensorInfo& input,
+                                const TensorInfo& output,
                                 const Convolution2dDescriptor& descriptor,
                                 const TensorInfo& weights,
+                                const TensorInfo& biases,
                                 std::string* reasonIfUnsupported)
 {
-    return IsSupportedForDataTypeCl(reasonIfUnsupported,
-                                    input.GetDataType(),
-                                    &TrueFunc<decltype(descriptor), decltype(weights)>,
-                                    &IsDirectConvolution2dParamsSupportedCl,
-                                    descriptor,
-                                    weights);
+    FORWARD_WORKLOAD_VALIDATE_FUNC(ClConvolution2dWorkloadValidate,
+                                   reasonIfUnsupported,
+                                   input,
+                                   output,
+                                   descriptor,
+                                   weights,
+                                   biases);
 }
 
 bool IsDepthwiseConvolutionSupportedCl(const TensorInfo& input,
diff --git a/src/armnn/backends/ClLayerSupport.hpp b/src/armnn/backends/ClLayerSupport.hpp
index f5b5ae8b15..4f71e907cf 100644
--- a/src/armnn/backends/ClLayerSupport.hpp
+++ b/src/armnn/backends/ClLayerSupport.hpp
@@ -33,8 +33,10 @@ bool IsConstantSupportedCl(const TensorInfo& output,
                            std::string* reasonIfUnsupported = nullptr);
 
 bool IsConvolution2dSupportedCl(const TensorInfo& input,
+                                const TensorInfo& output,
                                 const Convolution2dDescriptor& descriptor,
                                 const TensorInfo& weights,
+                                const TensorInfo& biases,
                                 std::string* reasonIfUnsupported = nullptr);
 
 bool IsDepthwiseConvolutionSupportedCl(const TensorInfo& input,
diff --git a/src/armnn/backends/ClWorkloadFactory.cpp b/src/armnn/backends/ClWorkloadFactory.cpp
index 6af657b6b4..916ca46aae 100644
--- a/src/armnn/backends/ClWorkloadFactory.cpp
+++ b/src/armnn/backends/ClWorkloadFactory.cpp
@@ -10,10 +10,10 @@
 #include <string>
 #include "CpuTensorHandle.hpp"
 #include "Layer.hpp"
-#include "Layers.hpp"
 
 #ifdef ARMCOMPUTECL_ENABLED
 #include <arm_compute/core/CL/CLKernelLibrary.h>
+#include <arm_compute/runtime/CL/CLBufferAllocator.h>
 #include <arm_compute/runtime/CL/CLScheduler.h>
 #include "backends/MemCopyWorkload.hpp"
 #include "backends/ClTensorHandle.hpp"
@@ -24,6 +24,7 @@
 
 #include <boost/polymorphic_cast.hpp>
 #include <boost/format.hpp>
+#include <boost/log/trivial.hpp>
 
 namespace armnn
 {
@@ -35,93 +36,9 @@ bool ClWorkloadFactory::IsLayerSupported(const Layer& layer, DataType dataType,
 
 #ifdef ARMCOMPUTECL_ENABLED
 
-ClWorkloadFactory::ClWorkloadFactory(IClTunedParameters* clTunedParameters):
-    m_clTunedParameters(boost::polymorphic_downcast<ClTunedParameters*>(clTunedParameters))
+ClWorkloadFactory::ClWorkloadFactory()
+: m_MemoryManager(std::make_unique<arm_compute::CLBufferAllocator>())
 {
-    try
-    {
-        std::vector<cl::Platform> platforms;
-        cl::Platform::get(&platforms);
-
-        // Select default platform as the first element
-        cl::Platform::setDefault(platforms[0]);
-
-        std::vector<cl::Device> devices;
-        platforms[0].getDevices(CL_DEVICE_TYPE_GPU, &devices);
-
-        // Select default device as the first element
-        cl::Device::setDefault(devices[0]);
-    }
-    catch (const cl::Error& clError)
-    {
-        throw ClRuntimeUnavailableException(boost::str(boost::format(
-            "Could not initialize the CL runtime. Error description: %1%. CL error code: %2%"
-        ) % clError.what() % clError.err()));
-    }
-
-    // Remove the use of global CL context
-    cl::Context::setDefault(cl::Context{});
-    BOOST_ASSERT(cl::Context::getDefault()() == NULL);
-
-    // Remove the use of global CL command queue
-    cl::CommandQueue::setDefault(cl::CommandQueue{});
-    BOOST_ASSERT(cl::CommandQueue::getDefault()() == NULL);
-}
-
-ClWorkloadFactory::~ClWorkloadFactory()
-{
-}
-
-void ClWorkloadFactory::LoadOpenClRuntime()
-{
-    cl::Device device = cl::Device::getDefault();
-    cl::Context context;
-    cl::CommandQueue commandQueue;
-
-    try
-    {
-        arm_compute::CLKernelLibrary::get().clear_programs_cache();
-        arm_compute::CLScheduler::get().init(context, commandQueue, device);
-        arm_compute::CLKernelLibrary::get().init(".", context, device);
-
-        context = cl::Context(device);
-
-        bool enableProfiling = false;
-#if ARMNN_PROFILING_ENABLED
-        enableProfiling = true;
-#endif
-        if (m_clTunedParameters && m_clTunedParameters->m_Mode == IClTunedParameters::Mode::UpdateTunedParameters)
-        {
-            enableProfiling = true; // Needed for the CLTuner to work.
-        }
-
-        if (enableProfiling)
-        {
-            // Create a new queue with profiling enabled
-            commandQueue = cl::CommandQueue(context, device, CL_QUEUE_PROFILING_ENABLE);
-        }
-        else
-        {
-            // Use default queue
-            commandQueue = cl::CommandQueue(context, device);
-        }
-    }
-    catch (const cl::Error& clError)
-    {
-        throw ClRuntimeUnavailableException(boost::str(boost::format(
-            "Could not initialize the CL runtime. Error description: %1%. CL error code: %2%"
-        ) % clError.what() % clError.err()));
-    }
-
-    // Note the first argument (path to cl source code) will be ignored as they should be embedded in the armcompute.
-    arm_compute::CLKernelLibrary::get().init(".", context, device);
-
-    arm_compute::ICLTuner* tuner = nullptr;
-    if (m_clTunedParameters)
-    {
-        tuner = &m_clTunedParameters->m_Tuner;
-    }
-    arm_compute::CLScheduler::get().init(context, commandQueue, device, tuner);
 }
 
 std::unique_ptr<ITensorHandle> ClWorkloadFactory::CreateTensorHandle(const TensorInfo& tensorInfo) const
@@ -170,7 +87,7 @@ std::unique_ptr<IWorkload> ClWorkloadFactory::CreateActivation(const ActivationQ
 std::unique_ptr<IWorkload> ClWorkloadFactory::CreateSoftmax(const SoftmaxQueueDescriptor& descriptor,
                                                             const WorkloadInfo&           info) const
 {
-    return MakeWorkload<ClSoftmaxFloat32Workload, ClSoftmaxUint8Workload>(descriptor, info);
+    return MakeWorkload<ClSoftmaxFloat32Workload, ClSoftmaxUint8Workload>(descriptor, info, m_MemoryManager.Get());
 }
 
 std::unique_ptr<IWorkload> ClWorkloadFactory::CreateSplitter(const SplitterQueueDescriptor& descriptor,
@@ -188,7 +105,7 @@ std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreateMerger(const MergerQu
 std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreateFullyConnected(
     const FullyConnectedQueueDescriptor& descriptor, const WorkloadInfo& info) const
 {
-    return MakeWorkload<ClFullyConnectedFloat32Workload, NullWorkload>(descriptor, info);
+    return MakeWorkload<ClFullyConnectedFloat32Workload, NullWorkload>(descriptor, info, m_MemoryManager.Get());
 }
 
 std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreatePermute(const PermuteQueueDescriptor& descriptor,
@@ -206,7 +123,8 @@ std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreatePooling2d(const Pooli
 std::unique_ptr<armnn::IWorkload> ClWorkloadFactory::CreateConvolution2d(const Convolution2dQueueDescriptor& descriptor,
                                                                          const WorkloadInfo&               info) const
 {
-    return MakeWorkload<ClConvolution2dFloat32Workload, ClConvolution2dUint8Workload>(descriptor, info);
+    return MakeWorkload<ClConvolution2dFloat32Workload, ClConvolution2dUint8Workload>(descriptor, info,
+                                                                                      m_MemoryManager.Get());
 }
 
 std::unique_ptr<IWorkload> ClWorkloadFactory::CreateDepthwiseConvolution2d(
@@ -302,20 +220,15 @@ std::unique_ptr<IWorkload> ClWorkloadFactory::CreateFloor(const FloorQueueDescri
     return MakeWorkload<ClFloorFloat32Workload, NullWorkload>(descriptor, info);
 }
 
-#else // #if ARMCOMPUTECL_ENABLED
-
-ClWorkloadFactory::ClWorkloadFactory(IClTunedParameters* clTunedParameters)
+void ClWorkloadFactory::Finalize()
 {
-    // No CL support
+    m_MemoryManager.Finalize();
 }
 
-ClWorkloadFactory::~ClWorkloadFactory()
-{
-}
+#else // #if ARMCOMPUTECL_ENABLED
 
-void ClWorkloadFactory::LoadOpenClRuntime()
+ClWorkloadFactory::ClWorkloadFactory()
 {
-    // No CL support
 }
 
 std::unique_ptr<ITensorHandle> ClWorkloadFactory::CreateTensorHandle(const TensorInfo& tensorInfo) const
@@ -462,59 +375,10 @@ std::unique_ptr<IWorkload> ClWorkloadFactory::CreateFloor(const FloorQueueDescri
     return nullptr;
 }
 
-#endif // #if ARMCOMPUTECL_ENABLED
-
-armnn::IClTunedParameters* IClTunedParameters::CreateRaw(armnn::IClTunedParameters::Mode mode)
-{
-    return new ClTunedParameters(mode);
-}
-
-armnn::IClTunedParametersPtr IClTunedParameters::Create(armnn::IClTunedParameters::Mode mode)
-{
-    return IClTunedParametersPtr(CreateRaw(mode), &IClTunedParameters::Destroy);
-}
-
-void IClTunedParameters::Destroy(IClTunedParameters* params)
+void ClWorkloadFactory::Finalize()
 {
-    delete params;
 }
 
-ClTunedParameters::ClTunedParameters(armnn::IClTunedParameters::Mode mode)
-    : m_Mode(mode)
-#ifdef ARMCOMPUTECL_ENABLED
-    , m_Tuner(mode == ClTunedParameters::Mode::UpdateTunedParameters)
-#endif
-{
-}
-
-void ClTunedParameters::Load(const char* filename)
-{
-#ifdef ARMCOMPUTECL_ENABLED
-    try
-    {
-        m_Tuner.load_from_file(filename);
-    }
-    catch (const std::exception& e)
-    {
-        throw armnn::Exception(std::string("Failed to load tuned parameters file '") + filename + "': " +
-            e.what());
-    }
-#endif
-}
-
-void ClTunedParameters::Save(const char* filename) const
-{
-#ifdef ARMCOMPUTECL_ENABLED
-    try
-    {
-        m_Tuner.save_to_file(filename);
-    }
-    catch (const std::exception& e)
-    {
-        throw armnn::Exception(std::string("Failed to save tuned parameters file to '") + filename + "': " +
-            e.what());
-    }
-#endif
-}
+#endif // #if ARMCOMPUTECL_ENABLED
 
 } // namespace armnn
diff --git a/src/armnn/backends/ClWorkloadFactory.hpp b/src/armnn/backends/ClWorkloadFactory.hpp
index e1e66c050b..7365fe9aeb 100644
--- a/src/armnn/backends/ClWorkloadFactory.hpp
+++ b/src/armnn/backends/ClWorkloadFactory.hpp
@@ -4,42 +4,23 @@
 //
 #pragma once
 
-#include "WorkloadFactory.hpp"
+#include "AclBaseMemoryManager.hpp"
 #include "OutputHandler.hpp"
 #include "armnn/IRuntime.hpp"
 
-#ifdef ARMCOMPUTECL_ENABLED
-#include <arm_compute/runtime/CL/CLTuner.h>
-#endif
-
-namespace cl
-{
-class Context;
-class CommandQueue;
-class Device;
-}
-
 namespace armnn
 {
 
-class IClTunedParameters;
-class ClTunedParameters;
-
 // ARM Compute OpenCL workload factory
 class ClWorkloadFactory : public IWorkloadFactory
 {
 public:
-
-    ClWorkloadFactory(IClTunedParameters* clTunedParameters = nullptr);
-
-    virtual ~ClWorkloadFactory();
+    ClWorkloadFactory();
 
     virtual Compute GetCompute() const override { return Compute::GpuAcc; }
 
     static bool IsLayerSupported(const Layer& layer, DataType dataType, std::string& outReasonIfUnsupported);
 
-    void LoadOpenClRuntime();
-
     virtual bool SupportsSubTensors() const override { return true; }
 
     virtual std::unique_ptr<ITensorHandle> CreateSubTensorHandle(ITensorHandle&      parent,
@@ -114,23 +95,11 @@ public:
     virtual std::unique_ptr<IWorkload> CreateFloor(const FloorQueueDescriptor& descriptor,
                                                    const WorkloadInfo& info) const override;
 
-private:
-    ClTunedParameters* m_clTunedParameters;
-};
+    void Finalize() override;
 
-class ClTunedParameters : public IClTunedParameters
-{
-public:
-    ClTunedParameters(armnn::IClTunedParameters::Mode mode);
-
-    virtual void Load(const char* filename);
-    virtual void Save(const char* filename) const;
-
-    Mode m_Mode;
+private:
 
-#ifdef ARMCOMPUTECL_ENABLED
-    arm_compute::CLTuner m_Tuner;
-#endif
+    mutable AclBaseMemoryManager m_MemoryManager;
 };
 
 } // namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.cpp b/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.cpp
new file mode 100644
index 0000000000..9851a22dc6
--- /dev/null
+++ b/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.cpp
@@ -0,0 +1,43 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+
+#include "ClConvolution2dBaseWorkload.hpp"
+#include "backends/ClLayerSupport.hpp"
+#include "backends/ClTensorHandle.hpp"
+#include "backends/ArmComputeUtils.hpp"
+#include "backends/ArmComputeTensorUtils.hpp"
+
+namespace armnn
+{
+using namespace armcomputetensorutils;
+
+arm_compute::Status ClConvolution2dWorkloadValidate(const TensorInfo& input,
+    const TensorInfo& output,
+    const Convolution2dDescriptor& descriptor,
+    const TensorInfo& weights,
+    const TensorInfo& biases)
+{
+    const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
+    const arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights);
+    arm_compute::TensorInfo aclBiasesInfo;
+    arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr;
+
+    if (descriptor.m_BiasEnabled)
+    {
+        aclBiasesInfo  = BuildArmComputeTensorInfo(biases);
+        optionalAclBiasesInfo = &aclBiasesInfo;
+    }
+
+    arm_compute::PadStrideInfo layerInfo = BuildArmComputePadStrideInfo(descriptor);
+
+    return arm_compute::CLConvolutionLayer::validate(&aclInputInfo,
+                                                     &aclWeightsInfo,
+                                                     optionalAclBiasesInfo,
+                                                     &aclOutputInfo,
+                                                     layerInfo);
+}
+
+}
diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.hpp b/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.hpp
new file mode 100644
index 0000000000..c4ef152361
--- /dev/null
+++ b/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.hpp
@@ -0,0 +1,19 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+
+#pragma once
+
+#include "backends/ClWorkloadUtils.hpp"
+
+namespace armnn
+{
+
+arm_compute::Status ClConvolution2dWorkloadValidate(const TensorInfo& input,
+    const TensorInfo& output,
+    const Convolution2dDescriptor& descriptor,
+    const TensorInfo& weights,
+    const TensorInfo& biases);
+
+} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.cpp b/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.cpp
index 6f4069bcc0..d7aef3d223 100644
--- a/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.cpp
+++ b/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.cpp
@@ -14,8 +14,9 @@ namespace armnn
 using namespace armcomputetensorutils;
 
 ClConvolution2dFloat32Workload::ClConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor,
-                                                               const WorkloadInfo& info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Float32Workload<Convolution2dQueueDescriptor>(descriptor, info)
+    , m_ConvolutionLayer(memoryManager)
 {
 
     // todo: check tensor shapes match
@@ -42,14 +43,11 @@ ClConvolution2dFloat32Workload::ClConvolution2dFloat32Workload(const Convolution
     arm_compute::ICLTensor& input  = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
     arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
 
-    m_pConvolutionLayer = std::make_unique<arm_compute::CLConvolutionLayer>();
-    static_cast<arm_compute::CLConvolutionLayer*>(m_pConvolutionLayer.get())->configure(&input,
-                                                                                        &m_KernelTensor,
-                                                                                        optionalBias,
-                                                                                        &output,
-                                                                                        padStrideInfo);
-
-    BOOST_ASSERT(m_pConvolutionLayer);
+    m_ConvolutionLayer.configure(&input,
+                                 &m_KernelTensor,
+                                 optionalBias,
+                                 &output,
+                                 padStrideInfo);
 
     InitialiseArmComputeClTensorData(m_KernelTensor, m_Data.m_Weight->GetConstTensor<float>());
 
@@ -62,9 +60,8 @@ ClConvolution2dFloat32Workload::ClConvolution2dFloat32Workload(const Convolution
 void ClConvolution2dFloat32Workload::Execute() const
 {
     ARMNN_SCOPED_PROFILING_EVENT(Compute::GpuAcc, "ClConvolution2dFloat32Workload_Execute");
-    BOOST_ASSERT(m_pConvolutionLayer);
 
-    m_pConvolutionLayer->run();
+    m_ConvolutionLayer.run();
 }
 
-} //namespace armnn
\ No newline at end of file
+} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.hpp b/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.hpp
index 29931056a8..4cf73c89cc 100644
--- a/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.hpp
+++ b/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.hpp
@@ -7,16 +7,22 @@
 
 #include "backends/ClWorkloadUtils.hpp"
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
+
 namespace armnn
 {
+
 class ClConvolution2dFloat32Workload : public Float32Workload<Convolution2dQueueDescriptor>
 {
 public:
-    ClConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info);
+    ClConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                   std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
     void Execute() const override;
 
 private:
-    mutable std::unique_ptr<arm_compute::IFunction>         m_pConvolutionLayer;
+    mutable arm_compute::CLConvolutionLayer         m_ConvolutionLayer;
 
     arm_compute::CLTensor m_KernelTensor;
     arm_compute::CLTensor m_BiasTensor;
diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.cpp b/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.cpp
index a3c6ac9dca..cf419e752e 100644
--- a/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.cpp
+++ b/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.cpp
@@ -14,8 +14,9 @@ namespace armnn
 using namespace armcomputetensorutils;
 
 ClConvolution2dUint8Workload::ClConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor,
-                                                           const WorkloadInfo& info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Uint8Workload<Convolution2dQueueDescriptor>(descriptor, info)
+    , m_ConvolutionLayer(memoryManager)
 {
 
     // todo: check tensor shapes match
@@ -42,16 +43,11 @@ ClConvolution2dUint8Workload::ClConvolution2dUint8Workload(const Convolution2dQu
     arm_compute::ICLTensor& input  = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
     arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
 
-    BOOST_ASSERT_MSG(IsClDirectConvolution2dSupported(weightInfo, m_Data.m_Parameters),
-                     "Unsupported parameters for u8 convolution");
-
-    m_pConvolutionLayer = std::make_unique<arm_compute::CLDirectConvolutionLayer>();
-    static_cast<arm_compute::CLDirectConvolutionLayer*>(m_pConvolutionLayer.get())->configure(&input,
-                                                                                              &m_KernelTensor,
-                                                                                              optionalBias,
-                                                                                              &output,
-                                                                                              padStrideInfo);
-    BOOST_ASSERT(m_pConvolutionLayer);
+    m_ConvolutionLayer.configure(&input,
+                                 &m_KernelTensor,
+                                 optionalBias,
+                                 &output,
+                                 padStrideInfo);
 
     InitialiseArmComputeClTensorData(m_KernelTensor, m_Data.m_Weight->GetConstTensor<uint8_t>());
 
@@ -64,9 +60,9 @@ ClConvolution2dUint8Workload::ClConvolution2dUint8Workload(const Convolution2dQu
 void ClConvolution2dUint8Workload::Execute() const
 {
     ARMNN_SCOPED_PROFILING_EVENT(Compute::GpuAcc, "ClConvolution2dUint8Workload_Execute");
-    BOOST_ASSERT(m_pConvolutionLayer);
 
-    m_pConvolutionLayer->run();
+    m_ConvolutionLayer.run();
 }
 
 } //namespace armnn
+
diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.hpp b/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.hpp
index b2849d773b..d4d3908c80 100644
--- a/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.hpp
+++ b/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.hpp
@@ -7,6 +7,9 @@
 
 #include "backends/ClWorkloadUtils.hpp"
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
 
 namespace armnn
 {
@@ -14,11 +17,12 @@ namespace armnn
 class ClConvolution2dUint8Workload : public Uint8Workload<Convolution2dQueueDescriptor>
 {
 public:
-    ClConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info);
+    ClConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                 std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
     void Execute() const override;
 
 private:
-    mutable std::unique_ptr<arm_compute::IFunction>         m_pConvolutionLayer;
+    mutable arm_compute::CLConvolutionLayer         m_ConvolutionLayer;
 
     arm_compute::CLTensor m_KernelTensor;
     arm_compute::CLTensor m_BiasTensor;
diff --git a/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.cpp b/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.cpp
index 96596b9d9c..5dfab9cbbd 100644
--- a/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.cpp
+++ b/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.cpp
@@ -13,8 +13,9 @@ namespace armnn
 using namespace armcomputetensorutils;
 
 ClFullyConnectedFloat32Workload::ClFullyConnectedFloat32Workload(const FullyConnectedQueueDescriptor& descriptor,
-                                                                 const WorkloadInfo& info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Float32Workload<FullyConnectedQueueDescriptor>(descriptor, info)
+    , m_FullyConnected(memoryManager)
 {
 
     BuildArmComputeTensor(m_WeightsTensor, m_Data.m_Weight->GetTensorInfo());
@@ -49,4 +50,4 @@ void ClFullyConnectedFloat32Workload::Execute() const
     m_FullyConnected.run();
 }
 
-} //namespace armnn
\ No newline at end of file
+} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.hpp b/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.hpp
index def20e0831..c8d1227bda 100644
--- a/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.hpp
+++ b/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.hpp
@@ -7,6 +7,9 @@
 
 #include "backends/ClWorkloadUtils.hpp"
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
 
 namespace armnn
 {
@@ -15,7 +18,8 @@ class ClFullyConnectedFloat32Workload : public armnn::Float32Workload<armnn::Ful
 {
 public:
     ClFullyConnectedFloat32Workload(const armnn::FullyConnectedQueueDescriptor& descriptor,
-        const armnn::WorkloadInfo& info);
+                                    const armnn::WorkloadInfo& info,
+                                    std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
 
     using armnn::Float32Workload<armnn::FullyConnectedQueueDescriptor>::m_Data;
     void Execute() const override;
diff --git a/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.cpp b/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.cpp
index 257e76a4df..1d05172b42 100644
--- a/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.cpp
+++ b/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.cpp
@@ -10,8 +10,10 @@
 namespace armnn
 {
 
-ClSoftmaxFloat32Workload::ClSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info)
+ClSoftmaxFloat32Workload::ClSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                                   std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Float32Workload<SoftmaxQueueDescriptor>(descriptor, info)
+    , m_SoftmaxLayer(memoryManager)
 {
     m_Data.ValidateInputsOutputs("ClSoftmaxFloat32Workload", 1, 1);
 
@@ -26,4 +28,4 @@ void ClSoftmaxFloat32Workload::Execute() const
     m_SoftmaxLayer.run();
 }
 
-} //namespace armnn
\ No newline at end of file
+} //namespace armnn
diff --git a/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.hpp b/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.hpp
index a26bbe851d..cf5c45ac6f 100644
--- a/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.hpp
+++ b/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.hpp
@@ -7,13 +7,18 @@
 
 #include "backends/ClWorkloadUtils.hpp"
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
+
 namespace armnn
 {
 
 class ClSoftmaxFloat32Workload : public Float32Workload<SoftmaxQueueDescriptor>
 {
 public:
-    ClSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info);
+    ClSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info,
+                             std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
     void Execute() const override;
 
 private:
@@ -22,5 +27,3 @@ private:
 
 } //namespace armnn
 
-
-
diff --git a/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.cpp b/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.cpp
index 9e856fea94..ee9ab4754b 100644
--- a/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.cpp
+++ b/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.cpp
@@ -10,8 +10,10 @@
 namespace armnn
 {
 
-ClSoftmaxUint8Workload::ClSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info)
+ClSoftmaxUint8Workload::ClSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                               std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Uint8Workload<SoftmaxQueueDescriptor>(descriptor, info)
+    , m_SoftmaxLayer(memoryManager)
 {
     m_Data.ValidateInputsOutputs("ClSoftmaxUint8Workload", 1, 1);
 
diff --git a/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.hpp b/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.hpp
index 07ee6256d8..36c2c781aa 100644
--- a/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.hpp
+++ b/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.hpp
@@ -7,13 +7,18 @@
 
 #include "backends/ClWorkloadUtils.hpp"
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
+
 namespace armnn
 {
 // Softmax
 class ClSoftmaxUint8Workload : public Uint8Workload<SoftmaxQueueDescriptor>
 {
 public:
-    ClSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info);
+    ClSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info,
+                           std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
 
     void Execute() const override;
 private:
@@ -23,6 +28,3 @@ private:
 
 } //namespace armnn
 
-
-
-
diff --git a/src/armnn/backends/MakeWorkloadHelper.hpp b/src/armnn/backends/MakeWorkloadHelper.hpp
index a8729eb07c..a1f9b0b0eb 100644
--- a/src/armnn/backends/MakeWorkloadHelper.hpp
+++ b/src/armnn/backends/MakeWorkloadHelper.hpp
@@ -13,10 +13,12 @@ namespace
 template<typename WorkloadType>
 struct MakeWorkloadForType
 {
-    template<typename QueueDescriptorType>
-    static std::unique_ptr<WorkloadType> Func(const QueueDescriptorType& descriptor, const WorkloadInfo& info)
+    template<typename QueueDescriptorType, typename... Args>
+    static std::unique_ptr<WorkloadType> Func(const QueueDescriptorType& descriptor,
+                                              const WorkloadInfo& info,
+                                              Args&&... args)
     {
-        return std::make_unique<WorkloadType>(descriptor, info);
+        return std::make_unique<WorkloadType>(descriptor, info, std::forward<Args>(args)...);
     }
 };
 
@@ -24,8 +26,10 @@ struct MakeWorkloadForType
 template<>
 struct MakeWorkloadForType<NullWorkload>
 {
-    template<typename QueueDescriptorType>
-    static std::unique_ptr<NullWorkload> Func(const QueueDescriptorType& descriptor, const WorkloadInfo& info)
+    template<typename QueueDescriptorType, typename... Args>
+    static std::unique_ptr<NullWorkload> Func(const QueueDescriptorType& descriptor,
+                                              const WorkloadInfo& info,
+                                              Args&&... args)
     {
         return nullptr;
     }
@@ -33,8 +37,8 @@ struct MakeWorkloadForType<NullWorkload>
 
 // Makes a workload for one the specified types based on the data type requirements of the tensorinfo.
 // Specify type void as the WorkloadType for unsupported DataType/WorkloadType combos.
-template <typename Float32Workload, typename Uint8Workload, typename QueueDescriptorType>
-std::unique_ptr<IWorkload> MakeWorkload(const QueueDescriptorType& descriptor, const WorkloadInfo& info)
+template <typename Float32Workload, typename Uint8Workload, typename QueueDescriptorType, typename... Args>
+std::unique_ptr<IWorkload> MakeWorkload(const QueueDescriptorType& descriptor, const WorkloadInfo& info, Args&&... args)
 {
     const DataType dataType = !info.m_InputTensorInfos.empty() ?
         info.m_InputTensorInfos[0].GetDataType()
@@ -46,9 +50,9 @@ std::unique_ptr<IWorkload> MakeWorkload(const QueueDescriptorType& descriptor, c
     switch (dataType)
     {
         case DataType::Float32:
-            return MakeWorkloadForType<Float32Workload>::Func(descriptor, info);
+            return MakeWorkloadForType<Float32Workload>::Func(descriptor, info, std::forward<Args>(args)...);
         case DataType::QuantisedAsymm8:
-            return MakeWorkloadForType<Uint8Workload>::Func(descriptor, info);
+            return MakeWorkloadForType<Uint8Workload>::Func(descriptor, info, std::forward<Args>(args)...);
         default:
             BOOST_ASSERT_MSG(false, "Unknown DataType.");
             return nullptr;
@@ -56,4 +60,4 @@ std::unique_ptr<IWorkload> MakeWorkload(const QueueDescriptorType& descriptor, c
 }
 
 } //namespace
-} //namespace armnn
\ No newline at end of file
+} //namespace armnn
diff --git a/src/armnn/backends/NeonLayerSupport.cpp b/src/armnn/backends/NeonLayerSupport.cpp
index d8a3366775..bfc84bd086 100644
--- a/src/armnn/backends/NeonLayerSupport.cpp
+++ b/src/armnn/backends/NeonLayerSupport.cpp
@@ -15,6 +15,7 @@
 #include <boost/core/ignore_unused.hpp>
 
 #ifdef ARMCOMPUTENEON_ENABLED
+#include "NeonWorkloads/NeonConvolution2dBaseWorkload.hpp"
 #include "NeonWorkloads/NeonPooling2dBaseWorkload.hpp"
 #include "NeonWorkloads/NeonPermuteWorkload.hpp"
 #endif
@@ -53,9 +54,10 @@ bool IsNeonDirectConvolutionPreferred(const TensorInfo& weightInfo, const Convol
     const bool strideSupported = (desc.m_StrideX == 1 || desc.m_StrideX == 2 || desc.m_StrideX == 3) &&
                                  (desc.m_StrideY == 1 || desc.m_StrideY == 2 || desc.m_StrideY == 3);
 
-    auto paddingLargerThan = [](const Convolution2dDescriptor& desc, unsigned int value)
+    auto paddingLargerThan = [](const Convolution2dDescriptor& conv2ddesc, unsigned int value)
     {
-        return desc.m_PadLeft > value || desc.m_PadRight > value || desc.m_PadTop > value || desc.m_PadBottom > value;
+        return conv2ddesc.m_PadLeft > value || conv2ddesc.m_PadRight > value ||
+               conv2ddesc.m_PadTop > value || conv2ddesc.m_PadBottom > value;
     };
 
     // Supported sizes and padding
@@ -71,22 +73,6 @@ bool IsNeonDirectConvolutionPreferred(const TensorInfo& weightInfo, const Convol
     return preferDirectConvolution;
 }
 
-bool IsNeonMultiplicationParamsSupported(std::string* reasonIfUnsupported,
-                                         const TensorInfo& info0,
-                                         const TensorInfo& info1)
-{
-    if (info0.GetShape() == info1.GetShape())
-    {
-        return true;
-    }
-
-    if (reasonIfUnsupported)
-    {
-        *reasonIfUnsupported = "Multiplication on Neon does not support implicit broadcast.";
-    }
-    return false;
-}
-
 bool IsNeonNormalizationDescParamsSupported(std::string* reasonIfUnsupported, const NormalizationDescriptor& parameters)
 {
     if (parameters.m_NormMethodType != NormalizationAlgorithmMethod::LocalBrightness)
@@ -194,16 +180,6 @@ bool IsNeonDepthwiseConvolution2dDescParamsSupported(std::string* reasonIfUnsupp
         return false;
     }
 
-    if (parameters.m_PadLeft != parameters.m_PadRight || parameters.m_PadTop != parameters.m_PadBottom)
-    {
-        if (reasonIfUnsupported)
-        {
-            *reasonIfUnsupported = "Asymmetric padding for depthwise convolution currently not supported "
-                "in Neon backend";
-        }
-        return false;
-    }
-
     return true;
 }
 
@@ -241,15 +217,19 @@ bool IsConstantSupportedNeon(const TensorInfo& output,
 }
 
 bool IsConvolution2dSupportedNeon(const TensorInfo& input,
+                                  const TensorInfo& output,
                                   const Convolution2dDescriptor& descriptor,
                                   const TensorInfo& weights,
+                                  const TensorInfo& biases,
                                   std::string* reasonIfUnsupported)
 {
-    ignore_unused(descriptor);
-    return IsSupportedForDataTypeNeon(reasonIfUnsupported,
-                                      input.GetDataType(),
-                                      &TrueFunc<>,
-                                      &TrueFunc<>);
+    FORWARD_WORKLOAD_VALIDATE_FUNC(NeonConvolution2dWorkloadValidate,
+                                   reasonIfUnsupported,
+                                   input,
+                                   output,
+                                   descriptor,
+                                   weights,
+                                   biases);
 }
 
 bool IsDepthwiseConvolutionSupportedNeon(const TensorInfo& input,
@@ -309,13 +289,11 @@ bool IsMultiplicationSupportedNeon(const TensorInfo& input0,
                                    const TensorInfo& input1,
                                    std::string* reasonIfUnsupported)
 {
+    ignore_unused(input1);
     return IsSupportedForDataTypeNeon(reasonIfUnsupported,
                                       input0.GetDataType(),
-                                      &IsNeonMultiplicationParamsSupported,
-                                      &FalseFuncU8<const TensorInfo&, const TensorInfo&>,
-                                      input0,
-                                      input1
-                            );
+                                      &TrueFunc<>,
+                                      &FalseFuncU8<>);
 }
 
 bool IsNormalizationSupportedNeon(const TensorInfo& input,
diff --git a/src/armnn/backends/NeonLayerSupport.hpp b/src/armnn/backends/NeonLayerSupport.hpp
index b2ac49ae0d..ce2ecec459 100644
--- a/src/armnn/backends/NeonLayerSupport.hpp
+++ b/src/armnn/backends/NeonLayerSupport.hpp
@@ -39,8 +39,10 @@ bool IsConstantSupportedNeon(const TensorInfo& output,
                              std::string* reasonIfUnsupported = nullptr);
 
 bool IsConvolution2dSupportedNeon(const TensorInfo& input,
+                                  const TensorInfo& output,
                                   const Convolution2dDescriptor& descriptor,
                                   const TensorInfo& weights,
+                                  const TensorInfo& biases,
                                   std::string* reasonIfUnsupported = nullptr);
 
 bool IsDepthwiseConvolutionSupportedNeon(const TensorInfo& input,
diff --git a/src/armnn/backends/NeonWorkloadFactory.cpp b/src/armnn/backends/NeonWorkloadFactory.cpp
index 0f65a3dcd7..a17988de5a 100644
--- a/src/armnn/backends/NeonWorkloadFactory.cpp
+++ b/src/armnn/backends/NeonWorkloadFactory.cpp
@@ -6,9 +6,9 @@
 #include "armnn/Utils.hpp"
 #include "CpuTensorHandle.hpp"
 #include "Layer.hpp"
-#include "Layers.hpp"
 
 #ifdef ARMCOMPUTENEON_ENABLED
+#include "arm_compute/runtime/Allocator.h"
 #include "MemCopyWorkload.hpp"
 #include "NeonTensorHandle.hpp"
 #include "NeonWorkloadUtils.hpp"
@@ -29,6 +29,11 @@ bool NeonWorkloadFactory::IsLayerSupported(const Layer& layer, DataType dataType
 
 #ifdef ARMCOMPUTENEON_ENABLED
 
+NeonWorkloadFactory::NeonWorkloadFactory()
+: m_MemoryManager(std::make_unique<arm_compute::Allocator>())
+{
+}
+
 std::unique_ptr<ITensorHandle> NeonWorkloadFactory::CreateSubTensorHandle(ITensorHandle& parent,
     TensorShape const& subTensorShape,
     unsigned int const* subTensorOrigin) const
@@ -76,7 +81,8 @@ std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateActivation(const Activatio
 std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateSoftmax(const SoftmaxQueueDescriptor& descriptor,
                                                               const WorkloadInfo&           info) const
 {
-    return MakeWorkload<NeonSoftmaxFloat32Workload, NeonSoftmaxUint8Workload>(descriptor, info);
+    return MakeWorkload<NeonSoftmaxFloat32Workload, NeonSoftmaxUint8Workload>(descriptor, info,
+                                                                              m_MemoryManager.Get());
 }
 
 std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateSplitter(const SplitterQueueDescriptor& descriptor,
@@ -94,7 +100,7 @@ std::unique_ptr<armnn::IWorkload> NeonWorkloadFactory::CreateMerger(const Merger
 std::unique_ptr<armnn::IWorkload> NeonWorkloadFactory::CreateFullyConnected(
     const FullyConnectedQueueDescriptor& descriptor, const WorkloadInfo& info) const
 {
-    return MakeWorkload<NeonFullyConnectedFloat32Workload, NullWorkload>(descriptor, info);
+    return MakeWorkload<NeonFullyConnectedFloat32Workload, NullWorkload>(descriptor, info, m_MemoryManager.Get());
 }
 
 std::unique_ptr<armnn::IWorkload> NeonWorkloadFactory::CreatePermute(const PermuteQueueDescriptor& descriptor,
@@ -112,7 +118,8 @@ std::unique_ptr<armnn::IWorkload> NeonWorkloadFactory::CreatePooling2d(const Poo
 std::unique_ptr<armnn::IWorkload> NeonWorkloadFactory::CreateConvolution2d(
     const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info) const
 {
-    return MakeWorkload<NeonConvolution2dFloat32Workload, NeonConvolution2dUint8Workload>(descriptor, info);
+    return MakeWorkload<NeonConvolution2dFloat32Workload, NeonConvolution2dUint8Workload>(descriptor, info,
+                                                                                          m_MemoryManager.Get());
 }
 
 std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateDepthwiseConvolution2d(
@@ -125,7 +132,7 @@ std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateDepthwiseConvolution2d(
 std::unique_ptr<armnn::IWorkload> NeonWorkloadFactory::CreateNormalization(
     const NormalizationQueueDescriptor& descriptor, const WorkloadInfo& info) const
 {
-    return MakeWorkload<NeonNormalizationFloat32Workload, NullWorkload>(descriptor, info);
+    return MakeWorkload<NeonNormalizationFloat32Workload, NullWorkload>(descriptor, info, m_MemoryManager.Get());
 }
 
 std::unique_ptr<armnn::IWorkload> NeonWorkloadFactory::CreateAddition(const AdditionQueueDescriptor& descriptor,
@@ -188,7 +195,7 @@ std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateFakeQuantization(
 std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateL2Normalization(const L2NormalizationQueueDescriptor& descriptor,
     const WorkloadInfo& info) const
 {
-    return MakeWorkload<NeonL2NormalizationFloat32Workload, NullWorkload>(descriptor, info);
+    return MakeWorkload<NeonL2NormalizationFloat32Workload, NullWorkload>(descriptor, info, m_MemoryManager.Get());
 }
 
 std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateConstant(const ConstantQueueDescriptor& descriptor,
@@ -209,8 +216,17 @@ std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateFloor(const FloorQueueDesc
     return MakeWorkload<NeonFloorFloat32Workload, NullWorkload>(descriptor, info);
 }
 
+void NeonWorkloadFactory::Finalize()
+{
+    m_MemoryManager.Finalize();
+}
+
 #else // Compiled without ArmCompute libs
 
+NeonWorkloadFactory::NeonWorkloadFactory()
+{
+}
+
 std::unique_ptr<ITensorHandle> NeonWorkloadFactory::CreateSubTensorHandle(ITensorHandle& parent,
     TensorShape const& subTensorShape,
     unsigned int const* subTensorOrigin) const
@@ -355,6 +371,9 @@ std::unique_ptr<IWorkload> NeonWorkloadFactory::CreateFloor(const FloorQueueDesc
     return nullptr;
 }
 
+void NeonWorkloadFactory::Finalize()
+{}
+
 #endif
 
 } //namespace armnn
diff --git a/src/armnn/backends/NeonWorkloadFactory.hpp b/src/armnn/backends/NeonWorkloadFactory.hpp
index 0e39cfe8b1..66a69f3baf 100644
--- a/src/armnn/backends/NeonWorkloadFactory.hpp
+++ b/src/armnn/backends/NeonWorkloadFactory.hpp
@@ -4,7 +4,7 @@
 //
 #pragma once
 
-#include "WorkloadFactory.hpp"
+#include "AclBaseMemoryManager.hpp"
 #include "OutputHandler.hpp"
 
 #include <boost/core/ignore_unused.hpp>
@@ -16,7 +16,7 @@ namespace armnn
 class NeonWorkloadFactory : public IWorkloadFactory
 {
 public:
-    virtual ~NeonWorkloadFactory() { };
+    NeonWorkloadFactory();
 
     virtual Compute GetCompute() const override { return Compute::CpuAcc; }
 
@@ -95,6 +95,12 @@ public:
 
     virtual std::unique_ptr<IWorkload> CreateFloor(const FloorQueueDescriptor& descriptor,
                                                    const WorkloadInfo& info) const override;
+
+    void Finalize() override;
+
+private:
+
+    mutable AclBaseMemoryManager m_MemoryManager;
 };
 
 } //namespace armnn
diff --git a/src/armnn/backends/NeonWorkloadUtils.cpp b/src/armnn/backends/NeonWorkloadUtils.cpp
index 0a108a8d38..e807d23d6c 100644
--- a/src/armnn/backends/NeonWorkloadUtils.cpp
+++ b/src/armnn/backends/NeonWorkloadUtils.cpp
@@ -11,8 +11,6 @@
 #include "armnn/Utils.hpp"
 #include "armnn/Exceptions.hpp"
 
-#include "Layers.hpp"
-
 #include <cstring>
 #include <boost/assert.hpp>
 #include <boost/cast.hpp>
diff --git a/src/armnn/backends/NeonWorkloads/NeonConvolution2dBaseWorkload.cpp b/src/armnn/backends/NeonWorkloads/NeonConvolution2dBaseWorkload.cpp
index 10c96d82a6..423f02bcb0 100644
--- a/src/armnn/backends/NeonWorkloads/NeonConvolution2dBaseWorkload.cpp
+++ b/src/armnn/backends/NeonWorkloads/NeonConvolution2dBaseWorkload.cpp
@@ -12,9 +12,38 @@
 namespace armnn
 {
 
+using namespace armcomputetensorutils;
+
+arm_compute::Status NeonConvolution2dWorkloadValidate(const TensorInfo& input,
+    const TensorInfo& output,
+    const Convolution2dDescriptor& descriptor,
+    const TensorInfo& weights,
+    const TensorInfo& biases)
+{
+    const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
+    const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
+    const arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights);
+    arm_compute::TensorInfo aclBiasesInfo;
+    arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr;
+
+    if (descriptor.m_BiasEnabled)
+    {
+        aclBiasesInfo = BuildArmComputeTensorInfo(biases);
+        optionalAclBiasesInfo = &aclBiasesInfo;
+    }
+
+    arm_compute::PadStrideInfo layerInfo = BuildArmComputePadStrideInfo(descriptor);
+
+    return arm_compute::NEConvolutionLayer::validate(&aclInputInfo,
+                                                     &aclWeightsInfo,
+                                                     optionalAclBiasesInfo,
+                                                     &aclOutputInfo,
+                                                     layerInfo);
+}
+
 template<armnn::DataType dataType>
 NeonConvolution2dBaseWorkload<dataType>::NeonConvolution2dBaseWorkload(const Convolution2dQueueDescriptor& descriptor,
-                                                                       const WorkloadInfo& info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : TypedWorkload<Convolution2dQueueDescriptor, dataType>(descriptor, info)
 {
     using arm_compute::NEDirectConvolutionLayer;
@@ -50,7 +79,7 @@ NeonConvolution2dBaseWorkload<dataType>::NeonConvolution2dBaseWorkload(const Con
 
     if (preferDirectConvolution)
     {
-        auto directConvolutionLayer = std::make_unique<arm_compute::NEDirectConvolutionLayer>();
+        auto directConvolutionLayer = std::make_unique<arm_compute::NEDirectConvolutionLayer>(memoryManager);
         directConvolutionLayer->configure(&input,
                                           &m_KernelTensor,
                                           optionalBiasTensor,
@@ -60,7 +89,7 @@ NeonConvolution2dBaseWorkload<dataType>::NeonConvolution2dBaseWorkload(const Con
     }
     else
     {
-        auto convolutionLayer = std::make_unique<arm_compute::NEConvolutionLayer>();
+        auto convolutionLayer = std::make_unique<arm_compute::NEConvolutionLayer>(memoryManager);
         convolutionLayer->configure(&input,
                                     &m_KernelTensor,
                                     optionalBiasTensor,
@@ -81,4 +110,3 @@ template class NeonConvolution2dBaseWorkload<DataType::QuantisedAsymm8>;
 
 } //namespace armnn
 
-
diff --git a/src/armnn/backends/NeonWorkloads/NeonConvolution2dBaseWorkload.hpp b/src/armnn/backends/NeonWorkloads/NeonConvolution2dBaseWorkload.hpp
index 98d075a5ea..d28d50d819 100644
--- a/src/armnn/backends/NeonWorkloads/NeonConvolution2dBaseWorkload.hpp
+++ b/src/armnn/backends/NeonWorkloads/NeonConvolution2dBaseWorkload.hpp
@@ -12,16 +12,27 @@
 #include "backends/ArmComputeTensorUtils.hpp"
 #include "backends/NeonLayerSupport.hpp"
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
+
 namespace armnn
 {
 
+arm_compute::Status NeonConvolution2dWorkloadValidate(const TensorInfo& input,
+    const TensorInfo& output,
+    const Convolution2dDescriptor& descriptor,
+    const TensorInfo& weights,
+    const TensorInfo& biases);
+
 template<armnn::DataType dataType>
 class NeonConvolution2dBaseWorkload : public TypedWorkload<Convolution2dQueueDescriptor, dataType>
 {
 public:
     using TypedWorkload<Convolution2dQueueDescriptor, dataType>::m_Data;
 
-    NeonConvolution2dBaseWorkload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info);
+    NeonConvolution2dBaseWorkload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                  std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
 
     virtual void ValidateData() const {};
 
@@ -30,4 +41,5 @@ protected:
     arm_compute::Tensor m_KernelTensor;
     arm_compute::Tensor m_BiasTensor;
 };
-} //namespace armnn
\ No newline at end of file
+
+} //namespace armnn
diff --git a/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloat32Workload.cpp b/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloat32Workload.cpp
index a8c5c63683..f20f2a4ac5 100644
--- a/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloat32Workload.cpp
+++ b/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloat32Workload.cpp
@@ -13,8 +13,8 @@ namespace armnn
 using namespace armcomputetensorutils;
 
 NeonConvolution2dFloat32Workload::NeonConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor,
-                                                                   const WorkloadInfo& info)
-    : NeonConvolution2dBaseWorkload(descriptor, info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
+    : NeonConvolution2dBaseWorkload(descriptor, info, memoryManager)
 {
     if (m_Data.m_Parameters.m_BiasEnabled)
     {
@@ -22,7 +22,6 @@ NeonConvolution2dFloat32Workload::NeonConvolution2dFloat32Workload(const Convolu
     }
 }
 
-
 void NeonConvolution2dFloat32Workload::Execute() const
 {
     ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuAcc, "NeonConvolution2dFloat32Workload_Execute");
@@ -34,8 +33,5 @@ void NeonConvolution2dFloat32Workload::ValidateData() const
     m_Data.ValidateInputsOutputs("NeonConvolution2dFloat32Workload", 1, 1);
 }
 
-
-
 } //namespace armnn
 
-
diff --git a/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloat32Workload.hpp b/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloat32Workload.hpp
index f4d95d623f..56b0848efa 100644
--- a/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloat32Workload.hpp
+++ b/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloat32Workload.hpp
@@ -5,21 +5,25 @@
 
 #pragma once
 
-#include <backends/NeonWorkloadUtils.hpp>
 #include "NeonConvolution2dBaseWorkload.hpp"
+#include <backends/NeonWorkloadUtils.hpp>
+
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
 
 namespace armnn
 {
+
 class NeonConvolution2dFloat32Workload : public NeonConvolution2dBaseWorkload<DataType::Float32>
 {
 public:
-    NeonConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info);
+    NeonConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                     std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
 
     void Execute() const override;
     void ValidateData() const override;
 };
-} //namespace armnn
-
-
 
+} //namespace armnn
 
diff --git a/src/armnn/backends/NeonWorkloads/NeonConvolution2dUint8Workload.cpp b/src/armnn/backends/NeonWorkloads/NeonConvolution2dUint8Workload.cpp
index ae20522361..fb91f7b7b2 100644
--- a/src/armnn/backends/NeonWorkloads/NeonConvolution2dUint8Workload.cpp
+++ b/src/armnn/backends/NeonWorkloads/NeonConvolution2dUint8Workload.cpp
@@ -5,12 +5,12 @@
 
 #include "NeonConvolution2dUint8Workload.hpp"
 
-
 namespace armnn
 {
+
 NeonConvolution2dUint8Workload::NeonConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor,
-                                                             const WorkloadInfo& info)
-    : NeonConvolution2dBaseWorkload(descriptor, info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
+    : NeonConvolution2dBaseWorkload(descriptor, info, memoryManager)
 {
     if (m_Data.m_Parameters.m_BiasEnabled)
     {
@@ -21,7 +21,7 @@ NeonConvolution2dUint8Workload::NeonConvolution2dUint8Workload(const Convolution
 
 void NeonConvolution2dUint8Workload::Execute() const
 {
-    ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuAcc, NeonConvolution2dUint8Workload_Execute);
+    ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuAcc, "NeonConvolution2dUint8Workload_Execute");
     m_ConvolutionLayer->run();
 }
 
@@ -30,4 +30,4 @@ void NeonConvolution2dUint8Workload::ValidateData() const
     m_Data.ValidateInputsOutputs("NeonConvolution2dUint8Workload", 1, 1);
 }
 
-} //namespace armnn
\ No newline at end of file
+} //namespace armnn
diff --git a/src/armnn/backends/NeonWorkloads/NeonConvolution2dUint8Workload.hpp b/src/armnn/backends/NeonWorkloads/NeonConvolution2dUint8Workload.hpp
index 319d574b1e..5b977210c4 100644
--- a/src/armnn/backends/NeonWorkloads/NeonConvolution2dUint8Workload.hpp
+++ b/src/armnn/backends/NeonWorkloads/NeonConvolution2dUint8Workload.hpp
@@ -7,13 +7,18 @@
 
 #include "NeonConvolution2dBaseWorkload.hpp"
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
+
 namespace armnn
 {
 
 class NeonConvolution2dUint8Workload : public NeonConvolution2dBaseWorkload<DataType::QuantisedAsymm8>
 {
 public:
-    NeonConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info);
+    NeonConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                   std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
 
     virtual void ValidateData() const override;
     virtual void Execute() const override;
@@ -22,6 +27,3 @@ private:
 
 } //namespace armnnn
 
-
-
-
diff --git a/src/armnn/backends/NeonWorkloads/NeonFullyConnectedFloat32Workload.cpp b/src/armnn/backends/NeonWorkloads/NeonFullyConnectedFloat32Workload.cpp
index 54c4e4333c..e1c4448642 100644
--- a/src/armnn/backends/NeonWorkloads/NeonFullyConnectedFloat32Workload.cpp
+++ b/src/armnn/backends/NeonWorkloads/NeonFullyConnectedFloat32Workload.cpp
@@ -7,14 +7,14 @@
 #include "backends/CpuTensorHandle.hpp"
 #include "backends/ArmComputeTensorUtils.hpp"
 
-
 namespace armnn
 {
 using namespace armcomputetensorutils;
 
 NeonFullyConnectedFloat32Workload::NeonFullyConnectedFloat32Workload(const FullyConnectedQueueDescriptor& descriptor,
-                                                                     const WorkloadInfo& info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Float32Workload<FullyConnectedQueueDescriptor>(descriptor, info)
+    , m_FullyConnectedLayer(memoryManager)
 {
     m_Data.ValidateInputsOutputs("NeonFullyConnectedFloat32Workload", 1, 1);
 
@@ -51,4 +51,3 @@ void NeonFullyConnectedFloat32Workload::Execute() const
 
 } //namespace armnn
 
-
diff --git a/src/armnn/backends/NeonWorkloads/NeonFullyConnectedFloat32Workload.hpp b/src/armnn/backends/NeonWorkloads/NeonFullyConnectedFloat32Workload.hpp
index f9230f1d93..9c722dc573 100644
--- a/src/armnn/backends/NeonWorkloads/NeonFullyConnectedFloat32Workload.hpp
+++ b/src/armnn/backends/NeonWorkloads/NeonFullyConnectedFloat32Workload.hpp
@@ -7,13 +7,18 @@
 
 #include <backends/NeonWorkloadUtils.hpp>
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
+
 namespace armnn
 {
 
 class NeonFullyConnectedFloat32Workload : public Float32Workload<FullyConnectedQueueDescriptor>
 {
 public:
-    NeonFullyConnectedFloat32Workload(const FullyConnectedQueueDescriptor& descriptor, const WorkloadInfo& info);
+    NeonFullyConnectedFloat32Workload(const FullyConnectedQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                      std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
     virtual void Execute() const override;
 
 private:
@@ -24,7 +29,3 @@ private:
 
 } //namespace armnn
 
-
-
-
-
diff --git a/src/armnn/backends/NeonWorkloads/NeonL2NormalizationFloat32Workload.cpp b/src/armnn/backends/NeonWorkloads/NeonL2NormalizationFloat32Workload.cpp
index 085f58a219..9f79fa09de 100644
--- a/src/armnn/backends/NeonWorkloads/NeonL2NormalizationFloat32Workload.cpp
+++ b/src/armnn/backends/NeonWorkloads/NeonL2NormalizationFloat32Workload.cpp
@@ -6,13 +6,13 @@
 #include "NeonL2NormalizationFloat32Workload.hpp"
 #include "backends/ArmComputeUtils.hpp"
 
-
 namespace armnn
 {
 
 NeonL2NormalizationFloat32Workload::NeonL2NormalizationFloat32Workload(const L2NormalizationQueueDescriptor& descriptor,
-                                                                       const WorkloadInfo& info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Float32Workload<L2NormalizationQueueDescriptor>(descriptor, info)
+    , m_Layer(memoryManager)
 {
     m_Data.ValidateInputsOutputs("NeonL2NormalizationFloat32Workload", 1, 1);
 
diff --git a/src/armnn/backends/NeonWorkloads/NeonL2NormalizationFloat32Workload.hpp b/src/armnn/backends/NeonWorkloads/NeonL2NormalizationFloat32Workload.hpp
index 6cab28366a..2b4a1fef37 100644
--- a/src/armnn/backends/NeonWorkloads/NeonL2NormalizationFloat32Workload.hpp
+++ b/src/armnn/backends/NeonWorkloads/NeonL2NormalizationFloat32Workload.hpp
@@ -7,20 +7,24 @@
 
 #include <backends/NeonWorkloadUtils.hpp>
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
+
 namespace armnn
 {
+
 class NeonL2NormalizationFloat32Workload : public Float32Workload<L2NormalizationQueueDescriptor>
 {
 public:
-    NeonL2NormalizationFloat32Workload(const L2NormalizationQueueDescriptor& descriptor, const WorkloadInfo& info);
+    NeonL2NormalizationFloat32Workload(const L2NormalizationQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                       std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
     virtual void Execute() const override;
 
 private:
     // Purposely not a NEL2Normalize function. See constructor.
     mutable arm_compute::NENormalizationLayer m_Layer;
 };
-} //namespace armnn
-
-
 
+} //namespace armnn
 
diff --git a/src/armnn/backends/NeonWorkloads/NeonNormalizationFloat32Workload.cpp b/src/armnn/backends/NeonWorkloads/NeonNormalizationFloat32Workload.cpp
index 739390d5a1..0fd0dcc420 100644
--- a/src/armnn/backends/NeonWorkloads/NeonNormalizationFloat32Workload.cpp
+++ b/src/armnn/backends/NeonWorkloads/NeonNormalizationFloat32Workload.cpp
@@ -11,8 +11,9 @@ namespace armnn
 {
 
 NeonNormalizationFloat32Workload::NeonNormalizationFloat32Workload(const NormalizationQueueDescriptor& descriptor,
-                                                                   const WorkloadInfo& info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Float32Workload<NormalizationQueueDescriptor>(descriptor, info)
+    , m_NormalizationLayer(memoryManager)
 {
     m_Data.ValidateInputsOutputs("NeonNormalizationFloat32Workload", 1, 1);
     std::string reasonIfUnsupported;
diff --git a/src/armnn/backends/NeonWorkloads/NeonNormalizationFloat32Workload.hpp b/src/armnn/backends/NeonWorkloads/NeonNormalizationFloat32Workload.hpp
index 12a0fa80b2..24b6da8528 100644
--- a/src/armnn/backends/NeonWorkloads/NeonNormalizationFloat32Workload.hpp
+++ b/src/armnn/backends/NeonWorkloads/NeonNormalizationFloat32Workload.hpp
@@ -7,13 +7,16 @@
 
 #include <backends/NeonWorkloadUtils.hpp>
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
 namespace armnn
 {
 
 class NeonNormalizationFloat32Workload : public Float32Workload<NormalizationQueueDescriptor>
 {
 public:
-    NeonNormalizationFloat32Workload(const NormalizationQueueDescriptor& descriptor, const WorkloadInfo& info);
+    NeonNormalizationFloat32Workload(const NormalizationQueueDescriptor& descriptor, const WorkloadInfo& info,
+                                     std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
     virtual void Execute() const override;
 
 private:
diff --git a/src/armnn/backends/NeonWorkloads/NeonSoftmaxFloat32Workload.cpp b/src/armnn/backends/NeonWorkloads/NeonSoftmaxFloat32Workload.cpp
index 229562ece2..5e2925ca02 100644
--- a/src/armnn/backends/NeonWorkloads/NeonSoftmaxFloat32Workload.cpp
+++ b/src/armnn/backends/NeonWorkloads/NeonSoftmaxFloat32Workload.cpp
@@ -7,9 +7,11 @@
 
 namespace armnn
 {
+
 NeonSoftmaxFloat32Workload::NeonSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor,
-                                                       const WorkloadInfo& info)
+    const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Float32Workload<SoftmaxQueueDescriptor>(descriptor, info)
+    , m_SoftmaxLayer(memoryManager)
 {
     m_Data.ValidateInputsOutputs("NeonSoftmaxFloat32Workload", 1, 1);
 
@@ -25,7 +27,6 @@ void NeonSoftmaxFloat32Workload::Execute() const
     ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuAcc, "NeonSoftmaxFloat32Workload_Execute");
     m_SoftmaxLayer.run();
 }
-} //namespace armnn
-
 
+} //namespace armnn
 
diff --git a/src/armnn/backends/NeonWorkloads/NeonSoftmaxFloat32Workload.hpp b/src/armnn/backends/NeonWorkloads/NeonSoftmaxFloat32Workload.hpp
index c466a0f9c6..91d25b47f8 100644
--- a/src/armnn/backends/NeonWorkloads/NeonSoftmaxFloat32Workload.hpp
+++ b/src/armnn/backends/NeonWorkloads/NeonSoftmaxFloat32Workload.hpp
@@ -7,13 +7,18 @@
 
 #include <backends/NeonWorkloadUtils.hpp>
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
+#include <memory>
+
 namespace armnn
 {
 
 class NeonSoftmaxFloat32Workload : public Float32Workload<SoftmaxQueueDescriptor>
 {
 public:
-    NeonSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info);
+    NeonSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info,
+                               std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
     virtual void Execute() const override;
 
 private:
@@ -22,6 +27,3 @@ private:
 
 } //namespace armnn
 
-
-
-
diff --git a/src/armnn/backends/NeonWorkloads/NeonSoftmaxUint8Workload.cpp b/src/armnn/backends/NeonWorkloads/NeonSoftmaxUint8Workload.cpp
index a66b0343ff..eb4a23c13c 100644
--- a/src/armnn/backends/NeonWorkloads/NeonSoftmaxUint8Workload.cpp
+++ b/src/armnn/backends/NeonWorkloads/NeonSoftmaxUint8Workload.cpp
@@ -5,12 +5,14 @@
 
 #include "NeonSoftmaxUint8Workload.hpp"
 
-
-
 namespace armnn
 {
-NeonSoftmaxUint8Workload::NeonSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info)
+
+NeonSoftmaxUint8Workload::NeonSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor,
+                                                   const WorkloadInfo& info,
+                                                   std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager)
     : Uint8Workload<SoftmaxQueueDescriptor>(descriptor, info)
+    , m_SoftmaxLayer(memoryManager)
 {
     m_Data.ValidateInputsOutputs("NeonSoftmaxUint8Workload", 1, 1);
 
@@ -34,5 +36,6 @@ void NeonSoftmaxUint8Workload::Execute() const
 
     m_SoftmaxLayer.run();
 }
+
 } //namespace armnn
 
diff --git a/src/armnn/backends/NeonWorkloads/NeonSoftmaxUint8Workload.hpp b/src/armnn/backends/NeonWorkloads/NeonSoftmaxUint8Workload.hpp
index bccd82a850..19549ef3ef 100644
--- a/src/armnn/backends/NeonWorkloads/NeonSoftmaxUint8Workload.hpp
+++ b/src/armnn/backends/NeonWorkloads/NeonSoftmaxUint8Workload.hpp
@@ -7,13 +7,16 @@
 
 #include <backends/NeonWorkloadUtils.hpp>
 
+#include "arm_compute/runtime/MemoryManagerOnDemand.h"
+
 namespace armnn
 {
 
 class NeonSoftmaxUint8Workload : public Uint8Workload<SoftmaxQueueDescriptor>
 {
 public:
-    NeonSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info);
+    NeonSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info,
+                             std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager);
     virtual void Execute() const override;
 
 private:
@@ -22,6 +25,3 @@ private:
 
 } //namespace armnn
 
-
-
-
diff --git a/src/armnn/backends/RefLayerSupport.cpp b/src/armnn/backends/RefLayerSupport.cpp
index 964c18e8ea..0b94656ded 100644
--- a/src/armnn/backends/RefLayerSupport.cpp
+++ b/src/armnn/backends/RefLayerSupport.cpp
@@ -77,11 +77,16 @@ bool IsConstantSupportedRef(const TensorInfo& output,
 }
 
 bool IsConvolution2dSupportedRef(const TensorInfo& input,
+                                 const TensorInfo& output,
                                  const Convolution2dDescriptor& descriptor,
                                  const TensorInfo& weights,
+                                 const TensorInfo& biases,
                                  std::string* reasonIfUnsupported)
 {
     ignore_unused(descriptor);
+    ignore_unused(output);
+    ignore_unused(weights);
+    ignore_unused(biases);
     return IsSupportedForDataTypeRef(reasonIfUnsupported,
                                      input.GetDataType(),
                                      &TrueFunc<>,
diff --git a/src/armnn/backends/RefLayerSupport.hpp b/src/armnn/backends/RefLayerSupport.hpp
index 4a329aef34..9db1c14596 100644
--- a/src/armnn/backends/RefLayerSupport.hpp
+++ b/src/armnn/backends/RefLayerSupport.hpp
@@ -28,8 +28,10 @@ bool IsConstantSupportedRef(const TensorInfo& output,
                             std::string* reasonIfUnsupported = nullptr);
 
 bool IsConvolution2dSupportedRef(const TensorInfo& input,
+                                 const TensorInfo& output,
                                  const Convolution2dDescriptor& descriptor,
                                  const TensorInfo& weights,
+                                 const TensorInfo& biases,
                                  std::string* reasonIfUnsupported = nullptr);
 
 bool IsDepthwiseConvolutionSupportedRef(const TensorInfo& input,
diff --git a/src/armnn/backends/RefWorkloadFactory.cpp b/src/armnn/backends/RefWorkloadFactory.cpp
index 46502d8142..d7d498e89e 100644
--- a/src/armnn/backends/RefWorkloadFactory.cpp
+++ b/src/armnn/backends/RefWorkloadFactory.cpp
@@ -6,7 +6,6 @@
 #include "RefWorkloadFactory.hpp"
 #include "RefWorkloads.hpp"
 #include "Layer.hpp"
-#include "Layers.hpp"
 #include "MemCopyWorkload.hpp"
 #include "MakeWorkloadHelper.hpp"
 
@@ -187,7 +186,6 @@ std::unique_ptr<armnn::IWorkload> RefWorkloadFactory::CreateMemCopy(const MemCop
 #endif
     default:
         throw InvalidArgumentException("RefWorkloadFactory: Destination type not supported for MemCopy Workload.");
-        return nullptr;
     }
 }
 
diff --git a/src/armnn/backends/RefWorkloads/ConvImpl.hpp b/src/armnn/backends/RefWorkloads/ConvImpl.hpp
index ecc5b14687..8b66b0b7d2 100644
--- a/src/armnn/backends/RefWorkloads/ConvImpl.hpp
+++ b/src/armnn/backends/RefWorkloads/ConvImpl.hpp
@@ -57,6 +57,11 @@ static void ConvImpl(ConvData data,
                      int32_t outputOffset,
                      bool depthwise = false)
 {
+    if (data.m_Parameters.m_BiasEnabled && !biasData)
+    {
+        throw InvalidArgumentException("Bias is enabled but the bias data is invalid");
+    }
+
     const TensorInfo& inputInfo0 = GetTensorInfo(data.m_Inputs[0]);
     const TensorInfo& outputInfo0 = GetTensorInfo(data.m_Outputs[0]);
     const TensorInfo& filterInfo = data.m_Weight->GetTensorInfo();
@@ -65,8 +70,6 @@ static void ConvImpl(ConvData data,
     unsigned int channelsInput  = filterInfo.GetShape()[1];
     unsigned int channelsOutput = depthwise ? channelsInput * depthMult : filterInfo.GetShape()[0];
 
-    BOOST_ASSERT(data.m_Parameters.m_BiasEnabled == false || biasData != nullptr);
-
     unsigned int batchSize    = outputInfo0.GetShape()[0];
     unsigned int heightOutput = outputInfo0.GetShape()[2];
     unsigned int widthOutput  = outputInfo0.GetShape()[3];
diff --git a/src/armnn/backends/RefWorkloads/Merger.hpp b/src/armnn/backends/RefWorkloads/Merger.hpp
index 476ced76be..7d1bfab557 100644
--- a/src/armnn/backends/RefWorkloads/Merger.hpp
+++ b/src/armnn/backends/RefWorkloads/Merger.hpp
@@ -21,7 +21,7 @@ void Merger(const MergerQueueDescriptor& data)
 
     for (unsigned int index = 0 ; index < outputInfo0.GetNumElements(); ++index)
     {
-        unsigned int indices[MaxNumOfTensorDimensions];
+        unsigned int indices[MaxNumOfTensorDimensions] = { 0 };
 
         unsigned int indexRemainder = index;
         unsigned int dimensionStride = outputInfo0.GetNumElements();
diff --git a/src/armnn/backends/RefWorkloads/Splitter.hpp b/src/armnn/backends/RefWorkloads/Splitter.hpp
index 74c4cb4e18..bd5da6cfe2 100644
--- a/src/armnn/backends/RefWorkloads/Splitter.hpp
+++ b/src/armnn/backends/RefWorkloads/Splitter.hpp
@@ -23,7 +23,7 @@ void Splitter(const SplitterQueueDescriptor& data)
 
     for (unsigned int index = 0; index < inputInfo0.GetNumElements(); ++index)
     {
-        unsigned int indices[MaxNumOfTensorDimensions];
+        unsigned int indices[MaxNumOfTensorDimensions] = { 0 };
 
         unsigned int indexRemainder = index;
         unsigned int dimensionStride = inputInfo0.GetNumElements();
diff --git a/src/armnn/backends/WorkloadFactory.cpp b/src/armnn/backends/WorkloadFactory.cpp
index 32634a6d0f..4e94d7701c 100644
--- a/src/armnn/backends/WorkloadFactory.cpp
+++ b/src/armnn/backends/WorkloadFactory.cpp
@@ -10,7 +10,7 @@
 #include "armnn/Types.hpp"
 #include "armnn/LayerSupport.hpp"
 #include "Layer.hpp"
-#include "Layers.hpp"
+#include "LayersFwd.hpp"
 #include "CpuTensorHandle.hpp"
 
 #include <boost/cast.hpp>
@@ -60,8 +60,50 @@ bool IWorkloadFactory::IsLayerSupported(Compute compute, const Layer& layer, Dat
         {
             auto cLayer = boost::polymorphic_downcast<const Convolution2dLayer*>(&layer);
             const TensorInfo& input = layer.GetInputSlot(0).GetConnection()->GetTensorInfo();
-            result = IsConvolution2dSupported(compute, input, cLayer->GetParameters(),
-                                            cLayer->m_Weight->GetTensorInfo(), reason, reasonCapacity);
+            const TensorInfo& output = layer.GetOutputSlot(0).GetTensorInfo();
+            BOOST_ASSERT(cLayer->m_Weight.get() != nullptr);
+
+            const TensorInfo * biasInfo = nullptr;
+            static const TensorInfo dummyFloat32Bias(TensorShape({1,1,1,1}), DataType::Float32);
+            static const TensorInfo dummyQA8Bias(TensorShape({1,1,1,1}), DataType::Signed32);
+
+            const Convolution2dDescriptor& descriptor = cLayer->GetParameters();
+
+            if (descriptor.m_BiasEnabled)
+            {
+                BOOST_ASSERT(cLayer->m_Bias.get() != nullptr);
+                biasInfo = &(cLayer->m_Bias->GetTensorInfo());
+            }
+            else
+            {
+                // If biases are not enabled I pass a dummy tensorinfo for the validation
+                switch(input.GetDataType())
+                {
+                    case DataType::Float32:
+                    {
+                        biasInfo = &dummyFloat32Bias;
+                        break;
+                    }
+                    case DataType::QuantisedAsymm8:
+                    {
+                        biasInfo = &dummyQA8Bias;
+                        break;
+                    }
+                    default:
+                    {
+                        BOOST_ASSERT_MSG(false, "Unexpected input type");
+                    }
+                }
+            }
+
+            result = IsConvolution2dSupported(compute,
+                                              input,
+                                              output,
+                                              descriptor,
+                                              cLayer->m_Weight->GetTensorInfo(),
+                                              *biasInfo,
+                                              reason,
+                                              reasonCapacity);
             break;
         }
         case LayerType::MemCopy:
@@ -211,4 +253,4 @@ bool IWorkloadFactory::IsLayerSupported(const Layer& layer, DataType dataType, s
     return IsLayerSupported(layer.GetComputeDevice(), layer, dataType, outReasonIfUnsupported);
 }
 
-}
\ No newline at end of file
+}
diff --git a/src/armnn/backends/WorkloadFactory.hpp b/src/armnn/backends/WorkloadFactory.hpp
index d3f5bfb40f..5791c1b46f 100644
--- a/src/armnn/backends/WorkloadFactory.hpp
+++ b/src/armnn/backends/WorkloadFactory.hpp
@@ -22,8 +22,11 @@ public:
 
     virtual Compute GetCompute() const = 0;
 
+    /// Informs the memory manager that the network is finalized and ready for execution.
+    virtual void Finalize() { }
+
     static bool IsLayerSupported(Compute compute, const Layer& layer, DataType dataType,
-        std::string& outReasonIfUnsupported);
+                                 std::string& outReasonIfUnsupported);
     static bool IsLayerSupported(const Layer& layer, DataType dataType, std::string& outReasonIfUnsupported);
 
     virtual bool SupportsSubTensors() const = 0;
@@ -102,4 +105,4 @@ public:
                                                    const WorkloadInfo& info) const = 0;
 };
 
-} //namespace armnn
\ No newline at end of file
+} //namespace armnn
diff --git a/src/armnn/backends/test/ArmComputeCl.cpp b/src/armnn/backends/test/ArmComputeCl.cpp
index c45a82db63..ae42d03ee3 100644
--- a/src/armnn/backends/test/ArmComputeCl.cpp
+++ b/src/armnn/backends/test/ArmComputeCl.cpp
@@ -62,6 +62,9 @@ ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1, DepthwiseConvoluti
 ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1Uint8, DepthwiseConvolution2dDepthMul1Uint8Test, true)
 ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1Uint8, DepthwiseConvolution2dDepthMul1Uint8Test, false)
 
+ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dAsymmetric, DepthwiseConvolution2dAsymmetricTest, true)
+ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dAsymmetric, DepthwiseConvolution2dAsymmetricTest, false)
+
 // Splitter
 BOOST_AUTO_TEST_CASE(SimpleSplitter)
 {
diff --git a/src/armnn/backends/test/ArmComputeNeon.cpp b/src/armnn/backends/test/ArmComputeNeon.cpp
index a81b7cdcd7..0a78b75e2e 100644
--- a/src/armnn/backends/test/ArmComputeNeon.cpp
+++ b/src/armnn/backends/test/ArmComputeNeon.cpp
@@ -88,6 +88,9 @@ ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1, DepthwiseConvoluti
 ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1Uint8, DepthwiseConvolution2dDepthMul1Uint8Test, true)
 ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1Uint8, DepthwiseConvolution2dDepthMul1Uint8Test, false)
 
+ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dAsymmetric, DepthwiseConvolution2dAsymmetricTest, true)
+ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dAsymmetric, DepthwiseConvolution2dAsymmetricTest, false)
+
 namespace
 {
 
@@ -134,6 +137,10 @@ BOOST_AUTO_TEST_CASE(DepthwiseConv2dUtils)
     // Supported shape 2x2
     armnn::TensorInfo weightsInfo2x2({ 1, 1, 2, 2 }, armnn::DataType::Float32);
     BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, MakeDepthwiseConv2dDesc(1, 1), weightsInfo2x2));
+
+    // Asymmetric padding
+    BOOST_TEST(armnn::IsDepthwiseConvolutionSupportedNeon(inputInfo, MakeDepthwiseConv2dDesc(1, 1, 1, 1, 2, 1, 2),
+                                                          weightsInfo3x3));
 }
 
 // Pooling
@@ -235,6 +242,8 @@ ARMNN_AUTO_TEST_CASE(AddBroadcast1Element, AdditionBroadcast1ElementTest)
 
 // Mul
 ARMNN_AUTO_TEST_CASE(SimpleMultiplication, MultiplicationTest)
+ARMNN_AUTO_TEST_CASE(MultiplicationBroadcast1Element, MultiplicationBroadcast1ElementTest)
+ARMNN_AUTO_TEST_CASE(MultiplicationBroadcast1DVector, MultiplicationBroadcast1DVectorTest)
 
 // Batch Norm
 ARMNN_AUTO_TEST_CASE(BatchNorm, BatchNormTest)
diff --git a/src/armnn/backends/test/Conv2dTestImpl.hpp b/src/armnn/backends/test/Conv2dTestImpl.hpp
index 0c0511b234..0c34beaa33 100644
--- a/src/armnn/backends/test/Conv2dTestImpl.hpp
+++ b/src/armnn/backends/test/Conv2dTestImpl.hpp
@@ -60,8 +60,6 @@ void ApplyBias(std::vector<T>& v, float vScale, int32_t vOffset,
     }
 }
 
-
-
 template<typename T, typename B>
 LayerTestResult<T, 4> SimpleConvolution2dTestImpl(armnn::IWorkloadFactory& workloadFactory,
                                                   const boost::multi_array<T, 4>& input,
@@ -87,6 +85,8 @@ LayerTestResult<T, 4> SimpleConvolution2dTestImpl(armnn::IWorkloadFactory& workl
 
     unsigned int kernelHeight = boost::numeric_cast<unsigned int>(kernel.shape()[2]);
     unsigned int kernelWidth = boost::numeric_cast<unsigned int>(kernel.shape()[3]);
+    unsigned int kernelChannels = boost::numeric_cast<unsigned int>(kernel.shape()[1]);
+    unsigned int kernelDepthMul = boost::numeric_cast<unsigned int>(kernel.shape()[0]);
 
     bool biasEnabled = bias.size() > 0;
 
@@ -102,7 +102,7 @@ LayerTestResult<T, 4> SimpleConvolution2dTestImpl(armnn::IWorkloadFactory& workl
     armnn::TensorInfo inputTensorInfo({2*inputNum, inputChannels, inputHeight, inputWidth}, armnn::GetDataType<T>());
     armnn::TensorInfo outputTensorInfo({2*outputNum, outputChannels, outputHeight, outputWidth},
         armnn::GetDataType<T>());
-    armnn::TensorInfo kernelDesc({outputChannels, inputChannels, kernelHeight, kernelWidth}, armnn::GetDataType<T>());
+    armnn::TensorInfo kernelDesc({kernelDepthMul, kernelChannels, kernelHeight, kernelWidth}, armnn::GetDataType<T>());
     armnn::TensorInfo biasDesc({static_cast<unsigned int>(bias.size())}, armnn::GetDataType<B>());
 
     // Set quantization parameters if the requested type is a quantized type.
@@ -186,6 +186,120 @@ LayerTestResult<T, 4> SimpleConvolution2dTestImpl(armnn::IWorkloadFactory& workl
 
     CopyDataToITensorHandle(inputHandle.get(), &batchedInput[0][0][0][0]);
 
+    workloadFactory.Finalize();
+    workload->Execute();
+
+    CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
+
+    return ret;
+}
+
+template<typename T, typename B>
+LayerTestResult<T, 4> DepthwiseConvolution2dAsymmetricTestImpl(armnn::IWorkloadFactory& workloadFactory,
+                                                               const boost::multi_array<T, 4>& input,
+                                                               const boost::multi_array<T, 4>& kernel,
+                                                               const boost::multi_array<B, 1>& bias,
+                                                               const boost::multi_array<T, 4>& outputExpected,
+                                                               float qScale,
+                                                               int32_t qOffset,
+                                                               uint32_t padLeft = 0,
+                                                               uint32_t padTop = 0,
+                                                               uint32_t padRight = 0,
+                                                               uint32_t padBottom = 0,
+                                                               uint32_t strideX = 1,
+                                                               uint32_t strideY = 1)
+{
+    unsigned int inputNum       = boost::numeric_cast<unsigned int>(input.shape()[0]);
+    unsigned int inputChannels  = boost::numeric_cast<unsigned int>(input.shape()[1]);
+    unsigned int inputHeight    = boost::numeric_cast<unsigned int>(input.shape()[2]);
+    unsigned int inputWidth     = boost::numeric_cast<unsigned int>(input.shape()[3]);
+    unsigned int kernelChanMul  = boost::numeric_cast<unsigned int>(kernel.shape()[0]);
+    unsigned int kernelChannels = boost::numeric_cast<unsigned int>(kernel.shape()[1]);
+    unsigned int kernelHeight   = boost::numeric_cast<unsigned int>(kernel.shape()[2]);
+    unsigned int kernelWidth    = boost::numeric_cast<unsigned int>(kernel.shape()[3]);
+    unsigned int outputNum      = boost::numeric_cast<unsigned int>(outputExpected.shape()[0]);
+    unsigned int outputChannels = boost::numeric_cast<unsigned int>(outputExpected.shape()[1]);
+    unsigned int outputHeight   = boost::numeric_cast<unsigned int>(outputExpected.shape()[2]);
+    unsigned int outputWidth    = boost::numeric_cast<unsigned int>(outputExpected.shape()[3]);
+
+    // If a bias is used, its size must equal the number of output channels
+    bool biasEnabled = bias.size() > 0;
+    BOOST_ASSERT(!biasEnabled || bias.size() == outputChannels);
+
+    // create the tensors
+    armnn::TensorInfo inputTensorInfo({inputNum, inputChannels, inputHeight, inputWidth}, armnn::GetDataType<T>());
+    armnn::TensorInfo outputTensorInfo({outputNum, outputChannels, outputHeight, outputWidth},
+                                       armnn::GetDataType<T>());
+    armnn::TensorInfo kernelDesc({kernelChanMul, kernelChannels, kernelHeight, kernelWidth}, armnn::GetDataType<T>());
+    armnn::TensorInfo biasDesc({static_cast<unsigned int>(bias.size())}, armnn::GetDataType<B>());
+
+    // Set quantization parameters if the requested type is a quantized type.
+    if (armnn::IsQuantizedType<T>())
+    {
+        inputTensorInfo.SetQuantizationScale(qScale);
+        inputTensorInfo.SetQuantizationOffset(qOffset);
+        outputTensorInfo.SetQuantizationScale(qScale);
+        outputTensorInfo.SetQuantizationOffset(qOffset);
+        kernelDesc.SetQuantizationScale(qScale);
+        kernelDesc.SetQuantizationOffset(qOffset);
+        biasDesc.SetQuantizationScale(qScale*qScale);
+        biasDesc.SetQuantizationOffset(0);
+    }
+
+    // Construct the input data
+    std::vector<T> inputData;
+    inputData.assign(input.data(), input.data() + inputChannels*inputHeight*inputWidth);
+    auto batchedInput = MakeTensor<T, 4>(inputTensorInfo, inputData);
+
+    // Construct the output data, with bias applied, as appropriate
+    std::vector<T> outputData;
+    outputData.assign(outputExpected.data(), outputExpected.data() + outputChannels*outputHeight*outputWidth);
+    if (biasEnabled)
+    {
+        std::vector<T> biasV;
+        biasV.assign(bias.data(), bias.data() + outputChannels);
+        ApplyBias(outputData, outputTensorInfo.GetQuantizationScale(), outputTensorInfo.GetQuantizationOffset(),
+            biasV, biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset(),
+            outputWidth, outputHeight);
+    }
+
+    LayerTestResult<T, 4> ret(outputTensorInfo);
+    ret.outputExpected = MakeTensor<T, 4>(outputTensorInfo, outputData);
+
+    std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.CreateTensorHandle(inputTensorInfo);
+    std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputTensorInfo);
+
+    armnn::ScopedCpuTensorHandle weightsTensor(kernelDesc);
+    AllocateAndCopyDataToITensorHandle(&weightsTensor, &kernel[0][0][0][0]);
+
+    armnn::ScopedCpuTensorHandle biasTensor(biasDesc);
+    if (biasEnabled)
+    {
+        AllocateAndCopyDataToITensorHandle(&biasTensor, &bias[0]);
+    }
+
+    armnn::DepthwiseConvolution2dQueueDescriptor data;
+    data.m_Weight = &weightsTensor;
+    data.m_Bias = &biasTensor; // still set this whether or not bias is enabled - can be a source of bugs
+    data.m_Parameters.m_StrideX = strideX;
+    data.m_Parameters.m_StrideY = strideY;
+    data.m_Parameters.m_PadLeft = padLeft;
+    data.m_Parameters.m_PadRight = padRight;
+    data.m_Parameters.m_PadTop = padTop;
+    data.m_Parameters.m_PadBottom = padBottom;
+    data.m_Parameters.m_BiasEnabled = biasEnabled;
+
+    armnn::WorkloadInfo info;
+    AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
+    AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
+
+    std::unique_ptr<armnn::IWorkload> workload = workloadFactory.CreateDepthwiseConvolution2d(data, info);
+    inputHandle->Allocate();
+    outputHandle->Allocate();
+
+    CopyDataToITensorHandle(inputHandle.get(), &batchedInput[0][0][0][0]);
+
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -306,6 +420,7 @@ LayerTestResult<T, 4> DepthwiseConvolution2dDepthMul1TestImpl(armnn::IWorkloadFa
 
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -478,6 +593,7 @@ LayerTestResult<T, 4> DepthwiseConvolution2dTestImpl(armnn::IWorkloadFactory& wo
 
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -485,8 +601,6 @@ LayerTestResult<T, 4> DepthwiseConvolution2dTestImpl(armnn::IWorkloadFactory& wo
     return ret;
 }
 
-
-
 template<typename T>
 LayerTestResult<T,4> Convolution1dTestImpl(armnn::IWorkloadFactory& workloadFactory,
                                            float qScale,
@@ -595,6 +709,7 @@ LayerTestResult<T,4> Convolution1dTestImpl(armnn::IWorkloadFactory& workloadFact
 
     CopyDataToITensorHandle(inputHandle.get(), inputData.data());
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     // output
@@ -692,7 +807,9 @@ LayerTestResult<T,4> CompareConvolution2dTestImpl(armnn::IWorkloadFactory& workl
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
     CopyDataToITensorHandle(inputHandleRef.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
+    refWorkloadFactory.Finalize();
     workloadRef->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -792,7 +909,9 @@ LayerTestResult<T, 4> CompareDepthwiseConvolution2dTestImpl(armnn::IWorkloadFact
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
     CopyDataToITensorHandle(inputHandleRef.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
+    refWorkloadFactory.Finalize();
     workloadRef->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
diff --git a/src/armnn/backends/test/CreateWorkloadCl.cpp b/src/armnn/backends/test/CreateWorkloadCl.cpp
index 3f320d80e9..f83bb12bbe 100644
--- a/src/armnn/backends/test/CreateWorkloadCl.cpp
+++ b/src/armnn/backends/test/CreateWorkloadCl.cpp
@@ -23,7 +23,6 @@ BOOST_AUTO_TEST_CASE(CreateActivationWorkload)
 {
     Graph graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreateActivationWorkloadTest<ClActivationFloat32Workload>(factory, graph);
 
@@ -40,7 +39,6 @@ BOOST_AUTO_TEST_CASE(CreateAdditionWorkload)
 {
     Graph graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreateAdditionWorkloadTest<ClAdditionFloat32Workload>(factory, graph);
 
@@ -58,7 +56,6 @@ BOOST_AUTO_TEST_CASE(CreateBatchNormalizationWorkload)
 {
     Graph             graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreateBatchNormalizationWorkloadTest<ClBatchNormalizationFloat32Workload>(factory, graph);
 
@@ -136,7 +133,6 @@ BOOST_AUTO_TEST_CASE(CreateMultiplicationWorkload)
 {
     Graph             graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload =
         CreateMultiplicationWorkloadTest<ClMultiplicationFloat32Workload>(factory, graph);
@@ -155,7 +151,6 @@ BOOST_AUTO_TEST_CASE(CreateNormalizationWorkload)
 {
     Graph             graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreateNormalizationWorkloadTest<ClNormalizationFloat32Workload>(factory, graph);
 
@@ -172,7 +167,6 @@ BOOST_AUTO_TEST_CASE(CreatePooling2dWorkload)
 {
     Graph             graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreatePooling2dWorkloadTest<ClPooling2dFloat32Workload>(factory, graph);
 
@@ -190,7 +184,6 @@ static void ClCreateReshapeWorkloadTest()
 {
     Graph             graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreateReshapeWorkloadTest<ReshapeWorkloadType>(factory, graph);
 
@@ -217,7 +210,6 @@ BOOST_AUTO_TEST_CASE(CreateSoftmaxWorkload)
 {
     Graph             graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreateSoftmaxWorkloadTest<ClSoftmaxFloat32Workload>(factory, graph);
 
@@ -234,20 +226,24 @@ BOOST_AUTO_TEST_CASE(CreateSplitterWorkload)
 {
     Graph graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreateSplitterWorkloadTest<ClSplitterFloat32Workload>(factory, graph);
 
     // check that outputs are as we expect them (see definition of CreateSplitterWorkloadTest)
     SplitterQueueDescriptor queueDescriptor = workload->GetData();
     auto inputHandle = boost::polymorphic_downcast<IClTensorHandle*>(queueDescriptor.m_Inputs[0]);
-    BOOST_TEST(CompareIClTensorHandleShape(inputHandle, {7}));
-    auto outputHandle0 = boost::polymorphic_downcast<IClTensorHandle*>(queueDescriptor.m_Outputs[0]);
-    BOOST_TEST(CompareIClTensorHandleShape(outputHandle0, {4}));
+    BOOST_TEST(CompareIClTensorHandleShape(inputHandle, {5, 7, 7}));
+
     auto outputHandle1 = boost::polymorphic_downcast<IClTensorHandle*>(queueDescriptor.m_Outputs[1]);
-    BOOST_TEST(CompareIClTensorHandleShape(outputHandle1, {1}));
+    BOOST_TEST(CompareIClTensorHandleShape(outputHandle1, {2, 7, 7}));
+
     auto outputHandle2 = boost::polymorphic_downcast<IClTensorHandle*>(queueDescriptor.m_Outputs[2]);
-    BOOST_TEST(CompareIClTensorHandleShape(outputHandle2, {2}));
+    BOOST_TEST(CompareIClTensorHandleShape(outputHandle2, {2, 7, 7}));
+
+    auto outputHandle0 = boost::polymorphic_downcast<IClTensorHandle*>(queueDescriptor.m_Outputs[0]);
+    // NOTE: At the moment the CL collapses the tensor to a 2 dim when dimension zero = 1
+    //       we are raising this difference between the NEON and CL libs as an issue with the compute library team
+    BOOST_TEST(CompareIClTensorHandleShape(outputHandle0, {7, 7}));
 }
 
 BOOST_AUTO_TEST_CASE(CreateSplitterMerger)
@@ -260,7 +256,6 @@ BOOST_AUTO_TEST_CASE(CreateSplitterMerger)
 
     Graph graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workloads =
         CreateSplitterMergerWorkloadTest<ClSplitterFloat32Workload, ClMergerFloat32Workload>(factory, graph);
@@ -332,7 +327,6 @@ BOOST_AUTO_TEST_CASE(CreateSingleOutputMultipleInputs)
 BOOST_AUTO_TEST_CASE(CreateMemCopyWorkloadsCl)
 {
     ClWorkloadFactory    factory;
-    factory.LoadOpenClRuntime();
     CreateMemCopyWorkloads<CopyFromCpuToClWorkload,CopyFromClToCpuWorkload,IClTensorHandle>(factory);
 }
 
@@ -340,7 +334,6 @@ BOOST_AUTO_TEST_CASE(CreateL2NormalizationWorkload)
 {
     Graph             graph;
     ClWorkloadFactory factory;
-    factory.LoadOpenClRuntime();
 
     auto workload = CreateL2NormalizationWorkloadTest<ClL2NormalizationFloat32Workload>(factory, graph);
 
diff --git a/src/armnn/backends/test/CreateWorkloadNeon.cpp b/src/armnn/backends/test/CreateWorkloadNeon.cpp
index 807937ba2b..4d91fbfd31 100644
--- a/src/armnn/backends/test/CreateWorkloadNeon.cpp
+++ b/src/armnn/backends/test/CreateWorkloadNeon.cpp
@@ -214,13 +214,16 @@ BOOST_AUTO_TEST_CASE(CreateSplitterWorkload)
     // check that outputs are as we expect them (see definition of CreateSplitterWorkloadTest)
     SplitterQueueDescriptor queueDescriptor = workload->GetData();
     auto inputHandle = boost::polymorphic_downcast<INeonTensorHandle*>(queueDescriptor.m_Inputs[0]);
-    BOOST_TEST(TestNeonTensorHandleInfo(inputHandle, TensorInfo({1, 7}, DataType::Float32)));
+    BOOST_TEST(TestNeonTensorHandleInfo(inputHandle, TensorInfo({5, 7, 7}, DataType::Float32)));
+
     auto outputHandle0 = boost::polymorphic_downcast<INeonTensorHandle*>(queueDescriptor.m_Outputs[0]);
-    BOOST_TEST(TestNeonTensorHandleInfo(outputHandle0, TensorInfo({1, 4}, DataType::Float32)));
+    BOOST_TEST(TestNeonTensorHandleInfo(outputHandle0, TensorInfo({1, 7, 7}, DataType::Float32)));
+
     auto outputHandle1 = boost::polymorphic_downcast<INeonTensorHandle*>(queueDescriptor.m_Outputs[1]);
-    BOOST_TEST(TestNeonTensorHandleInfo(outputHandle1, TensorInfo({1, 1}, DataType::Float32)));
+    BOOST_TEST(TestNeonTensorHandleInfo(outputHandle1, TensorInfo({2, 7, 7}, DataType::Float32)));
+
     auto outputHandle2 = boost::polymorphic_downcast<INeonTensorHandle*>(queueDescriptor.m_Outputs[2]);
-    BOOST_TEST(TestNeonTensorHandleInfo(outputHandle2, TensorInfo({1, 2}, DataType::Float32)));
+    BOOST_TEST(TestNeonTensorHandleInfo(outputHandle2, TensorInfo({2, 7, 7}, DataType::Float32)));
 }
 
 BOOST_AUTO_TEST_CASE(CreateSplitterMerger)
diff --git a/src/armnn/backends/test/CreateWorkloadRef.cpp b/src/armnn/backends/test/CreateWorkloadRef.cpp
index e0eacebe1a..abc46e4361 100644
--- a/src/armnn/backends/test/CreateWorkloadRef.cpp
+++ b/src/armnn/backends/test/CreateWorkloadRef.cpp
@@ -241,13 +241,16 @@ static void RefCreateSplitterWorkloadTest()
     // check that outputs are as we expect them (see definition of CreateSplitterWorkloadTest)
     SplitterQueueDescriptor queueDescriptor = workload->GetData();
     auto inputHandle = boost::polymorphic_downcast<ConstCpuTensorHandle*>(queueDescriptor.m_Inputs[0]);
-    BOOST_TEST((inputHandle->GetTensorInfo() == TensorInfo({ 1, 7 }, SplitterWorkloadType::ms_DataType)));
+    BOOST_TEST((inputHandle->GetTensorInfo() == TensorInfo({ 5, 7, 7 }, SplitterWorkloadType::ms_DataType)));
+
     auto outputHandle0 = boost::polymorphic_downcast<CpuTensorHandle*>(queueDescriptor.m_Outputs[0]);
-    BOOST_TEST((outputHandle0->GetTensorInfo() == TensorInfo({ 1, 4 }, SplitterWorkloadType::ms_DataType)));
+    BOOST_TEST((outputHandle0->GetTensorInfo() == TensorInfo({ 1, 7, 7 }, SplitterWorkloadType::ms_DataType)));
+
     auto outputHandle1 = boost::polymorphic_downcast<CpuTensorHandle*>(queueDescriptor.m_Outputs[1]);
-    BOOST_TEST((outputHandle1->GetTensorInfo() == TensorInfo({ 1, 1 }, SplitterWorkloadType::ms_DataType)));
+    BOOST_TEST((outputHandle1->GetTensorInfo() == TensorInfo({ 2, 7, 7 }, SplitterWorkloadType::ms_DataType)));
+
     auto outputHandle2 = boost::polymorphic_downcast<CpuTensorHandle*>(queueDescriptor.m_Outputs[2]);
-    BOOST_TEST((outputHandle2->GetTensorInfo() == TensorInfo({ 1, 2 }, SplitterWorkloadType::ms_DataType)));
+    BOOST_TEST((outputHandle2->GetTensorInfo() == TensorInfo({ 2, 7, 7 }, SplitterWorkloadType::ms_DataType)));
 }
 
 BOOST_AUTO_TEST_CASE(CreateSplitterFloat32Workload)
diff --git a/src/armnn/backends/test/FullyConnectedTestImpl.hpp b/src/armnn/backends/test/FullyConnectedTestImpl.hpp
index 479da3fabc..d2379ec10e 100644
--- a/src/armnn/backends/test/FullyConnectedTestImpl.hpp
+++ b/src/armnn/backends/test/FullyConnectedTestImpl.hpp
@@ -10,9 +10,9 @@ LayerTestResult<T, 2> SimpleFullyConnectedTestImpl(
     armnn::TensorInfo outputTensorInfo,
     armnn::TensorInfo weightsDesc,
     armnn::TensorInfo biasesDesc,
-    boost::multi_array<T, 2> weights,
-    boost::multi_array<B, 1> bias,
-    boost::multi_array<T, 4> input,
+    boost::multi_array<T, 2>& weights,
+    boost::multi_array<B, 1>& bias,
+    boost::multi_array<T, 4>& input,
     bool biasEnabled,
     bool transposeWeights)
 {
@@ -41,6 +41,7 @@ LayerTestResult<T, 2> SimpleFullyConnectedTestImpl(
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0], outputHandle.get());
diff --git a/src/armnn/backends/test/IsLayerSupportedTest.cpp b/src/armnn/backends/test/IsLayerSupportedTest.cpp
index 4b4c9f6099..af7ba923ec 100644
--- a/src/armnn/backends/test/IsLayerSupportedTest.cpp
+++ b/src/armnn/backends/test/IsLayerSupportedTest.cpp
@@ -9,7 +9,6 @@
 
 #include "backends/CpuTensorHandle.hpp"
 #include "backends/RefWorkloadFactory.hpp"
-#include <Layers.hpp>
 
 #include <string>
 #include <iostream>
@@ -67,4 +66,4 @@ BOOST_AUTO_TEST_CASE(IsLayerSupportedUint8Cl)
 }
 #endif //#ifdef ARMCOMPUTECL_ENABLED
 
-BOOST_AUTO_TEST_SUITE_END()
\ No newline at end of file
+BOOST_AUTO_TEST_SUITE_END()
diff --git a/src/armnn/backends/test/LayerTests.cpp b/src/armnn/backends/test/LayerTests.cpp
index 9eed2dbf78..a10e4bd7a0 100644
--- a/src/armnn/backends/test/LayerTests.cpp
+++ b/src/armnn/backends/test/LayerTests.cpp
@@ -6,8 +6,10 @@
 
 #include "test/TensorHelpers.hpp"
 #include "TensorCopyUtils.hpp"
+#include "Permute.hpp"
 
 #include <boost/test/unit_test.hpp>
+#include <boost/assert.hpp>
 
 #include "armnn/LayerSupport.hpp"
 
@@ -342,11 +344,11 @@ LayerTestResult<T, 4> SimpleConvolution2dAsymmetricPaddingTestCommon(armnn::IWor
     std::vector<T> myVec(outputDesc.GetNumElements(), 0);
     boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputDesc, std::vector<T>(
         QuantizedVector<T>(qScale, qOffset, {
-            -4723,  -7044,  -9324,  -6253, -3542,
             -7140, -10580, -13940,  -9300, -5230,
             -9590, -14120, -18520, -12290, -6860,
             -9980, -14560, -18960, -12560, -7000,
             -7518, -10904, -14144,  -9318, -5152,
+            -5032,  -7256,  -9376,  -6142, -3368,
         })));
 
     return SimpleConvolution2dTestImpl<T>(workloadFactory,
@@ -357,9 +359,79 @@ LayerTestResult<T, 4> SimpleConvolution2dAsymmetricPaddingTestCommon(armnn::IWor
         qScale,
         qOffset,
         1,  // padding left
-        2,  // padding top
+        1,  // padding top
         2,  // padding right
-        1); // padding bottom
+        2); // padding bottom
+}
+
+template<typename T>
+LayerTestResult<T, 4> DepthwiseConvolution2dAsymmetricTestCommon(armnn::IWorkloadFactory& workloadFactory,
+                                                                 float qScale,
+                                                                 int32_t qOffset,
+                                                                 bool biasEnabled)
+{
+    // Use a single-batch 2-channel 5x5 image as input
+    armnn::TensorInfo inputTensorInfo({ 1, 2, 5, 5 }, armnn::GetDataType<T>());
+    auto input = MakeTensor<T, 4>(inputTensorInfo, std::vector<T>(
+        QuantizedVector<T>(inputTensorInfo.GetQuantizationScale(), inputTensorInfo.GetQuantizationOffset(), {
+             0,  1,  2,  3,  4,
+             5,  6,  7,  8,  9,
+            10, 11, 12, 13, 14,
+            15, 16, 17, 18, 19,
+            20, 21, 22, 23, 24,
+
+            25, 26, 27, 28, 29,
+            30, 31, 32, 33, 34,
+            35, 36, 37, 38, 39,
+            40, 41, 42, 43, 44,
+            45, 46, 47, 48, 49
+        })));
+
+    // Use a depth multiplier of 1 on a 2-channel 4x4 kernel
+    armnn::TensorInfo kernelTensorInfo({ 1, 2, 4, 4 }, armnn::GetDataType<T>());
+    auto kernel = MakeTensor<T, 4>(kernelTensorInfo, std::vector<T>(
+        QuantizedVector<T>(kernelTensorInfo.GetQuantizationScale(), kernelTensorInfo.GetQuantizationOffset(), {
+            32, 31, 30, 29,
+            28, 27, 26, 25,
+            24, 23, 22, 21,
+            20, 19, 18, 17,
+
+            16, 15, 14, 13,
+            12, 11, 10,  9,
+             8,  7,  6,  5,
+             4,  3,  2,  1
+        })));
+
+    // Expected output is 1 batch of a 2-channel 5x5 image
+    // calculated using the python tensorflow library with strideX=1, strideY=1
+    armnn::TensorInfo outputTensorInfo({ 1, 2, 5, 5 }, armnn::GetDataType<T>());
+    boost::multi_array<T, 4> expectedOutput = MakeTensor<T, 4>(outputTensorInfo, std::vector<T>(
+        QuantizedVector<T>(outputTensorInfo.GetQuantizationScale(), outputTensorInfo.GetQuantizationOffset(), {
+            1062, 1580, 1850, 1530, 1117,
+            2140, 3108, 3500, 2842, 2042,
+            3580, 5068, 5460, 4342, 3062,
+            3618, 5072, 5390, 4248, 2971,
+            3074, 4282, 4510, 3533, 2457,
+            1550, 2284, 2362, 1955, 1428,
+            2910, 4206, 4342, 3528, 2536,
+            3390, 4886, 5022, 4068, 2916,
+            3566, 5056, 5182, 4133, 2922,
+            3100, 4352, 4452, 3517, 2465
+        })));
+
+    return DepthwiseConvolution2dAsymmetricTestImpl<T>(workloadFactory,
+        input,
+        kernel,
+        GetBias2<typename FullyConnectedBiasTypeForInputType<T>::Type>(biasEnabled, qScale, qOffset),
+        expectedOutput,
+        qScale,
+        qOffset,
+        1,  // padding left
+        1,  // padding top
+        2,  // padding right
+        2,  // padding bottom
+        1,  // strideX
+        1); // strideY
 }
 
 LayerTestResult<float, 4>
@@ -385,6 +457,12 @@ LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul1Test(armnn::IWorkloadFa
     return DepthwiseConvolution2dDepthMul1TestImpl<float, float>(workloadFactory, 0.0f, 0, biasEnabled);
 }
 
+LayerTestResult<float, 4> DepthwiseConvolution2dAsymmetricTest(armnn::IWorkloadFactory& workloadFactory,
+                                                               bool                     biasEnabled)
+{
+    return DepthwiseConvolution2dAsymmetricTestCommon<float>(workloadFactory, 0.0f, 0, biasEnabled);
+}
+
 LayerTestResult<uint8_t, 4> DepthwiseConvolution2dUint8Test(armnn::IWorkloadFactory& workloadFactory,
                                                             bool                     biasEnabled)
 {
@@ -493,138 +571,85 @@ LayerTestResult<uint8_t, 3> CopyViaSplitterUint8Test(armnn::IWorkloadFactory& wo
 
 LayerTestResult<float,3> MergerTest(armnn::IWorkloadFactory& workloadFactory)
 {
-    unsigned int outputWidth = 5;
+    unsigned int outputWidth = 3;
     unsigned int outputHeight = 6;
     unsigned int outputChannels = 3;
 
-    unsigned int inputWidth1 = 2;
-    unsigned int inputHeight1 = 2;
-    unsigned int inputChannels1 = 3;
-
-    unsigned int inputWidth2 = 2;
-    unsigned int inputHeight2 = 4;
-    unsigned int inputChannels2 = 3;
-
-    unsigned int inputWidth3 = 3;
-    unsigned int inputHeight3 = 6;
-    unsigned int inputChannels3 = 2;
+    unsigned int inputWidth1 = 3;
+    unsigned int inputHeight1 = 6;
+    unsigned int inputChannels1 = 2;
 
-    unsigned int inputWidth4 = 3;
-    unsigned int inputHeight4 = 6;
-    unsigned int inputChannels4 = 1;
+    unsigned int inputWidth2 = 3;
+    unsigned int inputHeight2 = 6;
+    unsigned int inputChannels2 = 1;
 
     // Define the tensor descriptors
     armnn::TensorInfo outputTensorInfo({ outputChannels, outputHeight, outputWidth }, armnn::DataType::Float32);
     armnn::TensorInfo inputTensorInfo1({ inputChannels1, inputHeight1, inputWidth1 }, armnn::DataType::Float32);
     armnn::TensorInfo inputTensorInfo2({ inputChannels2, inputHeight2, inputWidth2 }, armnn::DataType::Float32);
-    armnn::TensorInfo inputTensorInfo3({ inputChannels3, inputHeight3, inputWidth3 }, armnn::DataType::Float32);
-    armnn::TensorInfo inputTensorInfo4({ inputChannels4, inputHeight4, inputWidth4 }, armnn::DataType::Float32);
 
     LayerTestResult<float,3> ret(outputTensorInfo);
 
-
     ret.outputExpected = MakeTensor<float, 3>(outputTensorInfo, std::vector<float>(
-        {
-            1.0f, 2.0f, 3.0f, 4.0f, 5.0f,
-            6.0f, 7.0f, 8.0f, 9.0f, 10.0f,
-            11.0f, 12.0f, 13.0f, 14.0f, 15.0f,
-            16.0f, 17.0f, 18.0f, 19.0f, 20.0f,
-            21.0f, 22.0f, 23.0f, 24.0f, 25.0f,
-            26.0f, 27.0f, 28.0f, 29.0f, 30.0f,
-
-            31.0f, 32.0f, 33.0f, 34.0f, 35.0f,
-            36.0f, 37.0f, 38.0f, 39.0f, 40.0f,
-            41.0f, 42.0f, 43.0f, 44.0f, 45.0f,
-            46.0f, 47.0f, 48.0f, 49.0f, 50.0f,
-            51.0f, 52.0f, 53.0f, 54.0f, 55.0f,
-            56.0f, 57.0f, 58.0f, 59.0f, 60.0f,
-
-            61.0f, 62.0f, 63.0f, 64.0f, 65.0f,
-            66.0f, 67.0f, 68.0f, 69.0f, 70.0f,
-            71.0f, 72.0f, 73.0f, 74.0f, 75.0f,
-            76.0f, 77.0f, 78.0f, 79.0f, 80.0f,
-            81.0f, 82.0f, 83.0f, 84.0f, 85.0f,
-            86.0f, 87.0f, 88.0f, 89.0f, 90.0f,
+    {
+            1.0f, 2.0f, 3.0f,
+            4.0f, 5.0f, 6.0f,
+            7.0f, 8.0f, 9.0f,
+            10.0f, 11.0f, 12.0f,
+            13.0f, 14.0f, 15.0f,
+            16.0f, 17.0f, 18.0f,
+
+            19.0f, 20.0f, 21.0f,
+            22.0f, 23.0f, 24.0f,
+            25.0f, 26.0f, 27.0f,
+            28.0f, 29.0f, 30.0f,
+            31.0f, 32.0f, 33.0f,
+            34.0f, 35.0f, 36.0f,
 
+            37.0f, 38.0f, 39.0f,
+            40.0f, 41.0f, 42.0f,
+            43.0f, 44.0f, 45.0f,
+            46.0f, 47.0f, 48.0f,
+            49.0f, 50.0f, 51.0f,
+            52.0f, 53.0f, 54.0f,
         })
     );
 
-
     auto input1 = MakeTensor<float, 3>(inputTensorInfo1, std::vector<float>(
         {
-            1.0f, 2.0f,
-            6.0f, 7.0f,
-
-            31.0f, 32.0f,
-            36.0f, 37.0f,
+            1.0f, 2.0f, 3.0f,
+            4.0f, 5.0f, 6.0f,
+            7.0f, 8.0f, 9.0f,
+            10.0f, 11.0f, 12.0f,
+            13.0f, 14.0f, 15.0f,
+            16.0f, 17.0f, 18.0f,
 
-            61.0f, 62.0f,
-            66.0f, 67.0f,
+            19.0f, 20.0f, 21.0f,
+            22.0f, 23.0f, 24.0f,
+            25.0f, 26.0f, 27.0f,
+            28.0f, 29.0f, 30.0f,
+            31.0f, 32.0f, 33.0f,
+            34.0f, 35.0f, 36.0f,
         })
     );
 
     auto input2 = MakeTensor<float, 3>(inputTensorInfo2, std::vector<float>(
         {
-            11.0f, 12.0f,
-            16.0f, 17.0f,
-            21.0f, 22.0f,
-            26.0f, 27.0f,
-
-            41.0f, 42.0f,
-            46.0f, 47.0f,
-            51.0f, 52.0f,
-            56.0f, 57.0f,
-
-            71.0f, 72.0f,
-            76.0f, 77.0f,
-            81.0f, 82.0f,
-            86.0f, 87.0f,
-        })
-    );
-
-    auto input3 = MakeTensor<float, 3>(inputTensorInfo3, std::vector<float>(
-        {
-            3.0f, 4.0f, 5.0f,
-            8.0f, 9.0f, 10.0f,
-            13.0f, 14.0f, 15.0f,
-            18.0f, 19.0f, 20.0f,
-            23.0f, 24.0f, 25.0f,
-            28.0f, 29.0f, 30.0f,
-
-            33.0f, 34.0f, 35.0f,
-            38.0f, 39.0f, 40.0f,
+            37.0f, 38.0f, 39.0f,
+            40.0f, 41.0f, 42.0f,
             43.0f, 44.0f, 45.0f,
-            48.0f, 49.0f, 50.0f,
-            53.0f, 54.0f, 55.0f,
-            58.0f, 59.0f, 60.0f,
-        })
-    );
-
-
-    auto input4 = MakeTensor<float, 3>(inputTensorInfo4, std::vector<float>(
-        {
-            63.0f, 64.0f, 65.0f,
-            68.0f, 69.0f, 70.0f,
-            73.0f, 74.0f, 75.0f,
-            78.0f, 79.0f, 80.0f,
-            83.0f, 84.0f, 85.0f,
-            88.0f, 89.0f, 90.0f,
+            46.0f, 47.0f, 48.0f,
+            49.0f, 50.0f, 51.0f,
+            52.0f, 53.0f, 54.0f,
         })
     );
 
     std::vector<unsigned int> wOrigin1 = {0, 0, 0}; //extent of the window is defined by size of input[0]
     armnn::MergerQueueDescriptor::ViewOrigin window1(wOrigin1);
 
-    std::vector<unsigned int> wOrigin2 = {0, 2, 0}; //extent of the window is defined by size of input[1]
+    std::vector<unsigned int> wOrigin2 = {2, 0, 0}; //extent of the window is defined by size of input[1]
     armnn::MergerQueueDescriptor::ViewOrigin window2(wOrigin2);
 
-    std::vector<unsigned int> wOrigin3 = {0, 0, 2}; //extent of the window is defined by size of input[2]
-    armnn::MergerQueueDescriptor::ViewOrigin window3(wOrigin3);
-
-    std::vector<unsigned int> wOrigin4 = {2, 0, 2}; //extent of the window is defined by size of input[3]
-    armnn::MergerQueueDescriptor::ViewOrigin window4(wOrigin4);
-
-
     std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputTensorInfo);
 
     bool subTensorsSupported = workloadFactory.SupportsSubTensors();
@@ -639,43 +664,25 @@ LayerTestResult<float,3> MergerTest(armnn::IWorkloadFactory& workloadFactory)
             workloadFactory.CreateSubTensorHandle(*outputHandle, inputTensorInfo2.GetShape(), wOrigin2.data()) :
             workloadFactory.CreateTensorHandle(inputTensorInfo2);
 
-    std::unique_ptr<armnn::ITensorHandle> inputHandle3  =
-        subTensorsSupported ?
-            workloadFactory.CreateSubTensorHandle(*outputHandle, inputTensorInfo3.GetShape(), wOrigin3.data()) :
-            workloadFactory.CreateTensorHandle(inputTensorInfo3);
-
-    std::unique_ptr<armnn::ITensorHandle> inputHandle4  =
-        subTensorsSupported ?
-            workloadFactory.CreateSubTensorHandle(*outputHandle, inputTensorInfo4.GetShape(), wOrigin4.data()) :
-            workloadFactory.CreateTensorHandle(inputTensorInfo4);
-
-
     armnn::MergerQueueDescriptor data;
     armnn::WorkloadInfo info;
     AddInputToWorkload(data, info, inputTensorInfo1, inputHandle1.get());
     AddInputToWorkload(data, info, inputTensorInfo2, inputHandle2.get());
-    AddInputToWorkload(data, info, inputTensorInfo3, inputHandle3.get());
-    AddInputToWorkload(data, info, inputTensorInfo4, inputHandle4.get());
     AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
 
     data.m_ViewOrigins.push_back(window1);
     data.m_ViewOrigins.push_back(window2);
-    data.m_ViewOrigins.push_back(window3);
-    data.m_ViewOrigins.push_back(window4);
 
     std::unique_ptr<armnn::IWorkload> workload = workloadFactory.CreateMerger(data, info);
 
     inputHandle1->Allocate();
     inputHandle2->Allocate();
-    inputHandle3->Allocate();
-    inputHandle4->Allocate();
     outputHandle->Allocate();
 
     CopyDataToITensorHandle(inputHandle1.get(), &input1[0][0][0]);
     CopyDataToITensorHandle(inputHandle2.get(), &input2[0][0][0]);
-    CopyDataToITensorHandle(inputHandle3.get(), &input3[0][0][0]);
-    CopyDataToITensorHandle(inputHandle4.get(), &input4[0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0], outputHandle.get());
@@ -765,6 +772,7 @@ LayerTestResult<float,4> AdditionTest(armnn::IWorkloadFactory& workloadFactory)
     CopyDataToITensorHandle(inputHandle1.get(), &input1[0][0][0][0]);
     CopyDataToITensorHandle(inputHandle2.get(), &input2[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -841,6 +849,7 @@ LayerTestResult<T, 4> AdditionBroadcastTestImpl(armnn::IWorkloadFactory& workloa
     CopyDataToITensorHandle(inputHandle1.get(), &input1[0][0][0][0]);
     CopyDataToITensorHandle(inputHandle2.get(), &input2[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -912,6 +921,7 @@ LayerTestResult<T, 4> AdditionBroadcast1ElementTestImpl(armnn::IWorkloadFactory&
     CopyDataToITensorHandle(inputHandle1.get(), &input1[0][0][0][0]);
     CopyDataToITensorHandle(inputHandle2.get(), &input2[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -996,7 +1006,9 @@ LayerTestResult<float,4> CompareAdditionTest(armnn::IWorkloadFactory& workloadFa
     CopyDataToITensorHandle(inputHandle1Ref.get(), &input1[0][0][0][0]);
     CopyDataToITensorHandle(inputHandle2Ref.get(), &input2[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
+    refWorkloadFactory.Finalize();
     workloadRef->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -1043,6 +1055,7 @@ LayerTestResult<float,4> MultiplicationTestHelper(armnn::IWorkloadFactory& workl
     CopyDataToITensorHandle(inputHandle0.get(), &input0[0][0][0][0]);
     CopyDataToITensorHandle(inputHandle1.get(), &input1[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -1185,7 +1198,9 @@ LayerTestResult<float,4> CompareMultiplicationTest(armnn::IWorkloadFactory& work
     CopyDataToITensorHandle(inputHandle0Ref.get(), &input0[0][0][0][0]);
     CopyDataToITensorHandle(inputHandle1Ref.get(), &input1[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
+    refWorkloadFactory.Finalize();
     workloadRef->Execute();
 
     CopyDataFromITensorHandle(&comparisonResult.output[0][0][0][0], outputHandle.get());
@@ -1264,7 +1279,9 @@ LayerTestResult<float,4> CompareBatchNormTest(armnn::IWorkloadFactory& workloadF
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
     CopyDataToITensorHandle(inputHandleRef.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
+    refWorkloadFactory.Finalize();
     workloadRef->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -1273,23 +1290,299 @@ LayerTestResult<float,4> CompareBatchNormTest(armnn::IWorkloadFactory& workloadF
     return ret;
 }
 
-void Concatenate(armnn::IWorkloadFactory& workloadFactory,
-    std::initializer_list<const armnn::TensorInfo> inputTensorInfos,
-    std::initializer_list<void*> inputs,
-    const armnn::TensorInfo& outputTensorInfo,
-    void* output,
-    unsigned int concatDim)
-{
-    armnn::MergerQueueDescriptor queueDescriptor;
+template<typename T>
+void PermuteTensorData(
+        armnn::IWorkloadFactory& workloadFactory,
+        const armnn::PermutationVector& mappings,
+        armnn::TensorInfo & inputTensorInfo,
+        const T * inputData,
+        std::vector<T>& outputData)
+{
+    BOOST_ASSERT_MSG(inputData != nullptr, "inputData must not be null");
+    if (inputData == nullptr)
+    {
+        // Nullptr is an error in the test. By returning without doing the concatenation
+        // I expect the caller to fail the test. It still makes sense to report this as
+        // an assert for Debug builds.
+        return;
+    }
+
+    armnn::TensorInfo outputTensorInfo = armnnUtils::Permuted(inputTensorInfo, mappings);
+
+    std::unique_ptr<armnn::ITensorHandle> inputHandle = workloadFactory.CreateTensorHandle(inputTensorInfo);
+    std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputTensorInfo);
+
+    armnn::PermuteQueueDescriptor queueDescriptor;
+    queueDescriptor.m_Parameters = armnn::PermuteDescriptor{mappings};
+    armnn::WorkloadInfo workloadInfo;
+    AddInputToWorkload(queueDescriptor, workloadInfo, inputTensorInfo, inputHandle.get());
+    AddOutputToWorkload(queueDescriptor, workloadInfo, outputTensorInfo, outputHandle.get());
+
+    std::unique_ptr<armnn::IWorkload> workload = workloadFactory.CreatePermute(queueDescriptor, workloadInfo);
+
+    inputHandle->Allocate();
+    outputHandle->Allocate();
+
+    CopyDataToITensorHandle(inputHandle.get(), inputData);
+
+    workload->Execute();
+
+    outputData.resize(outputTensorInfo.GetNumElements());
+    CopyDataFromITensorHandle(&outputData[0], outputHandle.get());
+    inputTensorInfo = outputTensorInfo;
+}
 
+armnn::OriginsDescriptor CreateMergerDescriptorForConcatenation(
+        const std::vector<armnn::TensorInfo> & inputTensorInfos,
+        unsigned int concatDim)
+{
     std::vector<armnn::TensorShape> shapes;
     shapes.reserve(inputTensorInfos.size());
     for (const armnn::TensorInfo& it: inputTensorInfos)
     {
         shapes.push_back(it.GetShape());
     }
-    armnn::OriginsDescriptor viewsDescriptor = armnn::CreateMergerDescriptorForConcatenation(shapes.begin(),
-        shapes.end(), concatDim);
+
+    return armnn::CreateMergerDescriptorForConcatenation(shapes.begin(),
+                                                         shapes.end(),
+                                                         concatDim);
+}
+
+//
+// Concatenation is only supported for N and C dimensions for NCHW. In case of
+// <4 dimensions we need to make sure that the concat dimensions is at least
+// the 3rd slowest iterating one.
+//
+
+bool NeedPermuteForConcat(
+        const std::vector<armnn::TensorInfo> & inputTensorInfos,
+        unsigned int concatDim)
+{
+    // See note above. Additionally we expect the input shapes to have the
+    // same number of dimensions.
+    unsigned int nDimensions = 0;
+
+    // determine the number of dimensions as well as sanity check them
+    // agains test implementation issues
+    for (auto && tensorInfo : inputTensorInfos)
+    {
+        if (!nDimensions)
+        {
+            nDimensions = tensorInfo.GetShape().GetNumDimensions();
+        }
+        else
+        {
+            BOOST_ASSERT_MSG(nDimensions == tensorInfo.GetShape().GetNumDimensions(),
+                "Input shapes must have the same number of dimensions");
+        }
+    }
+
+    return (nDimensions-concatDim) < 3;
+}
+
+armnn::TensorShape ExpandTensorShapeTo3dForPermute(const armnn::TensorShape & inputShape)
+{
+    unsigned int numDims = inputShape.GetNumDimensions();
+    if (numDims >= 3)
+    {
+        // Nothing to do if the inputShape has at least 3 dimensions.
+        return inputShape;
+    }
+
+    std::vector<unsigned int> newDims(size_t(3), 1u);
+    unsigned int expandedBy = 3 - numDims;
+    for (unsigned int i=0; i<numDims; ++i)
+    {
+        newDims[expandedBy+i] = inputShape[i];
+    }
+    return armnn::TensorShape(3u, &newDims[0]);
+}
+
+void Generate3dPermuteVectorForConcat(
+        unsigned int numDimensions,
+        unsigned int & concatDim,
+        std::pair<armnn::PermutationVector, armnn::PermutationVector> & permutations)
+{
+    BOOST_ASSERT_MSG(numDimensions <= 3,
+       "Only dimensions 1,2 and 3 are supported by this helper");
+
+    unsigned int expandedBy = 3 - numDimensions;
+    unsigned int expandedConcatAxis = concatDim + expandedBy;
+
+    if (expandedConcatAxis == 2)
+    {
+        concatDim = 0;
+        armnn::PermutationVector forwardPermutation({1, 2, 0});
+        armnn::PermutationVector reversePermutation({2, 0, 1});
+        permutations = std::make_pair(forwardPermutation, reversePermutation);
+    }
+    else if (expandedConcatAxis == 1)
+    {
+        concatDim = 0;
+        armnn::PermutationVector forwardPermutation({2, 0, 1});
+        armnn::PermutationVector reversePermutation({1, 2, 0});
+        permutations = std::make_pair(forwardPermutation, reversePermutation);
+    }
+    else
+    {
+        BOOST_ASSERT(expandedConcatAxis == 0);
+        concatDim = 0;
+    }
+}
+
+//
+// Permute the input tensors so we can do a supported concatenation.
+// Also treat lower than 3d tensors as 3d by adding dummy 1 dimensions
+// at the front. Finally this function tells what the output shape
+// of the permuted concatenated tensor is going to be.
+//
+template <typename T>
+void PermuteInputsForConcat(
+        armnn::IWorkloadFactory& workloadFactory,
+        std::vector<armnn::TensorInfo> & inputTensorInfos,
+        std::vector<T *> & inputData,
+        std::vector<std::vector<T>> & inputDataStorage,
+        armnn::PermutationVector & permuteVector,
+        unsigned int & concatDim,
+        armnn::TensorInfo & outputTensorInfo)
+{
+    BOOST_ASSERT_MSG(inputTensorInfos.size() > 1,
+        "Expecting more than one tensor to be concatenated here");
+
+    unsigned int numDims = 0;
+    unsigned int nthInput = 0;
+    const armnn::PermutationVector identity({0, 1, 2});
+
+    std::pair<armnn::PermutationVector, armnn::PermutationVector> permutations =
+        std::make_pair(identity, identity);
+
+    inputDataStorage.resize(inputData.size());
+
+    for (auto && tensorInfo : inputTensorInfos)
+    {
+        if (numDims == 0)
+        {
+            numDims = tensorInfo.GetShape().GetNumDimensions();
+            Generate3dPermuteVectorForConcat(numDims, concatDim, permutations);
+            // store the reverese permutation
+            permuteVector = permutations.second;
+            BOOST_ASSERT_MSG(!permuteVector.IsEqual(identity),
+                "Test logic error, we don't need permutation, so we shouldn't arrive here");
+        }
+        else
+        {
+            BOOST_ASSERT_MSG(numDims == tensorInfo.GetShape().GetNumDimensions(),
+                "All inputs must have the same number of dimensions");
+        }
+
+        armnn::TensorInfo newTensorInfo = tensorInfo;
+        newTensorInfo.SetShape(ExpandTensorShapeTo3dForPermute(tensorInfo.GetShape()));
+
+        PermuteTensorData<T>(workloadFactory,
+                             permutations.first,
+                             newTensorInfo,
+                             inputData[nthInput],
+                             inputDataStorage[nthInput]);
+
+        inputData[nthInput] = inputDataStorage[nthInput].data();
+        inputTensorInfos[nthInput] = newTensorInfo;
+
+        ++nthInput;
+    }
+
+    outputTensorInfo.SetShape(
+        armnnUtils::Permuted(
+            ExpandTensorShapeTo3dForPermute(outputTensorInfo.GetShape()),
+            permutations.first));
+}
+
+
+//
+// This is the pair of PermuteInputsForConcat(...) which permutes back
+// the output of the concatenation so we can check against an expected
+// output.
+//
+template <typename T>
+void PermuteOutputForConcat(
+        armnn::IWorkloadFactory& workloadFactory,
+        const armnn::TensorInfo & tensorInfo,
+        const armnn::PermutationVector & permuteVector,
+        std::unique_ptr<armnn::ITensorHandle> && inputDataHandle,
+        T * data)
+{
+    BOOST_ASSERT_MSG(data != nullptr, "data must not be null");
+    if (data == nullptr)
+    {
+        // Nullptr is an error in the test. By returning without doing the permutation
+        // I expect the caller to fail the test. It still makes sense to report this as
+        // an assert for Debug builds.
+        return;
+    }
+
+    armnn::TensorInfo resultTensorInfo = tensorInfo;
+    std::vector<T> inputData(tensorInfo.GetNumElements());
+    std::vector<T> outputData;
+
+    CopyDataFromITensorHandle(&inputData[0], inputDataHandle.get());
+
+    PermuteTensorData<T>(workloadFactory,
+                         permuteVector,
+                         resultTensorInfo,
+                         &inputData[0],
+                         outputData);
+
+    ::memcpy(data, &outputData[0], sizeof(T)*outputData.size());
+}
+
+template <typename T>
+void Concatenate(armnn::IWorkloadFactory& workloadFactory,
+                 std::initializer_list<const armnn::TensorInfo> inputTensorInfosOrig,
+                 std::initializer_list<T *> inputsOrig,
+                 const armnn::TensorInfo& outputTensorInfoOrig,
+                 T * output,
+                 unsigned int concatDim)
+{
+    BOOST_ASSERT_MSG(output != nullptr, "output must not be null");
+    if (output == nullptr)
+    {
+        // Nullptr is an error in the test. By returning without doing the permutation
+        // I expect the caller to fail the test. It still makes sense to report this as
+        // an assert for Debug builds.
+        return;
+    }
+
+    armnn::MergerQueueDescriptor queueDescriptor;
+
+    // save a copy of the parameters which we might need to change
+    std::vector<armnn::TensorInfo> inputTensorInfos(inputTensorInfosOrig.begin(), inputTensorInfosOrig.end());
+    std::vector<T *> inputs            = inputsOrig;
+    armnn::TensorInfo outputTensorInfo = outputTensorInfoOrig;
+
+    armnn::PermutationVector permuteVector{0, 1, 2};
+
+    // hold and automatically release memory for the reshaped input data
+    std::vector<std::vector<T>> tmpInputDataStorage;
+
+    const size_t inputCount = inputTensorInfos.size();
+
+    bool needPermuteForConcat = NeedPermuteForConcat(inputTensorInfos, concatDim);
+
+    if (needPermuteForConcat)
+    {
+        //
+        // We need to permute the inputs, because concatenation along
+        // the requested axis is not supported
+        //
+        PermuteInputsForConcat<T>(workloadFactory,
+                                  inputTensorInfos,
+                                  inputs,
+                                  tmpInputDataStorage,
+                                  permuteVector,
+                                  concatDim,
+                                  outputTensorInfo);
+    }
+
+    armnn::OriginsDescriptor viewsDescriptor = CreateMergerDescriptorForConcatenation(inputTensorInfos, concatDim);
 
     queueDescriptor.m_ViewOrigins.reserve(viewsDescriptor.GetNumViews());
     for (unsigned int i = 0; i < viewsDescriptor.GetNumViews(); ++i)
@@ -1298,8 +1591,6 @@ void Concatenate(armnn::IWorkloadFactory& workloadFactory,
             viewsDescriptor.GetViewOrigin(i) + viewsDescriptor.GetNumDimensions()));
     }
 
-    const size_t inputCount = inputTensorInfos.size();
-
     std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputTensorInfo);
 
     std::vector<std::unique_ptr<armnn::ITensorHandle>> inputHandles;
@@ -1308,7 +1599,7 @@ void Concatenate(armnn::IWorkloadFactory& workloadFactory,
     const bool subTensorsSupported = workloadFactory.SupportsSubTensors();
     for (unsigned int i = 0; i < inputCount; ++i)
     {
-        const armnn::TensorInfo& inputTensorInfo = inputTensorInfos.begin()[i];
+        const armnn::TensorInfo& inputTensorInfo = inputTensorInfos[i];
 
         std::unique_ptr<armnn::ITensorHandle> inputHandle = subTensorsSupported ?
             workloadFactory.CreateSubTensorHandle(*outputHandle, inputTensorInfo.GetShape(),
@@ -1322,7 +1613,7 @@ void Concatenate(armnn::IWorkloadFactory& workloadFactory,
 
     for (unsigned int i = 0; i < inputCount; ++i)
     {
-        AddInputToWorkload(queueDescriptor, workloadInfo, inputTensorInfos.begin()[i], inputHandles[i].get());
+        AddInputToWorkload(queueDescriptor, workloadInfo, inputTensorInfos[i], inputHandles[i].get());
     }
 
     AddOutputToWorkload(queueDescriptor, workloadInfo, outputTensorInfo, outputHandle.get());
@@ -1339,12 +1630,25 @@ void Concatenate(armnn::IWorkloadFactory& workloadFactory,
     unsigned int nextInputId = 0;
     for (auto& inputHandle : inputHandles)
     {
-        CopyDataToITensorHandle(inputHandle.get(), *(inputs.begin() + nextInputId++));
+        CopyDataToITensorHandle(inputHandle.get(), inputs[nextInputId]);
+        ++nextInputId;
     }
 
+    workloadFactory.Finalize();
     workload->Execute();
 
-    CopyDataFromITensorHandle(output, outputHandle.get());
+    if (needPermuteForConcat)
+    {
+        PermuteOutputForConcat<T>(workloadFactory,
+                                  outputTensorInfo,
+                                  permuteVector,
+                                  std::move(outputHandle),
+                                  output);
+    }
+    else
+    {
+        CopyDataFromITensorHandle(output, outputHandle.get());
+    }
 }
 
 template <typename T>
@@ -1362,7 +1666,7 @@ LayerTestResult<T, 1> Concatenation1dTestImpl(armnn::IWorkloadFactory& workloadF
 
     std::vector<T> output;
     output.resize(outputTensorInfo.GetNumElements());
-    Concatenate(workloadFactory,
+    Concatenate<T>(workloadFactory,
         { inputTensorInfo, inputTensorInfo, inputTensorInfo },
         { input0.data(), input1.data(), input2.data() },
         outputTensorInfo,
@@ -1419,7 +1723,7 @@ LayerTestResult<T, 2> Concatenation2dTestImpl(armnn::IWorkloadFactory& workloadF
 
     std::vector<T> output;
     output.resize(outputTensorInfo.GetNumElements());
-    Concatenate(workloadFactory,
+    Concatenate<T>(workloadFactory,
         { inputTensorInfo, inputTensorInfo, inputTensorInfo },
         { input0.data(), input1.data(), input2.data() },
         outputTensorInfo,
@@ -1524,7 +1828,7 @@ LayerTestResult<T, 2> Concatenation2dDim0DiffInputDimsTestImpl(armnn::IWorkloadF
 
     std::vector<T> output;
     output.resize(outputTensorInfo.GetNumElements());
-    Concatenate(workloadFactory,
+    Concatenate<T>(workloadFactory,
         { input0TensorInfo, input1TensorInfo, input2TensorInfo },
         { input0.data(), input1.data(), input2.data() },
         outputTensorInfo,
@@ -1596,7 +1900,7 @@ LayerTestResult<T, 2> Concatenation2dDim1DiffInputDimsTestImpl(armnn::IWorkloadF
 
     std::vector<T> output;
     output.resize(outputTensorInfo.GetNumElements());
-    Concatenate(workloadFactory,
+    Concatenate<T>(workloadFactory,
         { input0TensorInfo, input1TensorInfo, input2TensorInfo },
         { input0.data(), input1.data(), input2.data() },
         outputTensorInfo,
@@ -1693,7 +1997,7 @@ LayerTestResult<T, 3> Concatenation3dTestImpl(armnn::IWorkloadFactory& workloadF
 
     std::vector<T> output;
     output.resize(outputTensorInfo.GetNumElements());
-    Concatenate(workloadFactory,
+    Concatenate<T>(workloadFactory,
         { inputTensorInfo, inputTensorInfo, inputTensorInfo },
         { input0.data(), input1.data(), input2.data() },
         outputTensorInfo,
@@ -1953,7 +2257,7 @@ LayerTestResult<T, 3> Concatenation3dDim0DiffInputDimsTestImpl(armnn::IWorkloadF
 
     std::vector<T> output;
     output.resize(outputTensorInfo.GetNumElements());
-    Concatenate(workloadFactory,
+    Concatenate<T>(workloadFactory,
         { input0TensorInfo, input1TensorInfo, input2TensorInfo },
         { input0.data(), input1.data(), input2.data() },
         outputTensorInfo,
@@ -2091,7 +2395,7 @@ LayerTestResult<T, 3> Concatenation3dDim1DiffInputDimsTestImpl(armnn::IWorkloadF
 
     std::vector<T> output;
     output.resize(outputTensorInfo.GetNumElements());
-    Concatenate(workloadFactory,
+    Concatenate<T>(workloadFactory,
         { input0TensorInfo, input1TensorInfo, input2TensorInfo },
         { input0.data(), input1.data(), input2.data() },
         outputTensorInfo,
@@ -2229,7 +2533,7 @@ LayerTestResult<T, 3> Concatenation3dDim2DiffInputDimsTestImpl(armnn::IWorkloadF
 
     std::vector<T> output;
     output.resize(outputTensorInfo.GetNumElements());
-    Concatenate(workloadFactory,
+    Concatenate<T>(workloadFactory,
         { input0TensorInfo, input1TensorInfo, input2TensorInfo },
         { input0.data(), input1.data(), input2.data() },
         outputTensorInfo,
@@ -2306,6 +2610,7 @@ LayerTestResult<float, 4> ResizeBilinearNopTest(armnn::IWorkloadFactory& workloa
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -2358,6 +2663,7 @@ LayerTestResult<float, 4> SimpleResizeBilinearTest(armnn::IWorkloadFactory& work
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -2408,6 +2714,7 @@ LayerTestResult<float, 4> ResizeBilinearSqMinTest(armnn::IWorkloadFactory& workl
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -2457,6 +2764,7 @@ LayerTestResult<float, 4> ResizeBilinearMinTest(armnn::IWorkloadFactory& workloa
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -2507,6 +2815,7 @@ LayerTestResult<float, 4> ResizeBilinearMagTest(armnn::IWorkloadFactory& workloa
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -2555,6 +2864,7 @@ LayerTestResult<float, 2> FakeQuantizationTest(armnn::IWorkloadFactory& workload
 
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0], outputHandle.get());
@@ -2617,6 +2927,7 @@ LayerTestResult<float, 4> L2Normalization1dTest(armnn::IWorkloadFactory& workloa
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -2686,6 +2997,7 @@ LayerTestResult<float, 4> L2Normalization2dTest(armnn::IWorkloadFactory& workloa
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -2766,6 +3078,7 @@ LayerTestResult<float, 4> L2Normalization3dTest(armnn::IWorkloadFactory& workloa
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -2929,6 +3242,7 @@ LayerTestResult<float, 4> L2Normalization4dTest(armnn::IWorkloadFactory& workloa
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -3022,6 +3336,7 @@ LayerTestResult<T, 4> ConstantTestImpl(armnn::IWorkloadFactory& workloadFactory,
 
     outputHandle->Allocate();
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -3040,32 +3355,22 @@ LayerTestResult<uint8_t, 4> ConstantTestUint8(armnn::IWorkloadFactory& workloadF
 
 LayerTestResult<uint8_t, 3> MergerUint8Test(armnn::IWorkloadFactory& workloadFactory)
 {
-    unsigned int outputWidth = 5;
+    unsigned int outputWidth = 3;
     unsigned int outputHeight = 6;
     unsigned int outputChannels = 3;
 
-    unsigned int inputWidth1 = 2;
-    unsigned int inputHeight1 = 2;
-    unsigned int inputChannels1 = 3;
+    unsigned int inputWidth1 = 3;
+    unsigned int inputHeight1 = 6;
+    unsigned int inputChannels1 = 2;
 
-    unsigned int inputWidth2 = 2;
-    unsigned int inputHeight2 = 4;
-    unsigned int inputChannels2 = 3;
-
-    unsigned int inputWidth3 = 3;
-    unsigned int inputHeight3 = 6;
-    unsigned int inputChannels3 = 2;
-
-    unsigned int inputWidth4 = 3;
-    unsigned int inputHeight4 = 6;
-    unsigned int inputChannels4 = 1;
+    unsigned int inputWidth2 = 3;
+    unsigned int inputHeight2 = 6;
+    unsigned int inputChannels2 = 1;
 
     // Define the tensor descriptors
     armnn::TensorInfo outputTensorInfo({ outputChannels, outputHeight, outputWidth }, armnn::DataType::QuantisedAsymm8);
     armnn::TensorInfo inputTensorInfo1({ inputChannels1, inputHeight1, inputWidth1 }, armnn::DataType::QuantisedAsymm8);
     armnn::TensorInfo inputTensorInfo2({ inputChannels2, inputHeight2, inputWidth2 }, armnn::DataType::QuantisedAsymm8);
-    armnn::TensorInfo inputTensorInfo3({ inputChannels3, inputHeight3, inputWidth3 }, armnn::DataType::QuantisedAsymm8);
-    armnn::TensorInfo inputTensorInfo4({ inputChannels4, inputHeight4, inputWidth4 }, armnn::DataType::QuantisedAsymm8);
 
     // Arbitrary scale and offsets. They don't really matter as the merger operator doesn't dequantize/quantize
     const float scale = 0.13497836f;
@@ -3077,113 +3382,69 @@ LayerTestResult<uint8_t, 3> MergerUint8Test(armnn::IWorkloadFactory& workloadFac
     inputTensorInfo1.SetQuantizationOffset(offset);
     inputTensorInfo2.SetQuantizationScale(scale);
     inputTensorInfo2.SetQuantizationOffset(offset);
-    inputTensorInfo3.SetQuantizationScale(scale);
-    inputTensorInfo3.SetQuantizationOffset(offset);
-    inputTensorInfo4.SetQuantizationScale(scale);
-    inputTensorInfo4.SetQuantizationOffset(offset);
 
     LayerTestResult<uint8_t, 3> ret(outputTensorInfo);
 
     ret.outputExpected = MakeTensor<uint8_t, 3>(outputTensorInfo, std::vector<uint8_t>(
-    {
-        1, 2, 3, 4, 5,
-        6, 7, 8, 9, 10,
-        11, 12, 13, 14, 15,
-        16, 17, 18, 19, 20,
-        21, 22, 23, 24, 25,
-        26, 27, 28, 29, 30,
-
-        31, 32, 33, 34, 35,
-        36, 37, 38, 39, 40,
-        41, 42, 43, 44, 45,
-        46, 47, 48, 49, 50,
-        51, 52, 53, 54, 55,
-        56, 57, 58, 59, 60,
-
-        61, 62, 63, 64, 65,
-        66, 67, 68, 69, 70,
-        71, 72, 73, 74, 75,
-        76, 77, 78, 79, 80,
-        81, 82, 83, 84, 85,
-        86, 87, 88, 89, 90,
-    })
+        {
+            1, 2, 3,
+            4, 5, 6,
+            7, 8, 9,
+            10, 11, 12,
+            13, 14, 15,
+            16, 17, 18,
+
+            19, 20, 21,
+            22, 23, 24,
+            25, 26, 27,
+            28, 29, 30,
+            31, 32, 33,
+            34, 35, 36,
+
+            37, 38, 39,
+            40, 41, 42,
+            43, 44, 45,
+            46, 47, 48,
+            49, 50, 51,
+            52, 53, 54,
+        })
     );
 
-
     auto input1 = MakeTensor<uint8_t, 3>(inputTensorInfo1, std::vector<uint8_t>(
     {
-        1, 2,
-        6, 7,
-
-        31, 32,
-        36, 37,
+        1, 2, 3,
+        4, 5, 6,
+        7, 8, 9,
+        10, 11, 12,
+        13, 14, 15,
+        16, 17, 18,
 
-        61, 62,
-        66, 67,
+        19, 20, 21,
+        22, 23, 24,
+        25, 26, 27,
+        28, 29, 30,
+        31, 32, 33,
+        34, 35, 36,
     })
     );
 
     auto input2 = MakeTensor<uint8_t, 3>(inputTensorInfo2, std::vector<uint8_t>(
     {
-        11, 12,
-        16, 17,
-        21, 22,
-        26, 27,
-
-        41, 42,
-        46, 47,
-        51, 52,
-        56, 57,
-
-        71, 72,
-        76, 77,
-        81, 82,
-        86, 87,
-    })
-    );
-
-    auto input3 = MakeTensor<uint8_t, 3>(inputTensorInfo3, std::vector<uint8_t>(
-    {
-        3, 4, 5,
-        8, 9, 10,
-        13, 14, 15,
-        18, 19, 20,
-        23, 24, 25,
-        28, 29, 30,
-
-        33, 34, 35,
-        38, 39, 40,
+        37, 38, 39,
+        40, 41, 42,
         43, 44, 45,
-        48, 49, 50,
-        53, 54, 55,
-        58, 59, 60,
-    })
-    );
-
-
-    auto input4 = MakeTensor<uint8_t, 3>(inputTensorInfo4, std::vector<uint8_t>(
-    {
-        63, 64, 65,
-        68, 69, 70,
-        73, 74, 75,
-        78, 79, 80,
-        83, 84, 85,
-        88, 89, 90,
+        46, 47, 48,
+        49, 50, 51,
+        52, 53, 54,
     })
     );
 
     std::vector<unsigned int> wOrigin1 = { 0, 0, 0 }; //extent of the window is defined by size of input[0]
     armnn::MergerQueueDescriptor::ViewOrigin window1(wOrigin1);
 
-    std::vector<unsigned int> wOrigin2 = { 0, 2, 0 }; //extent of the window is defined by size of input[1]
+    std::vector<unsigned int> wOrigin2 = { 2, 0, 0 }; //extent of the window is defined by size of input[1]
     armnn::MergerQueueDescriptor::ViewOrigin window2(wOrigin2);
 
-    std::vector<unsigned int> wOrigin3 = { 0, 0, 2 }; //extent of the window is defined by size of input[2]
-    armnn::MergerQueueDescriptor::ViewOrigin window3(wOrigin3);
-
-    std::vector<unsigned int> wOrigin4 = { 2, 0, 2 }; //extent of the window is defined by size of input[3]
-    armnn::MergerQueueDescriptor::ViewOrigin window4(wOrigin4);
-
 
     std::unique_ptr<armnn::ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputTensorInfo);
 
@@ -3199,43 +3460,26 @@ LayerTestResult<uint8_t, 3> MergerUint8Test(armnn::IWorkloadFactory& workloadFac
             workloadFactory.CreateSubTensorHandle(*outputHandle, inputTensorInfo2.GetShape(), wOrigin2.data()) :
             workloadFactory.CreateTensorHandle(inputTensorInfo2);
 
-    std::unique_ptr<armnn::ITensorHandle> inputHandle3 =
-        subTensorsSupported ?
-            workloadFactory.CreateSubTensorHandle(*outputHandle, inputTensorInfo3.GetShape(), wOrigin3.data()) :
-            workloadFactory.CreateTensorHandle(inputTensorInfo3);
-
-    std::unique_ptr<armnn::ITensorHandle> inputHandle4 =
-        subTensorsSupported ?
-            workloadFactory.CreateSubTensorHandle(*outputHandle, inputTensorInfo4.GetShape(), wOrigin4.data()) :
-            workloadFactory.CreateTensorHandle(inputTensorInfo4);
-
 
     armnn::MergerQueueDescriptor data;
     armnn::WorkloadInfo info;
     AddInputToWorkload(data, info, inputTensorInfo1, inputHandle1.get());
     AddInputToWorkload(data, info, inputTensorInfo2, inputHandle2.get());
-    AddInputToWorkload(data, info, inputTensorInfo3, inputHandle3.get());
-    AddInputToWorkload(data, info, inputTensorInfo4, inputHandle4.get());
     AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
 
     data.m_ViewOrigins.push_back(window1);
     data.m_ViewOrigins.push_back(window2);
-    data.m_ViewOrigins.push_back(window3);
-    data.m_ViewOrigins.push_back(window4);
 
     std::unique_ptr<armnn::IWorkload> workload = workloadFactory.CreateMerger(data, info);
 
     inputHandle1->Allocate();
     inputHandle2->Allocate();
-    inputHandle3->Allocate();
-    inputHandle4->Allocate();
     outputHandle->Allocate();
 
     CopyDataToITensorHandle(inputHandle1.get(), &input1[0][0][0]);
     CopyDataToITensorHandle(inputHandle2.get(), &input2[0][0][0]);
-    CopyDataToITensorHandle(inputHandle3.get(), &input3[0][0][0]);
-    CopyDataToITensorHandle(inputHandle4.get(), &input4[0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0], outputHandle.get());
@@ -3310,6 +3554,7 @@ LayerTestResult<uint8_t, 4> AdditionUint8Test(armnn::IWorkloadFactory& workloadF
     CopyDataToITensorHandle(inputHandle1.get(), &input1[0][0][0][0]);
     CopyDataToITensorHandle(inputHandle2.get(), &input2[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -3371,6 +3616,7 @@ LayerTestResult<uint8_t, 4> MultiplicationUint8TestHelper(armnn::IWorkloadFactor
     CopyDataToITensorHandle(inputHandle0.get(), &input0[0][0][0][0]);
     CopyDataToITensorHandle(inputHandle1.get(), &input1[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -3531,6 +3777,7 @@ LayerTestResult<uint8_t, 4> ResizeBilinearNopUint8Test(armnn::IWorkloadFactory&
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -3588,6 +3835,7 @@ LayerTestResult<uint8_t, 4> SimpleResizeBilinearUint8Test(armnn::IWorkloadFactor
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -3643,6 +3891,7 @@ LayerTestResult<uint8_t, 4> ResizeBilinearSqMinUint8Test(armnn::IWorkloadFactory
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -3696,6 +3945,7 @@ LayerTestResult<uint8_t, 4> ResizeBilinearMinUint8Test(armnn::IWorkloadFactory&
 
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
@@ -3751,6 +4001,7 @@ LayerTestResult<uint8_t, 4> ResizeBilinearMagUint8Test(armnn::IWorkloadFactory&
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&result.output[0][0][0][0], outputHandle.get());
diff --git a/src/armnn/backends/test/LayerTests.hpp b/src/armnn/backends/test/LayerTests.hpp
index 36e73e461c..2d543d61de 100644
--- a/src/armnn/backends/test/LayerTests.hpp
+++ b/src/armnn/backends/test/LayerTests.hpp
@@ -67,6 +67,9 @@ LayerTestResult<float, 4> DepthwiseConvolution2dTest(armnn::IWorkloadFactory& wo
 LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul1Test(armnn::IWorkloadFactory& workloadFactory,
                                                               bool biasEnabled);
 
+LayerTestResult<float, 4> DepthwiseConvolution2dAsymmetricTest(armnn::IWorkloadFactory& workloadFactory,
+                                                               bool biasEnabled);
+
 LayerTestResult<float,   4> SimpleMaxPooling2dSize2x2Stride2x2Test(armnn::IWorkloadFactory& workloadFactory,
                                                                    bool forceNoPadding);
 LayerTestResult<uint8_t, 4> SimpleMaxPooling2dSize2x2Stride2x2Uint8Test(armnn::IWorkloadFactory& workloadFactory,
diff --git a/src/armnn/backends/test/MemCopyTests.cpp b/src/armnn/backends/test/MemCopyTests.cpp
index 8e4dae35f2..32331789e9 100644
--- a/src/armnn/backends/test/MemCopyTests.cpp
+++ b/src/armnn/backends/test/MemCopyTests.cpp
@@ -24,7 +24,7 @@ BOOST_AUTO_TEST_SUITE(MemCopyTestSuite)
 void MemCopyTest(armnn::IWorkloadFactory& srcWorkloadFactory, armnn::IWorkloadFactory& dstWorkloadFactory,
                  bool withSubtensors)
 {
-    const std::array<unsigned int, 4> shapeData = { 1u, 1u, 6u, 5u };
+    const std::array<unsigned int, 4> shapeData = { { 1u, 1u, 6u, 5u } };
     const armnn::TensorShape tensorShape(4, shapeData.data());
     const armnn::TensorInfo tensorInfo(tensorShape, armnn::DataType::Float32);
     boost::multi_array<float, 4> inputData = MakeTensor<float, 4>(tensorInfo, std::vector<float>(
diff --git a/src/armnn/backends/test/NormTestImpl.hpp b/src/armnn/backends/test/NormTestImpl.hpp
index 1f6aadc9df..d9dc01592a 100644
--- a/src/armnn/backends/test/NormTestImpl.hpp
+++ b/src/armnn/backends/test/NormTestImpl.hpp
@@ -71,6 +71,7 @@ LayerTestResult<float,4> SimpleNormalizationTestImpl(armnn::IWorkloadFactory& wo
 
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
@@ -227,7 +228,9 @@ LayerTestResult<float,4> CompareNormalizationTestImpl(armnn::IWorkloadFactory& w
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0][0]);
     CopyDataToITensorHandle(inputHandleRef.get(), &input[0][0][0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
+    refWorkloadFactory.Finalize();
     workloadRef->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
diff --git a/src/armnn/backends/test/Reference.cpp b/src/armnn/backends/test/Reference.cpp
index 89e5db8e43..b60483a4d9 100644
--- a/src/armnn/backends/test/Reference.cpp
+++ b/src/armnn/backends/test/Reference.cpp
@@ -49,6 +49,9 @@ ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dDepthMul1Uint8, DepthwiseConvolution2
 ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1, DepthwiseConvolution2dDepthMul1Test, false)
 ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dDepthMul1Uint8, DepthwiseConvolution2dDepthMul1Uint8Test, false)
 
+ARMNN_AUTO_TEST_CASE(DepthwiseConvolution2dAsymmetric, DepthwiseConvolution2dAsymmetricTest, true)
+ARMNN_AUTO_TEST_CASE(UnbiasedDepthwiseConvolution2dAsymmetric, DepthwiseConvolution2dAsymmetricTest, false)
+
 // Pooling
 ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dSize2x2Stride2x2, SimpleMaxPooling2dSize2x2Stride2x2Test, false)
 ARMNN_AUTO_TEST_CASE(SimpleMaxPooling2dSize2x2Stride2x2Uint8, SimpleMaxPooling2dSize2x2Stride2x2Uint8Test, false)
diff --git a/src/armnn/backends/test/SoftmaxTestImpl.hpp b/src/armnn/backends/test/SoftmaxTestImpl.hpp
index 5aa74f9618..4c3e0b73dd 100644
--- a/src/armnn/backends/test/SoftmaxTestImpl.hpp
+++ b/src/armnn/backends/test/SoftmaxTestImpl.hpp
@@ -62,6 +62,7 @@ LayerTestResult<T, 2> SimpleSoftmaxTestImpl(armnn::IWorkloadFactory& workloadFac
     outputHandle->Allocate();
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0], outputHandle.get());
@@ -140,11 +141,13 @@ LayerTestResult<T, 2> CompareSoftmaxTestImpl(armnn::IWorkloadFactory& workloadFa
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0]);
     CopyDataToITensorHandle(inputHandleRef.get(), &input[0][0]);
 
+    workloadFactory.Finalize();
     workload->Execute();
+    refWorkloadFactory.Finalize();
     workloadRef->Execute();
 
     CopyDataFromITensorHandle(&ret.output[0][0], outputHandle.get());
     CopyDataFromITensorHandle(&ret.outputExpected[0][0], outputHandleRef.get());
 
     return ret;
-}
\ No newline at end of file
+}
diff --git a/src/armnn/backends/test/SplitterTestImpl.hpp b/src/armnn/backends/test/SplitterTestImpl.hpp
index b72046e4bc..70b798eafa 100644
--- a/src/armnn/backends/test/SplitterTestImpl.hpp
+++ b/src/armnn/backends/test/SplitterTestImpl.hpp
@@ -25,31 +25,34 @@ std::vector<LayerTestResult<T,3>> SplitterTestCommon(armnn::IWorkloadFactory& wo
     unsigned int inputHeight = 6;
     unsigned int inputChannels = 3;
 
-    unsigned int outputWidth1 = 2;
-    unsigned int outputHeight1 = 2;
-    unsigned int outputChannels1 = 3;
+    // NOTE: Compute Library imposes a restriction that the x and y dimension (input height and width)
+    //       cannot be split.
+    //       For the reasons for this see first comment on https://jira.arm.com/browse/IVGCVSW-1239
+    //
+    // this test has therefore been recast to split the channels, then split the resulting subtensor
 
-    unsigned int outputWidth2 = 2;
-    unsigned int outputHeight2 = 4;
-    unsigned int outputChannels2 = 3;
+    // to take channel 0 of original output
+    // and channel 0 and channel 1 of the split subtensor
+    unsigned int outputWidth1 = inputWidth;
+    unsigned int outputHeight1 = inputHeight;
+    unsigned int outputChannels1 = 1;
 
-    unsigned int outputWidth3 = 3;
-    unsigned int outputHeight3 = 6;
-    unsigned int outputChannels3 = 2;
-
-    unsigned int outputWidth4 = 3;
-    unsigned int outputHeight4 = 6;
-    unsigned int outputChannels4 = 1;
+    // to take channel 1 and 2 of the original output
+    unsigned int outputWidth2 = inputWidth;
+    unsigned int outputHeight2 = inputHeight;
+    unsigned int outputChannels2 = 2;
 
 
     // Define the tensor descriptors
     armnn::TensorInfo inputTensorInfo({ inputChannels, inputHeight, inputWidth }, armnn::GetDataType<T>());
+
+    // outputs of the original split
     armnn::TensorInfo outputTensorInfo1({ outputChannels1, outputHeight1, outputWidth1 }, armnn::GetDataType<T>());
     armnn::TensorInfo outputTensorInfo2({ outputChannels2, outputHeight2, outputWidth2 }, armnn::GetDataType<T>());
-    armnn::TensorInfo outputTensorInfo3({ outputChannels3, outputHeight3, outputWidth3 }, armnn::GetDataType<T>());
-    armnn::TensorInfo outputTensorInfo4({ outputChannels4, outputHeight4, outputWidth4 }, armnn::GetDataType<T>());
-    // note that output 5 should match output 2
-    armnn::TensorInfo outputTensorInfo5({ outputChannels2, outputHeight2, outputWidth2 }, armnn::GetDataType<T>());
+
+    // outputs of the subsequent subtensor split
+    armnn::TensorInfo outputTensorInfo3({ outputChannels1, outputHeight1, outputWidth1 }, armnn::GetDataType<T>());
+    armnn::TensorInfo outputTensorInfo4({ outputChannels1, outputHeight1, outputWidth1 }, armnn::GetDataType<T>());
 
     // Set quantization parameters if the requested type is a quantized type.
     // The quantization doesn't really matter as the splitter operator doesn't dequantize/quantize
@@ -65,15 +68,12 @@ std::vector<LayerTestResult<T,3>> SplitterTestCommon(armnn::IWorkloadFactory& wo
         outputTensorInfo3.SetQuantizationOffset(qOffset);
         outputTensorInfo4.SetQuantizationScale(qScale);
         outputTensorInfo4.SetQuantizationOffset(qOffset);
-        outputTensorInfo5.SetQuantizationScale(qScale);
-        outputTensorInfo5.SetQuantizationOffset(qOffset);
     }
 
     LayerTestResult<T,3> ret1(outputTensorInfo1);
     LayerTestResult<T,3> ret2(outputTensorInfo2);
     LayerTestResult<T,3> ret3(outputTensorInfo3);
     LayerTestResult<T,3> ret4(outputTensorInfo4);
-    LayerTestResult<T,3> ret5(outputTensorInfo5);
 
     auto input = MakeTensor<T, 3>(inputTensorInfo, std::vector<T>(
         QuantizedVector<T>(qScale, qOffset, {
@@ -100,98 +100,74 @@ std::vector<LayerTestResult<T,3>> SplitterTestCommon(armnn::IWorkloadFactory& wo
         })
     ));
 
-
+    // channel 0 of the original input
     ret1.outputExpected = MakeTensor<T, 3>(outputTensorInfo1, std::vector<T>(
         QuantizedVector<T>(qScale, qOffset, {
-            1.0f, 2.0f,
-            6.0f, 7.0f,
-
-            31.0f, 32.0f,
-            36.0f, 37.0f,
-
-            61.0f, 62.0f,
-            66.0f, 67.0f,
+            1.0f, 2.0f, 3.0f, 4.0f, 5.0f,
+            6.0f, 7.0f, 8.0f, 9.0f, 10.0f,
+            11.0f, 12.0f, 13.0f, 14.0f, 15.0f,
+            16.0f, 17.0f, 18.0f, 19.0f, 20.0f,
+            21.0f, 22.0f, 23.0f, 24.0f, 25.0f,
+            26.0f, 27.0f, 28.0f, 29.0f, 30.0f,
         })
     ));
 
+    // channel 1 & 2 of the original input
     ret2.outputExpected = MakeTensor<T, 3>(outputTensorInfo2, std::vector<T>(
         QuantizedVector<T>(qScale, qOffset, {
-            11.0f, 12.0f,
-            16.0f, 17.0f,
-            21.0f, 22.0f,
-            26.0f, 27.0f,
-
-            41.0f, 42.0f,
-            46.0f, 47.0f,
-            51.0f, 52.0f,
-            56.0f, 57.0f,
-
-            71.0f, 72.0f,
-            76.0f, 77.0f,
-            81.0f, 82.0f,
-            86.0f, 87.0f,
+            31.0f, 32.0f, 33.0f, 34.0f, 35.0f,
+            36.0f, 37.0f, 38.0f, 39.0f, 40.0f,
+            41.0f, 42.0f, 43.0f, 44.0f, 45.0f,
+            46.0f, 47.0f, 48.0f, 49.0f, 50.0f,
+            51.0f, 52.0f, 53.0f, 54.0f, 55.0f,
+            56.0f, 57.0f, 58.0f, 59.0f, 60.0f,
+
+            61.0f, 62.0f, 63.0f, 64.0f, 65.0f,
+            66.0f, 67.0f, 68.0f, 69.0f, 70.0f,
+            71.0f, 72.0f, 73.0f, 74.0f, 75.0f,
+            76.0f, 77.0f, 78.0f, 79.0f, 80.0f,
+            81.0f, 82.0f, 83.0f, 84.0f, 85.0f,
+            86.0f, 87.0f, 88.0f, 89.0f, 90.0f,
         })
     ));
 
+    // channel 0 of return 2 (i.e. channels 1 and 2 of the original input)
     ret3.outputExpected = MakeTensor<T, 3>(outputTensorInfo3, std::vector<T>(
         QuantizedVector<T>(qScale, qOffset, {
-            3.0f, 4.0f, 5.0f,
-            8.0f, 9.0f, 10.0f,
-            13.0f, 14.0f, 15.0f,
-            18.0f, 19.0f, 20.0f,
-            23.0f, 24.0f, 25.0f,
-            28.0f, 29.0f, 30.0f,
-
-            33.0f, 34.0f, 35.0f,
-            38.0f, 39.0f, 40.0f,
-            43.0f, 44.0f, 45.0f,
-            48.0f, 49.0f, 50.0f,
-            53.0f, 54.0f, 55.0f,
-            58.0f, 59.0f, 60.0f,
+            31.0f, 32.0f, 33.0f, 34.0f, 35.0f,
+            36.0f, 37.0f, 38.0f, 39.0f, 40.0f,
+            41.0f, 42.0f, 43.0f, 44.0f, 45.0f,
+            46.0f, 47.0f, 48.0f, 49.0f, 50.0f,
+            51.0f, 52.0f, 53.0f, 54.0f, 55.0f,
+            56.0f, 57.0f, 58.0f, 59.0f, 60.0f,
         })
     ));
 
+    // channel 1 of return 2
     ret4.outputExpected = MakeTensor<T, 3>(outputTensorInfo4, std::vector<T>(
         QuantizedVector<T>(qScale, qOffset, {
-            63.0f, 64.0f, 65.0f,
-            68.0f, 69.0f, 70.0f,
-            73.0f, 74.0f, 75.0f,
-            78.0f, 79.0f, 80.0f,
-            83.0f, 84.0f, 85.0f,
-            88.0f, 89.0f, 90.0f,
-        })
-    ));
-
-
-    ret5.outputExpected = MakeTensor<T, 3>(outputTensorInfo5, std::vector<T>(
-        QuantizedVector<T>(qScale, qOffset, {
-            11.0f, 12.0f,
-            16.0f, 17.0f,
-            21.0f, 22.0f,
-            26.0f, 27.0f,
-
-            41.0f, 42.0f,
-            46.0f, 47.0f,
-            51.0f, 52.0f,
-            56.0f, 57.0f,
-
-            71.0f, 72.0f,
-            76.0f, 77.0f,
-            81.0f, 82.0f,
-            86.0f, 87.0f,
+            61.0f, 62.0f, 63.0f, 64.0f, 65.0f,
+            66.0f, 67.0f, 68.0f, 69.0f, 70.0f,
+            71.0f, 72.0f, 73.0f, 74.0f, 75.0f,
+            76.0f, 77.0f, 78.0f, 79.0f, 80.0f,
+            81.0f, 82.0f, 83.0f, 84.0f, 85.0f,
+            86.0f, 87.0f, 88.0f, 89.0f, 90.0f,
         })
     ));
 
+    // NOTE: as a corollary of the no splitting of x and y restriction the x and y values of the view origins
+    //       have to be zero, the co-ordinates are as per the tensor info above channels, height/y, width/x
+    //       note that under the hood the compute engine reverses these i.e. its coordinate system is x, y, channels
     std::vector<unsigned int> wOrigin1 = {0, 0, 0}; //extent of the window is defined by size of output[0]
     armnn::SplitterQueueDescriptor::ViewOrigin window1(wOrigin1);
 
-    std::vector<unsigned int> wOrigin2 = {0, 2, 0}; //extent of the window is defined by size of output[1]
+    std::vector<unsigned int> wOrigin2 = {1, 0, 0}; //extent of the window is defined by size of output[1]
     armnn::SplitterQueueDescriptor::ViewOrigin window2(wOrigin2);
 
-    std::vector<unsigned int> wOrigin3 = {0, 0, 2}; //extent of the window is defined by size of output[2]
+    std::vector<unsigned int> wOrigin3 = {0, 0, 0}; //extent of the window is defined by size of output[2]
     armnn::SplitterQueueDescriptor::ViewOrigin window3(wOrigin3);
 
-    std::vector<unsigned int> wOrigin4 = {2, 0, 2}; //extent of the window is defined by size of output[3]
+    std::vector<unsigned int> wOrigin4 = {1, 0, 0}; //extent of the window is defined by size of output[3]
     armnn::SplitterQueueDescriptor::ViewOrigin window4(wOrigin4);
 
     bool subTensorsSupported = workloadFactory.SupportsSubTensors();
@@ -210,43 +186,29 @@ std::vector<LayerTestResult<T,3>> SplitterTestCommon(armnn::IWorkloadFactory& wo
 
     std::unique_ptr<armnn::ITensorHandle> outputHandle3 =
         subTensorsSupported ?
-            workloadFactory.CreateSubTensorHandle(*inputHandle, outputTensorInfo3.GetShape(), wOrigin3.data()) :
+            workloadFactory.CreateSubTensorHandle(*outputHandle2, outputTensorInfo3.GetShape(), wOrigin3.data()) :
             workloadFactory.CreateTensorHandle(outputTensorInfo3);
 
     std::unique_ptr<armnn::ITensorHandle> outputHandle4 =
         subTensorsSupported ?
-            workloadFactory.CreateSubTensorHandle(*inputHandle, outputTensorInfo4.GetShape(), wOrigin4.data()) :
+            workloadFactory.CreateSubTensorHandle(*outputHandle2, outputTensorInfo4.GetShape(), wOrigin4.data()) :
             workloadFactory.CreateTensorHandle(outputTensorInfo4);
 
-    std::unique_ptr<armnn::ITensorHandle> outputHandle5 =
-        subTensorsSupported ?
-            workloadFactory.CreateSubTensorHandle(*inputHandle, outputTensorInfo5.GetShape(), wOrigin2.data()) :
-            workloadFactory.CreateTensorHandle(outputTensorInfo5);
-
+    // Do the first split
     armnn::SplitterQueueDescriptor data;
     armnn::WorkloadInfo info;
     AddInputToWorkload(data, info, inputTensorInfo, inputHandle.get());
     AddOutputToWorkload(data, info, outputTensorInfo1, outputHandle1.get());
     AddOutputToWorkload(data, info, outputTensorInfo2, outputHandle2.get());
-    AddOutputToWorkload(data, info, outputTensorInfo3, outputHandle3.get());
-    AddOutputToWorkload(data, info, outputTensorInfo4, outputHandle4.get());
-    AddOutputToWorkload(data, info, outputTensorInfo5, outputHandle5.get());
 
     data.m_ViewOrigins.push_back(window1);
     data.m_ViewOrigins.push_back(window2);
-    data.m_ViewOrigins.push_back(window3);
-    data.m_ViewOrigins.push_back(window4);
-    //add window2 again (to have an overlapping split)
-    data.m_ViewOrigins.push_back(window2);
 
     std::unique_ptr<armnn::IWorkload> workload = workloadFactory.CreateSplitter(data, info);
 
     inputHandle->Allocate();
     outputHandle1->Allocate();
     outputHandle2->Allocate();
-    outputHandle3->Allocate();
-    outputHandle4->Allocate();
-    outputHandle5->Allocate();
 
     CopyDataToITensorHandle(inputHandle.get(), &input[0][0][0]);
 
@@ -254,11 +216,28 @@ std::vector<LayerTestResult<T,3>> SplitterTestCommon(armnn::IWorkloadFactory& wo
 
     CopyDataFromITensorHandle(&ret1.output[0][0][0], outputHandle1.get());
     CopyDataFromITensorHandle(&ret2.output[0][0][0], outputHandle2.get());
+
+//    // Do the second split
+    armnn::SplitterQueueDescriptor data2;
+    armnn::WorkloadInfo info2;
+    AddInputToWorkload(data2, info2, outputTensorInfo2, outputHandle2.get());
+    AddOutputToWorkload(data2, info2, outputTensorInfo3, outputHandle3.get());
+    AddOutputToWorkload(data2, info2, outputTensorInfo4, outputHandle4.get());
+
+    data2.m_ViewOrigins.push_back(window3);
+    data2.m_ViewOrigins.push_back(window4);
+
+    std::unique_ptr<armnn::IWorkload> workload2 = workloadFactory.CreateSplitter(data2, info2);
+
+    outputHandle3->Allocate();
+    outputHandle4->Allocate();
+
+    workload2->Execute();
+
     CopyDataFromITensorHandle(&ret3.output[0][0][0], outputHandle3.get());
     CopyDataFromITensorHandle(&ret4.output[0][0][0], outputHandle4.get());
-    CopyDataFromITensorHandle(&ret5.output[0][0][0], outputHandle5.get());
 
-    std::vector<LayerTestResult<T,3>> ret = {ret1, ret2, ret3, ret4, ret5};
+    std::vector<LayerTestResult<T,3>> ret = {ret1, ret2, ret3, ret4,};
 
     return ret;
 }
diff --git a/src/armnn/layers/ActivationLayer.cpp b/src/armnn/layers/ActivationLayer.cpp
new file mode 100644
index 0000000000..2371eaa97c
--- /dev/null
+++ b/src/armnn/layers/ActivationLayer.cpp
@@ -0,0 +1,41 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "ActivationLayer.hpp"
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+ActivationLayer::ActivationLayer(const ActivationDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::Activation, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> ActivationLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    ActivationQueueDescriptor descriptor;
+    return factory.CreateActivation(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+ActivationLayer* ActivationLayer::Clone(Graph& graph) const
+{
+    return CloneBase<ActivationLayer>(graph, m_Param, GetName());
+}
+
+void ActivationLayer::ValidateTensorShapesFromInputs()
+{
+    auto& info = GetInputSlot(0).GetConnection()->GetTensorInfo();
+
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "ActivationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        info.GetShape());
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/ActivationLayer.hpp b/src/armnn/layers/ActivationLayer.hpp
new file mode 100644
index 0000000000..93714c6e85
--- /dev/null
+++ b/src/armnn/layers/ActivationLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class ActivationLayer : public LayerWithParameters<ActivationDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    ActivationLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    ActivationLayer(const ActivationDescriptor &param, const char* name);
+    ~ActivationLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/AdditionLayer.cpp b/src/armnn/layers/AdditionLayer.cpp
new file mode 100644
index 0000000000..85d12eabcb
--- /dev/null
+++ b/src/armnn/layers/AdditionLayer.cpp
@@ -0,0 +1,68 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "AdditionLayer.hpp"
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+AdditionLayer::AdditionLayer(const char* name)
+    : Layer(2, 1, LayerType::Addition, name)
+{
+}
+
+std::unique_ptr<IWorkload> AdditionLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    AdditionQueueDescriptor descriptor;
+    return factory.CreateAddition(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+AdditionLayer* AdditionLayer::Clone(Graph& graph) const
+{
+    return CloneBase<AdditionLayer>(graph, GetName());
+}
+
+void AdditionLayer::ValidateTensorShapesFromInputs()
+{
+    auto& input0 = GetInputSlot(0).GetConnection()->GetTensorInfo();
+    auto& input1 = GetInputSlot(1).GetConnection()->GetTensorInfo();
+
+    // Get the max of the inputs
+    BOOST_ASSERT(input0.GetNumDimensions() == input1.GetNumDimensions());
+    unsigned int numDims = input0.GetNumDimensions();
+    std::vector<unsigned int> dims(numDims);
+
+    // validate inputs are broadcast compatible
+#if !NDEBUG
+    for (unsigned int i = 0; i < numDims; i++)
+    {
+        unsigned int dim0 = input0.GetShape()[i];
+        unsigned int dim1 = input1.GetShape()[i];
+        if (dim0 != dim1)
+        {
+            BOOST_ASSERT_MSG(dim0 == 1 || dim1 == 1, "Dimensions should either match or one should be of size 1.");
+        }
+    }
+#endif
+
+    for (unsigned int i = 0; i < numDims; i++)
+    {
+        unsigned int dim0 = input0.GetShape()[i];
+        unsigned int dim1 = input1.GetShape()[i];
+        dims[i] = std::max(dim0, dim1);
+    }
+
+    TensorShape outShape(numDims, dims.data());
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "AdditionLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/AdditionLayer.hpp b/src/armnn/layers/AdditionLayer.hpp
new file mode 100644
index 0000000000..c48c027763
--- /dev/null
+++ b/src/armnn/layers/AdditionLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+class AdditionLayer : public Layer
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    AdditionLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    AdditionLayer(const char* name);
+    ~AdditionLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/BatchNormalizationLayer.cpp b/src/armnn/layers/BatchNormalizationLayer.cpp
new file mode 100644
index 0000000000..ebb8954ea7
--- /dev/null
+++ b/src/armnn/layers/BatchNormalizationLayer.cpp
@@ -0,0 +1,60 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "BatchNormalizationLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/CpuTensorHandle.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+BatchNormalizationLayer::BatchNormalizationLayer(const armnn::BatchNormalizationDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::BatchNormalization, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> BatchNormalizationLayer::CreateWorkload(const Graph& graph,
+                                                                   const IWorkloadFactory& factory) const
+{
+    BatchNormalizationQueueDescriptor descriptor;
+
+    descriptor.m_Mean = m_Mean.get();
+    descriptor.m_Variance = m_Variance.get();
+    descriptor.m_Beta = m_Beta.get();
+    descriptor.m_Gamma = m_Gamma.get();
+    return factory.CreateBatchNormalization(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+BatchNormalizationLayer* BatchNormalizationLayer::Clone(Graph& graph) const
+{
+    auto layer = CloneBase<BatchNormalizationLayer>(graph, m_Param, GetName());
+
+    layer->m_Mean = m_Mean ? std::make_unique<ScopedCpuTensorHandle>(*m_Mean) : nullptr;
+    layer->m_Variance = m_Variance ? std::make_unique<ScopedCpuTensorHandle>(*m_Variance) : nullptr;
+    layer->m_Beta = m_Beta ? std::make_unique<ScopedCpuTensorHandle>(*m_Beta) : nullptr;
+    layer->m_Gamma = m_Gamma ? std::make_unique<ScopedCpuTensorHandle>(*m_Gamma) : nullptr;
+
+    return std::move(layer);
+}
+
+void BatchNormalizationLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "BatchNormalizationLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "BatchNormalizationLayer: TensorInfo must be set on connected OutputSlot.");
+
+    auto& info = GetInputSlot(0).GetConnection()->GetTensorInfo();
+
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "BatchNormalizationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        info.GetShape());
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/BatchNormalizationLayer.hpp b/src/armnn/layers/BatchNormalizationLayer.hpp
new file mode 100644
index 0000000000..d8082e5e98
--- /dev/null
+++ b/src/armnn/layers/BatchNormalizationLayer.hpp
@@ -0,0 +1,34 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class ScopedCpuTensorHandle;
+
+class BatchNormalizationLayer : public LayerWithParameters<BatchNormalizationDescriptor>
+{
+public:
+    std::unique_ptr<ScopedCpuTensorHandle> m_Mean;
+    std::unique_ptr<ScopedCpuTensorHandle> m_Variance;
+    std::unique_ptr<ScopedCpuTensorHandle> m_Beta;
+    std::unique_ptr<ScopedCpuTensorHandle> m_Gamma;
+
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    BatchNormalizationLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    BatchNormalizationLayer(const BatchNormalizationDescriptor& param, const char* name);
+    ~BatchNormalizationLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/ConstantLayer.cpp b/src/armnn/layers/ConstantLayer.cpp
new file mode 100644
index 0000000000..937d38a31d
--- /dev/null
+++ b/src/armnn/layers/ConstantLayer.cpp
@@ -0,0 +1,46 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "ConstantLayer.hpp"
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/CpuTensorHandle.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+ConstantLayer::ConstantLayer(const std::shared_ptr<ScopedCpuTensorHandle>& input, const char* name)
+    : Layer(0, 1, LayerType::Constant, name)
+    , m_LayerOutput(input)
+{
+}
+
+std::unique_ptr<IWorkload> ConstantLayer::CreateWorkload(const Graph& graph,
+    const IWorkloadFactory& factory) const
+{
+    ConstantQueueDescriptor descriptor;
+    descriptor.m_LayerOutput = m_LayerOutput.get();
+    return factory.CreateConstant(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+ConstantLayer* ConstantLayer::Clone(Graph& graph) const
+{
+    // Cloned layers share the same layer output object
+    return CloneBase<ConstantLayer>(graph, m_LayerOutput, GetName());
+}
+
+void ConstantLayer::ValidateTensorShapesFromInputs()
+{
+    // get the output shape from the value of the constant layer
+    TensorShape const& outShape = m_LayerOutput->GetTensorInfo().GetShape();
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "ConstantLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/ConstantLayer.hpp b/src/armnn/layers/ConstantLayer.hpp
new file mode 100644
index 0000000000..e8e8d2298c
--- /dev/null
+++ b/src/armnn/layers/ConstantLayer.hpp
@@ -0,0 +1,32 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+class ScopedCpuTensorHandle;
+
+class ConstantLayer : public Layer
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
+        const IWorkloadFactory& factory) const override;
+
+    ConstantLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    ConstantLayer(const std::shared_ptr<ScopedCpuTensorHandle>& input, const char* name);
+    ~ConstantLayer() = default;
+
+private:
+    std::shared_ptr<ScopedCpuTensorHandle> m_LayerOutput;
+};
+
+} // namespace
diff --git a/src/armnn/layers/Convolution2dLayer.cpp b/src/armnn/layers/Convolution2dLayer.cpp
new file mode 100644
index 0000000000..3829f129bb
--- /dev/null
+++ b/src/armnn/layers/Convolution2dLayer.cpp
@@ -0,0 +1,83 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "Convolution2dLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/CpuTensorHandle.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+Convolution2dLayer::Convolution2dLayer(const Convolution2dDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::Convolution2d, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> Convolution2dLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    Convolution2dQueueDescriptor descriptor;
+
+    descriptor.m_Weight = m_Weight.get();
+    if (m_Param.m_BiasEnabled)
+    {
+        descriptor.m_Bias = m_Bias.get();
+    }
+    return factory.CreateConvolution2d(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+Convolution2dLayer* Convolution2dLayer::Clone(Graph& graph) const
+{
+    auto layer = CloneBase<Convolution2dLayer>(graph, m_Param, GetName());
+    layer->m_Weight = m_Weight ? std::make_unique<ScopedCpuTensorHandle>(*m_Weight) : nullptr;
+
+    if (layer->m_Param.m_BiasEnabled)
+    {
+        layer->m_Bias = m_Bias ? std::make_unique<ScopedCpuTensorHandle>(*m_Bias) : nullptr;
+    }
+
+    return std::move(layer);
+}
+
+void Convolution2dLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "Convolution2dLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "Convolution2dLayer: TensorInfo must be set on connected OutputSlot.");
+
+
+    IOutputSlot* input = GetInputSlot(0).GetConnection();
+    const TensorShape& inputShape = input->GetTensorInfo().GetShape();
+    const TensorShape filterShape = m_Weight->GetTensorInfo().GetShape();
+
+    // If we support multiple batch dimensions in the future, then this assert will need to change.
+    BOOST_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Convolutions will always have 4D input.");
+
+    unsigned int inWidth = inputShape[3];
+    unsigned int inHeight = inputShape[2];
+    unsigned int inBatchSize = inputShape[0];
+
+    unsigned int filterWidth = filterShape[3];
+    unsigned int readWidth = (inWidth + m_Param.m_PadLeft + m_Param.m_PadRight) - (filterWidth);
+    unsigned int outWidth =  1+(readWidth / m_Param.m_StrideX);
+
+    unsigned int filterHeight = filterShape[2];
+    unsigned int readHeight = (inHeight + m_Param.m_PadTop + m_Param.m_PadBottom) - (filterHeight);
+    unsigned int outHeight = 1+(readHeight / m_Param.m_StrideY);
+
+    unsigned int outChannels = filterShape[0];
+    unsigned int outBatchSize = inBatchSize;
+
+    TensorShape shapeOut({outBatchSize, outChannels, outHeight, outWidth});
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "Convolution2dLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        shapeOut);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/Convolution2dLayer.hpp b/src/armnn/layers/Convolution2dLayer.hpp
new file mode 100644
index 0000000000..4d2c6505d3
--- /dev/null
+++ b/src/armnn/layers/Convolution2dLayer.hpp
@@ -0,0 +1,32 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class ScopedCpuTensorHandle;
+
+class Convolution2dLayer : public LayerWithParameters<Convolution2dDescriptor>
+{
+public:
+    std::unique_ptr<ScopedCpuTensorHandle> m_Weight;
+    std::unique_ptr<ScopedCpuTensorHandle> m_Bias;
+
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    Convolution2dLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    Convolution2dLayer(const Convolution2dDescriptor& param, const char* name);
+    ~Convolution2dLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/DepthwiseConvolution2dLayer.cpp b/src/armnn/layers/DepthwiseConvolution2dLayer.cpp
new file mode 100644
index 0000000000..0442de6c60
--- /dev/null
+++ b/src/armnn/layers/DepthwiseConvolution2dLayer.cpp
@@ -0,0 +1,85 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "DepthwiseConvolution2dLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/CpuTensorHandle.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+DepthwiseConvolution2dLayer::DepthwiseConvolution2dLayer(const DepthwiseConvolution2dDescriptor& param,
+                                                         const char* name)
+    : LayerWithParameters(1, 1, LayerType::DepthwiseConvolution2d, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> DepthwiseConvolution2dLayer::CreateWorkload(const Graph&                  graph,
+                                                                       const IWorkloadFactory& factory) const
+{
+    DepthwiseConvolution2dQueueDescriptor descriptor;
+
+    descriptor.m_Weight = m_Weight.get();
+    if (m_Param.m_BiasEnabled)
+    {
+        descriptor.m_Bias = m_Bias.get();
+    }
+    return factory.CreateDepthwiseConvolution2d(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+DepthwiseConvolution2dLayer* DepthwiseConvolution2dLayer::Clone(Graph& graph) const
+{
+    auto layer      = CloneBase<DepthwiseConvolution2dLayer>(graph, m_Param, GetName());
+    layer->m_Weight = m_Weight ? std::make_unique<ScopedCpuTensorHandle>(*m_Weight) : nullptr;
+
+    if (layer->m_Param.m_BiasEnabled)
+    {
+        layer->m_Bias = m_Bias ? std::make_unique<ScopedCpuTensorHandle>(*m_Bias) : nullptr;
+    }
+
+    return std::move(layer);
+}
+
+void DepthwiseConvolution2dLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "DepthwiseConvolution2dLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "DepthwiseConvolution2dLayer: TensorInfo must be set on connected OutputSlot.");
+
+    IOutputSlot* input = GetInputSlot(0).GetConnection();
+    const TensorShape& inputShape = input->GetTensorInfo().GetShape();
+    const TensorShape filterShape = m_Weight->GetTensorInfo().GetShape();
+
+    BOOST_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Convolutions will always have 4D input.");
+
+    unsigned int inWidth = inputShape[3];
+    unsigned int inHeight = inputShape[2];
+    unsigned int inBatchSize = inputShape[0];
+
+    unsigned int filterWidth = filterShape[3];
+    unsigned int readWidth = (inWidth + m_Param.m_PadLeft + m_Param.m_PadRight) - (filterWidth);
+    unsigned int outWidth =  1+(readWidth / m_Param.m_StrideX);
+
+    unsigned int filterHeight = filterShape[2];
+    unsigned int readHeight = (inHeight + m_Param.m_PadTop + m_Param.m_PadBottom) - (filterHeight);
+    unsigned int outHeight = 1+(readHeight / m_Param.m_StrideY);
+    unsigned int depthMultiplier = filterShape[0];
+
+    unsigned int outChannels = filterShape[1]*depthMultiplier;
+    unsigned int outBatchSize = inBatchSize;
+
+    TensorShape outShape({outBatchSize, outChannels, outHeight, outWidth});
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "DepthwiseConvolution2dLayer: "
+        "TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/DepthwiseConvolution2dLayer.hpp b/src/armnn/layers/DepthwiseConvolution2dLayer.hpp
new file mode 100644
index 0000000000..60691bf73c
--- /dev/null
+++ b/src/armnn/layers/DepthwiseConvolution2dLayer.hpp
@@ -0,0 +1,32 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class ScopedCpuTensorHandle;
+
+class DepthwiseConvolution2dLayer : public LayerWithParameters<DepthwiseConvolution2dDescriptor>
+{
+public:
+    std::unique_ptr<ScopedCpuTensorHandle> m_Weight;
+    std::unique_ptr<ScopedCpuTensorHandle> m_Bias;
+
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    DepthwiseConvolution2dLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    DepthwiseConvolution2dLayer(const DepthwiseConvolution2dDescriptor& param, const char* name);
+    ~DepthwiseConvolution2dLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/FakeQuantizationLayer.cpp b/src/armnn/layers/FakeQuantizationLayer.cpp
new file mode 100644
index 0000000000..24b53b2e37
--- /dev/null
+++ b/src/armnn/layers/FakeQuantizationLayer.cpp
@@ -0,0 +1,51 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "FakeQuantizationLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+FakeQuantizationLayer::FakeQuantizationLayer(const FakeQuantizationDescriptor& param, const char* name)
+: LayerWithParameters(1, 1, LayerType::FakeQuantization, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> FakeQuantizationLayer::CreateWorkload(const Graph& graph,
+                                                                const IWorkloadFactory& factory) const
+{
+    FakeQuantizationQueueDescriptor descriptor;
+    return factory.CreateFakeQuantization(descriptor, PrepInfoAndDesc(descriptor, graph) );
+}
+
+FakeQuantizationLayer* FakeQuantizationLayer::Clone(Graph& graph) const
+{
+    return CloneBase<FakeQuantizationLayer>(graph, m_Param, GetName());
+}
+
+void FakeQuantizationLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "FakeQuantizationLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "FakeQuantizationLayer: TensorInfo must be set on connected OutputSlot.");
+
+
+    IOutputSlot* input = GetInputSlot(0).GetConnection();
+
+    // input and output shapes are the same
+    TensorShape const& outShape = input->GetTensorInfo().GetShape();
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "FakeQuantizationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/FakeQuantizationLayer.hpp b/src/armnn/layers/FakeQuantizationLayer.hpp
new file mode 100644
index 0000000000..d64ea58312
--- /dev/null
+++ b/src/armnn/layers/FakeQuantizationLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class FakeQuantizationLayer : public LayerWithParameters<FakeQuantizationDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    FakeQuantizationLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    FakeQuantizationLayer(const FakeQuantizationDescriptor& descriptor, const char* name);
+    ~FakeQuantizationLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/FloorLayer.cpp b/src/armnn/layers/FloorLayer.cpp
new file mode 100644
index 0000000000..a9ddcca60c
--- /dev/null
+++ b/src/armnn/layers/FloorLayer.cpp
@@ -0,0 +1,49 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "FloorLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+FloorLayer::FloorLayer(const char* name)
+ : Layer(1, 1, LayerType::Floor, name)
+{
+}
+
+std::unique_ptr<IWorkload> FloorLayer::CreateWorkload(const Graph& graph,
+    const IWorkloadFactory& factory) const
+{
+    FloorQueueDescriptor descriptor;
+    return factory.CreateFloor(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+FloorLayer* FloorLayer::Clone(Graph& graph) const
+{
+    return CloneBase<FloorLayer>(graph, GetName());
+}
+
+void FloorLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "FloorLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "FloorLayer: TensorInfo must be set on connected OutputSlot.");
+
+    // input and output shapes are the same
+    IOutputSlot* input = GetInputSlot(0).GetConnection();
+    TensorShape const& outShape = input->GetTensorInfo().GetShape();
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "FloorLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/FloorLayer.hpp b/src/armnn/layers/FloorLayer.hpp
new file mode 100644
index 0000000000..aa7f892915
--- /dev/null
+++ b/src/armnn/layers/FloorLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+class FloorLayer : public Layer
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    FloorLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    FloorLayer(const char* name);
+    ~FloorLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/FullyConnectedLayer.cpp b/src/armnn/layers/FullyConnectedLayer.cpp
new file mode 100644
index 0000000000..1597e8c2c3
--- /dev/null
+++ b/src/armnn/layers/FullyConnectedLayer.cpp
@@ -0,0 +1,69 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "FullyConnectedLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/CpuTensorHandle.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+FullyConnectedLayer::FullyConnectedLayer(const FullyConnectedDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::FullyConnected, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> FullyConnectedLayer::CreateWorkload(const Graph& graph,
+                                                               const IWorkloadFactory& factory) const
+{
+    FullyConnectedQueueDescriptor descriptor;
+
+    descriptor.m_Weight = m_Weight.get();
+    if (m_Param.m_BiasEnabled)
+    {
+        descriptor.m_Bias = m_Bias.get();
+    }
+    return factory.CreateFullyConnected(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+FullyConnectedLayer* FullyConnectedLayer::Clone(Graph& graph) const
+{
+    auto layer = CloneBase<FullyConnectedLayer>(graph, m_Param, GetName());
+
+    layer->m_Weight = m_Weight ? std::make_unique<ScopedCpuTensorHandle>(*m_Weight) : nullptr;
+    if (layer->m_Param.m_BiasEnabled)
+    {
+        layer->m_Bias = m_Bias ? std::make_unique<ScopedCpuTensorHandle>(*m_Bias) : nullptr;
+    }
+
+    return std::move(layer);
+}
+
+void FullyConnectedLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "FullyConnectedLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "FullyConnectedLayer: TensorInfo must be set on connected OutputSlot.");
+
+
+    TensorShape const& weightShape = m_Weight->GetTensorInfo().GetShape();
+
+    // output for FC is [1, w[1]]
+    unsigned int batches = GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape()[0];
+    unsigned int dimIdx = m_Param.m_TransposeWeightMatrix ? 0 : 1;
+    TensorShape outShape({batches, weightShape[dimIdx]});
+
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "FullyConnectedLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/FullyConnectedLayer.hpp b/src/armnn/layers/FullyConnectedLayer.hpp
new file mode 100644
index 0000000000..1d6cb7cf8d
--- /dev/null
+++ b/src/armnn/layers/FullyConnectedLayer.hpp
@@ -0,0 +1,32 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class ScopedCpuTensorHandle;
+
+class FullyConnectedLayer : public LayerWithParameters<FullyConnectedDescriptor>
+{
+public:
+    std::unique_ptr<ScopedCpuTensorHandle> m_Weight;
+    std::unique_ptr<ScopedCpuTensorHandle> m_Bias;
+
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    FullyConnectedLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    FullyConnectedLayer(const FullyConnectedDescriptor& param, const char* name);
+    ~FullyConnectedLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/InputLayer.cpp b/src/armnn/layers/InputLayer.cpp
new file mode 100644
index 0000000000..96f1b773f4
--- /dev/null
+++ b/src/armnn/layers/InputLayer.cpp
@@ -0,0 +1,37 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "InputLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+InputLayer::InputLayer(LayerBindingId id, const char* name)
+    : BindableLayer(0, 1, LayerType::Input, name, id)
+{
+}
+
+std::unique_ptr<IWorkload> InputLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    return nullptr;
+}
+
+InputLayer* InputLayer::Clone(Graph& graph) const
+{
+    return CloneBase<InputLayer>(graph, GetBindingId(), GetName());
+}
+
+void InputLayer::ValidateTensorShapesFromInputs()
+{
+    //The input layer should already have it's inputs set during graph building phase in the driver/parser.
+    ConditionalThrow<LayerValidationException>(GetOutputSlot(0).IsTensorInfoSet(),
+                                               "InputLayer should already have the TensorInfo set.");
+}
+
+} // namespace
diff --git a/src/armnn/layers/InputLayer.hpp b/src/armnn/layers/InputLayer.hpp
new file mode 100644
index 0000000000..24202255cb
--- /dev/null
+++ b/src/armnn/layers/InputLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+class InputLayer : public BindableLayer
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    InputLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    InputLayer(LayerBindingId id, const char* name);
+    ~InputLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/L2NormalizationLayer.cpp b/src/armnn/layers/L2NormalizationLayer.cpp
new file mode 100644
index 0000000000..07020bfdca
--- /dev/null
+++ b/src/armnn/layers/L2NormalizationLayer.cpp
@@ -0,0 +1,50 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "L2NormalizationLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+L2NormalizationLayer::L2NormalizationLayer(const char* name)
+    : Layer(1, 1, LayerType::L2Normalization, name)
+{
+}
+
+std::unique_ptr<IWorkload> L2NormalizationLayer::CreateWorkload(const Graph& graph,
+    const IWorkloadFactory& factory) const
+{
+    L2NormalizationQueueDescriptor descriptor;
+    return factory.CreateL2Normalization(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+L2NormalizationLayer* L2NormalizationLayer::Clone(Graph& graph) const
+{
+    return CloneBase<L2NormalizationLayer>(graph, GetName());
+}
+
+void L2NormalizationLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "L2NormalizationLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "L2NormalizationLayer: TensorInfo must be set on connected OutputSlot.");
+
+    IOutputSlot* input = GetInputSlot(0).GetConnection();
+
+    // input and output shapes are the same
+    TensorShape const& outShape = input->GetTensorInfo().GetShape();
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "L2NormalizationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/L2NormalizationLayer.hpp b/src/armnn/layers/L2NormalizationLayer.hpp
new file mode 100644
index 0000000000..3bea177a78
--- /dev/null
+++ b/src/armnn/layers/L2NormalizationLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+class L2NormalizationLayer : public Layer
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
+        const IWorkloadFactory& factory) const override;
+
+    L2NormalizationLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    L2NormalizationLayer(const char* name);
+    ~L2NormalizationLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/LayerCloneBase.hpp b/src/armnn/layers/LayerCloneBase.hpp
new file mode 100644
index 0000000000..fbd8629c94
--- /dev/null
+++ b/src/armnn/layers/LayerCloneBase.hpp
@@ -0,0 +1,24 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+#include <Graph.hpp>
+
+namespace armnn
+{
+
+template <typename LayerType, typename ... Params>
+LayerType* Layer::CloneBase(Graph& graph, Params&& ... params) const
+{
+    LayerType* const layer = graph.AddLayer<LayerType>(std::forward<Params>(params)...);
+
+    layer->SetComputeDevice(m_ComputeDevice);
+    layer->SetGuid(GetGuid());
+
+    return layer;
+}
+
+} // namespace
diff --git a/src/armnn/layers/LayerWithParameters.hpp b/src/armnn/layers/LayerWithParameters.hpp
new file mode 100644
index 0000000000..e3eb40a273
--- /dev/null
+++ b/src/armnn/layers/LayerWithParameters.hpp
@@ -0,0 +1,52 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+template <typename Parameters>
+class LayerWithParameters : public Layer
+{
+public:
+    using DescriptorType = Parameters;
+
+    const Parameters& GetParameters() const { return m_Param; }
+
+    /// Helper to serialize the layer parameters to string
+    /// (currently used in DotSerializer and company)
+    void SerializeLayerParameters(ParameterStringifyFunction & fn) const
+    {
+        StringifyLayerParameters<Parameters>::Serialize(fn, m_Param);
+    }
+
+protected:
+    LayerWithParameters(unsigned int numInputSlots,
+                        unsigned int numOutputSlots,
+                        LayerType type,
+                        const Parameters& param,
+                        const char* name)
+    :   Layer(numInputSlots, numOutputSlots, type, name)
+    ,   m_Param(param)
+    {
+    }
+
+    ~LayerWithParameters() = default;
+
+    /// Helper function to reduce duplication in *Layer::CreateWorkload
+    template <typename QueueDescriptor>
+    WorkloadInfo PrepInfoAndDesc(QueueDescriptor& descriptor, const Graph& graph) const
+    {
+        descriptor.m_Parameters = m_Param;
+        return Layer::PrepInfoAndDesc(descriptor, graph);
+    }
+
+    /// The parameters for the layer (not including tensor-valued weights etc.)
+    Parameters m_Param;
+};
+
+} // namespace
diff --git a/src/armnn/layers/MemCopyLayer.cpp b/src/armnn/layers/MemCopyLayer.cpp
new file mode 100644
index 0000000000..973a756b21
--- /dev/null
+++ b/src/armnn/layers/MemCopyLayer.cpp
@@ -0,0 +1,48 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "MemCopyLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+MemCopyLayer::MemCopyLayer(const char* name)
+    : Layer(1, 1, LayerType::MemCopy, name)
+{
+}
+
+MemCopyLayer* MemCopyLayer::Clone(Graph& graph) const
+{
+    return CloneBase<MemCopyLayer>(graph, GetName());
+}
+
+std::unique_ptr<IWorkload> MemCopyLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    MemCopyQueueDescriptor descriptor;
+    return factory.CreateMemCopy(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+void MemCopyLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "MemCopyLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "MemCopyLayer: TensorInfo must be set on connected OutputSlot.");
+
+
+    IOutputSlot* input = GetInputSlot(0).GetConnection();
+
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "MemCopyLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        input->GetTensorInfo().GetShape());
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/MemCopyLayer.hpp b/src/armnn/layers/MemCopyLayer.hpp
new file mode 100644
index 0000000000..cc227b1c74
--- /dev/null
+++ b/src/armnn/layers/MemCopyLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+class MemCopyLayer : public Layer
+{
+public:
+    virtual std::unique_ptr<IWorkload>
+    CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const override;
+
+    MemCopyLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    MemCopyLayer(const char* name);
+    ~MemCopyLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/MergerLayer.cpp b/src/armnn/layers/MergerLayer.cpp
new file mode 100644
index 0000000000..065fc86a1b
--- /dev/null
+++ b/src/armnn/layers/MergerLayer.cpp
@@ -0,0 +1,178 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "MergerLayer.hpp"
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+#include <queue>
+
+namespace armnn
+{
+
+MergerLayer::MergerLayer(const OriginsDescriptor& param, const char* name)
+    : LayerWithParameters(param.GetNumViews(), 1, LayerType::Merger, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> MergerLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    MergerQueueDescriptor descriptor;
+
+    // copy the view origins to the descriptor
+    descriptor.m_ViewOrigins.reserve(m_Param.GetNumViews());
+    for (unsigned int i = 0; i < m_Param.GetNumViews(); ++i)
+    {
+        descriptor.m_ViewOrigins.emplace_back(
+            std::vector<unsigned int>(m_Param.GetViewOrigin(i), m_Param.GetViewOrigin(i) + m_Param.GetNumDimensions()));
+    }
+
+    return factory.CreateMerger(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+void MergerLayer::CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory)
+{
+    //if sub tensors are supported than the merger
+    //just needs to make sure that the outputs of the prev layer
+    //are made subtensors of the output of the merger layer
+    m_OutputHandlers[0].CreateTensorHandles(factory);
+    if (factory.SupportsSubTensors())
+    {
+        std::queue<MergerLayer*> m_MergerLayers;
+
+        m_MergerLayers.push(this);
+        while (!m_MergerLayers.empty())
+        {
+            MergerLayer* currentLayer = m_MergerLayers.front();
+            ITensorHandle* parentTensor = currentLayer->GetOutputHandler(0).GetData();
+
+            m_MergerLayers.pop();
+
+            const unsigned int numInputSlots = currentLayer->GetNumInputSlots();
+            for (unsigned int i = 0; i < numInputSlots; ++i)
+            {
+                OutputSlot* slot = currentLayer->GetInputSlot(i).GetConnectedOutputSlot();
+                OutputHandler& outputHandler = slot->GetOutputHandler();
+                outputHandler.SetData(factory.CreateSubTensorHandle(*parentTensor,
+                                                                    outputHandler.GetTensorInfo().GetShape(),
+                                                                    currentLayer->m_Param.GetViewOrigin(i)));
+
+                Layer& inputLayer = slot->GetOwningLayer();
+                if (inputLayer.GetType() == LayerType::Merger)
+                {
+                    m_MergerLayers.push(boost::polymorphic_downcast<MergerLayer*>(&inputLayer));
+                }
+            }
+        }
+    }
+}
+
+MergerLayer* MergerLayer::Clone(Graph& graph) const
+{
+    return CloneBase<MergerLayer>(graph, m_Param, GetName());
+}
+
+void MergerLayer::ValidateTensorShapesFromInputs()
+{
+    // Validate Merger layer
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "MergerLayer: Num Inputs must match num views.",
+        m_Param.GetNumViews(),
+        GetNumInputSlots());
+
+    unsigned int numDims = m_Param.GetNumDimensions();
+    for (unsigned int i=0; i<GetNumInputSlots(); i++)
+    {
+        auto& inputInfo = GetInputSlot(i).GetConnection()->GetTensorInfo();
+
+        boost::ignore_unused(inputInfo);
+        ConditionalThrowIfNotEqual<LayerValidationException>(
+            "MergerLayer: Num Dimensions must match all inputs.",
+            numDims,
+            inputInfo.GetNumDimensions());
+    }
+
+    // Find the bounding box (extents) of all the views
+    std::vector<unsigned int> extentMin(numDims);
+    std::vector<unsigned int> extentMax(numDims);
+    for (unsigned int i = 0; i < GetNumInputSlots(); i++)
+    {
+        const uint32_t* origin = m_Param.GetViewOrigin(i);
+        const armnn::TensorShape& shape = GetInputSlot(i).GetConnection()->GetTensorInfo().GetShape();
+        for (unsigned int d = 0; d < numDims; d++)
+        {
+            extentMin[d] = std::min(extentMin[d], origin[d]);
+            extentMax[d] = std::max(extentMax[d], origin[d] + shape[d]);
+        }
+    }
+
+    // Check that the bounding box starts at the origin
+    if (!std::all_of(extentMin.begin(), extentMin.end(), [](unsigned int s) { return s == 0; }))
+    {
+        throw LayerValidationException("MergerLayer: there is no view that starts at the origin");
+    }
+
+    // Check that there are no overlaps of views (this would lead to undefined output at those locations).
+    // Check each pair of views against each other
+    // (and don't bother to check against self, or check the same pair both ways round)
+    for (unsigned int a = 0; a < GetNumInputSlots(); a++)
+    {
+        const uint32_t* aOrigin = m_Param.GetViewOrigin(a);
+        const armnn::TensorShape& aShape = GetInputSlot(a).GetConnection()->GetTensorInfo().GetShape();
+        for (unsigned int b = 0; b < a; b++)
+        {
+            const uint32_t* bOrigin = m_Param.GetViewOrigin(b);
+            const armnn::TensorShape& bShape = GetInputSlot(b).GetConnection()->GetTensorInfo().GetShape();
+
+            bool allAxesOverlap = true;
+            for (unsigned int d = 0; d < numDims && allAxesOverlap; d++)
+            {
+                unsigned int a1 = aOrigin[d];
+                unsigned int a2 = aOrigin[d] + aShape[d];
+
+                unsigned int b1 = bOrigin[d];
+                unsigned int b2 = bOrigin[d] + bShape[d];
+
+                if (a2 <= b1 || b2 <= a1)
+                {
+                    allAxesOverlap = false;
+                }
+            }
+            if (allAxesOverlap)
+            {
+                throw LayerValidationException("MergerLayer: Some views overlap.");
+            }
+        }
+    }
+
+    // Check that there are no "holes", i.e. regions of the output which is not covered by a view.
+    // Because we already checked that there are no overlaps, this can be done simply by checking that
+    // the total 'volume' of the views is the same as the output.
+    unsigned int totalViewsVolume = 0;
+    for (unsigned int i = 0; i < GetNumInputSlots(); i++)
+    {
+        totalViewsVolume += GetInputSlot(i).GetConnection()->GetTensorInfo().GetNumElements();
+    }
+    unsigned int outputVolume = 1;
+    for (unsigned int d = 0; d < numDims; d++)
+    {
+        outputVolume *= (extentMax[d] - extentMin[d]);
+    }
+
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "MergerLayer: there are some gaps between views",
+        totalViewsVolume,
+        outputVolume);
+
+    TensorShape outShape(numDims, extentMax.data());
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "MergerLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn armnn
diff --git a/src/armnn/layers/MergerLayer.hpp b/src/armnn/layers/MergerLayer.hpp
new file mode 100644
index 0000000000..ad94cb5f3a
--- /dev/null
+++ b/src/armnn/layers/MergerLayer.hpp
@@ -0,0 +1,28 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class MergerLayer : public LayerWithParameters<OriginsDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+    virtual void CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory) override;
+
+    MergerLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    MergerLayer(const OriginsDescriptor& param, const char* name);
+    ~MergerLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/MultiplicationLayer.cpp b/src/armnn/layers/MultiplicationLayer.cpp
new file mode 100644
index 0000000000..af40a23007
--- /dev/null
+++ b/src/armnn/layers/MultiplicationLayer.cpp
@@ -0,0 +1,71 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "MultiplicationLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+MultiplicationLayer::MultiplicationLayer(const char* name)
+    : Layer(2, 1, LayerType::Multiplication, name)
+{
+}
+
+std::unique_ptr<IWorkload> MultiplicationLayer::CreateWorkload(const Graph&            graph,
+                                                               const IWorkloadFactory& factory) const
+{
+    MultiplicationQueueDescriptor descriptor;
+
+    return factory.CreateMultiplication(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+MultiplicationLayer* MultiplicationLayer::Clone(Graph& graph) const
+{
+    return CloneBase<MultiplicationLayer>(graph, GetName());
+}
+
+void MultiplicationLayer::ValidateTensorShapesFromInputs()
+{
+    auto& input0 = GetInputSlot(0).GetConnection()->GetTensorInfo();
+    auto& input1 = GetInputSlot(1).GetConnection()->GetTensorInfo();
+
+    // Get the max of the inputs
+    BOOST_ASSERT(input0.GetNumDimensions() == input1.GetNumDimensions());
+    unsigned int numDims = input0.GetNumDimensions();
+    std::vector<unsigned int> dims(numDims);
+
+    // validate inputs are broadcast compatible
+#if !NDEBUG
+    for (unsigned int i = 0; i < numDims; i++)
+    {
+        unsigned int dim0 = input0.GetShape()[i];
+        unsigned int dim1 = input1.GetShape()[i];
+        if (dim0 != dim1)
+        {
+            BOOST_ASSERT_MSG(dim0 == 1 || dim1 == 1, "Dimensions should either match or one should be of size 1.");
+        }
+    }
+#endif
+
+    for (unsigned int i = 0; i < numDims; i++)
+    {
+        unsigned int dim0 = input0.GetShape()[i];
+        unsigned int dim1 = input1.GetShape()[i];
+        dims[i] = std::max(dim0, dim1);
+    }
+
+    TensorShape outShape(numDims, dims.data());
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "MultiplicationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/MultiplicationLayer.hpp b/src/armnn/layers/MultiplicationLayer.hpp
new file mode 100644
index 0000000000..48db9f4d01
--- /dev/null
+++ b/src/armnn/layers/MultiplicationLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+class MultiplicationLayer : public Layer
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    MultiplicationLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    MultiplicationLayer(const char* name);
+    ~MultiplicationLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/NormalizationLayer.cpp b/src/armnn/layers/NormalizationLayer.cpp
new file mode 100644
index 0000000000..cacd348444
--- /dev/null
+++ b/src/armnn/layers/NormalizationLayer.cpp
@@ -0,0 +1,44 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "NormalizationLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+NormalizationLayer::NormalizationLayer(const NormalizationDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::Normalization, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> NormalizationLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    NormalizationQueueDescriptor descriptor;
+    return factory.CreateNormalization(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+NormalizationLayer* NormalizationLayer::Clone(Graph& graph) const
+{
+    return CloneBase<NormalizationLayer>(graph, m_Param, GetName());
+}
+
+void NormalizationLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                                               "NormalizationLayer: Input slot must be connected.");
+
+    const TensorShape& outShape = GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape();
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "NormalizationLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/NormalizationLayer.hpp b/src/armnn/layers/NormalizationLayer.hpp
new file mode 100644
index 0000000000..c87fbe6451
--- /dev/null
+++ b/src/armnn/layers/NormalizationLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class NormalizationLayer : public LayerWithParameters<NormalizationDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    NormalizationLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    NormalizationLayer(const NormalizationDescriptor& param, const char* name);
+    ~NormalizationLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/OutputLayer.cpp b/src/armnn/layers/OutputLayer.cpp
new file mode 100644
index 0000000000..cadcf2da2f
--- /dev/null
+++ b/src/armnn/layers/OutputLayer.cpp
@@ -0,0 +1,37 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "OutputLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+OutputLayer::OutputLayer(LayerBindingId id, const char* name)
+    : BindableLayer(1, 0, LayerType::Output, name, id)
+{
+}
+
+std::unique_ptr<IWorkload> OutputLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    return nullptr;
+}
+
+OutputLayer* OutputLayer::Clone(Graph& graph) const
+{
+    return CloneBase<OutputLayer>(graph, GetBindingId(), GetName());
+}
+
+void OutputLayer::ValidateTensorShapesFromInputs()
+{
+    // Just validate the input is connected
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                                               "OutputLayer: Input slot must be connected.");
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/OutputLayer.hpp b/src/armnn/layers/OutputLayer.hpp
new file mode 100644
index 0000000000..a2e11e5d26
--- /dev/null
+++ b/src/armnn/layers/OutputLayer.hpp
@@ -0,0 +1,31 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include <Layer.hpp>
+
+namespace armnn
+{
+
+class OutputLayer : public BindableLayer
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+    virtual void CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory) override
+    {
+        boost::ignore_unused(graph, factory);
+    }
+
+    OutputLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    OutputLayer(LayerBindingId id, const char* name);
+    ~OutputLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/PermuteLayer.cpp b/src/armnn/layers/PermuteLayer.cpp
new file mode 100644
index 0000000000..35692756a1
--- /dev/null
+++ b/src/armnn/layers/PermuteLayer.cpp
@@ -0,0 +1,49 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "PermuteLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+#include <Permute.hpp>
+
+namespace armnn
+{
+
+PermuteLayer::PermuteLayer(const PermuteDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::Permute, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> PermuteLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    PermuteQueueDescriptor descriptor;
+    return factory.CreatePermute(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+PermuteLayer* PermuteLayer::Clone(Graph& graph) const
+{
+    return CloneBase<PermuteLayer>(graph, m_Param, GetName());
+}
+
+void PermuteLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "PermuteLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "PermuteLayer: TensorInfo must be set on connected InputSlot.");
+
+    const TensorInfo& infoIn = GetInputSlot(0).GetConnection()->GetTensorInfo();
+    TensorShape shapeOut = armnnUtils::Permuted(infoIn.GetShape(), m_Param.m_DimMappings);
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "PermuteLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        shapeOut);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/PermuteLayer.hpp b/src/armnn/layers/PermuteLayer.hpp
new file mode 100644
index 0000000000..c060a16390
--- /dev/null
+++ b/src/armnn/layers/PermuteLayer.hpp
@@ -0,0 +1,44 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class PermuteLayer : public LayerWithParameters<PermuteDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    PermuteLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+    const PermutationVector& GetPermutation() const
+    {
+        return m_Param.m_DimMappings;
+    }
+
+    bool IsInverse(const Layer& other) const
+    {
+        return (other.GetType() == LayerType::Permute) &&
+            GetPermutation().IsInverse(boost::polymorphic_downcast<const PermuteLayer*>(&other)->GetPermutation());
+    }
+
+    bool IsEqual(const Layer& other) const
+    {
+        return (other.GetType() == LayerType::Permute) &&
+               GetPermutation().IsEqual(boost::polymorphic_downcast<const PermuteLayer*>(&other)->GetPermutation());
+    }
+
+protected:
+    PermuteLayer(const PermuteDescriptor& param, const char* name);
+    ~PermuteLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/Pooling2dLayer.cpp b/src/armnn/layers/Pooling2dLayer.cpp
new file mode 100644
index 0000000000..ede37d7604
--- /dev/null
+++ b/src/armnn/layers/Pooling2dLayer.cpp
@@ -0,0 +1,106 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "Pooling2dLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+Pooling2dLayer::Pooling2dLayer(const Pooling2dDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::Pooling2d, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> Pooling2dLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    Pooling2dQueueDescriptor descriptor;
+    return factory.CreatePooling2d(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+Pooling2dLayer* Pooling2dLayer::Clone(Graph& graph) const
+{
+    return CloneBase<Pooling2dLayer>(graph, m_Param, GetName());
+}
+
+void Pooling2dLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "Pooling2dLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "Pooling2dLayer: TensorInfo must be set on connected InputSlot.");
+
+    IOutputSlot* input = GetInputSlot(0).GetConnection();
+    const TensorShape& inputShape = input->GetTensorInfo().GetShape();
+
+    // If we support multiple batch dimensions in the future, then this assert will need to change.
+    BOOST_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Pooling2dLayer will always have 4D input.");
+
+
+    unsigned int inWidth = inputShape[3];
+    unsigned int inHeight = inputShape[2];
+    unsigned int inChannels = inputShape[1];
+    unsigned int inBatchSize = inputShape[0];
+
+    bool isGlobalPooling = (m_Param.m_StrideX==0 && m_Param.m_StrideY==0);
+    unsigned int outWidth = 1;
+    unsigned int outHeight = 1;
+    if (!isGlobalPooling)
+    {
+        BOOST_ASSERT_MSG(m_Param.m_StrideX!=0 && m_Param.m_StrideY!=0,
+                         "Stride can only be zero when performing global pooling");
+
+        auto CalcSize = [](auto inSize, auto lowPad, auto highPad, auto poolSize, auto stride, auto padMethod,
+                           auto outputShapeRounding)
+            {
+                unsigned int readSize = inSize + lowPad + highPad - poolSize;
+                float div = static_cast<float>(readSize) / static_cast<float>(stride);
+
+                unsigned int size = 0;
+                switch (outputShapeRounding)
+                {
+                    case OutputShapeRounding::Ceiling:
+                        size = static_cast<unsigned int>(ceil(div)) + 1;
+                        break;
+                    case OutputShapeRounding ::Floor:
+                        size = static_cast<unsigned int>(floor(div)) + 1;
+                        break;
+                    default:
+                        BOOST_ASSERT_MSG(false, "Unsupported Output Shape Rounding");
+                }
+
+                // Make sure that border operations will start from inside the input and not the padded area
+                // This is what both Caffe and CL does...
+                if ((size - 1)*stride >= inSize + lowPad)
+                {
+                    --size;
+                }
+
+                return size;
+            };
+
+        outWidth = CalcSize(inWidth, m_Param.m_PadLeft, m_Param.m_PadRight, m_Param.m_PoolWidth, m_Param.m_StrideX,
+                            m_Param.m_PaddingMethod, m_Param.m_OutputShapeRounding);
+        outHeight= CalcSize(inHeight, m_Param.m_PadTop, m_Param.m_PadBottom, m_Param.m_PoolHeight, m_Param.m_StrideY,
+                            m_Param.m_PaddingMethod, m_Param.m_OutputShapeRounding);
+
+
+    }
+    unsigned int outChannels = inChannels;
+    unsigned int outBatchSize = inBatchSize;
+
+    TensorShape shapeOut({outBatchSize, outChannels, outHeight, outWidth});
+
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "Pooling2dLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        shapeOut);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/Pooling2dLayer.hpp b/src/armnn/layers/Pooling2dLayer.hpp
new file mode 100644
index 0000000000..af39dbb5ec
--- /dev/null
+++ b/src/armnn/layers/Pooling2dLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class SoftmaxLayer : public LayerWithParameters<SoftmaxDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    SoftmaxLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    SoftmaxLayer(const SoftmaxDescriptor& param, const char* name);
+    ~SoftmaxLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/ReshapeLayer.cpp b/src/armnn/layers/ReshapeLayer.cpp
new file mode 100644
index 0000000000..df5d9d5bb0
--- /dev/null
+++ b/src/armnn/layers/ReshapeLayer.cpp
@@ -0,0 +1,46 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "ReshapeLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+ReshapeLayer::ReshapeLayer(const ReshapeDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::Reshape, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> ReshapeLayer::CreateWorkload(const Graph& graph,
+    const IWorkloadFactory& factory) const
+{
+    ReshapeQueueDescriptor descriptor;
+    return factory.CreateReshape(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+ReshapeLayer* ReshapeLayer::Clone(Graph& graph) const
+{
+    return CloneBase<ReshapeLayer>(graph, m_Param, GetName());
+}
+
+void ReshapeLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "ReshapeLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "ReshapeLayer: TensorInfo must be set on connected OutputSlot.");
+
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "ReshapeLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        m_Param.m_TargetShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/ReshapeLayer.hpp b/src/armnn/layers/ReshapeLayer.hpp
new file mode 100644
index 0000000000..8a3cf3a698
--- /dev/null
+++ b/src/armnn/layers/ReshapeLayer.hpp
@@ -0,0 +1,33 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class ReshapeLayer : public LayerWithParameters<ReshapeDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph& graph,
+        const IWorkloadFactory& factory) const override;
+
+    ReshapeLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+    bool IsEqual(const Layer& other) const
+    {
+        return (other.GetType() == LayerType::Reshape) &&
+               m_Param.m_TargetShape == boost::polymorphic_downcast<const ReshapeLayer*>(&other)->m_Param.m_TargetShape;
+    }
+
+protected:
+    ReshapeLayer(const ReshapeDescriptor& desc, const char* name);
+    ~ReshapeLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/ResizeBilinearLayer.cpp b/src/armnn/layers/ResizeBilinearLayer.cpp
new file mode 100644
index 0000000000..204d5afae8
--- /dev/null
+++ b/src/armnn/layers/ResizeBilinearLayer.cpp
@@ -0,0 +1,52 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "ResizeBilinearLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+ResizeBilinearLayer::ResizeBilinearLayer(const ResizeBilinearDescriptor& param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::ResizeBilinear, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> ResizeBilinearLayer::CreateWorkload(const Graph& graph,
+                                                               const IWorkloadFactory& factory) const
+{
+    ResizeBilinearQueueDescriptor descriptor;
+    return factory.CreateResizeBilinear(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+ResizeBilinearLayer* ResizeBilinearLayer::Clone(Graph& graph) const
+{
+    return CloneBase<ResizeBilinearLayer>(graph, m_Param, GetName());
+}
+
+void ResizeBilinearLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                     "MemCopyLayer: InputSlot must be connected to an OutputSlot");
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection()->IsTensorInfoSet(),
+                     "MemCopyLayer: TensorInfo must be set on connected OutputSlot.");
+
+    const TensorShape& inputShape = GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape();
+    unsigned int outWidth = m_Param.m_TargetWidth;
+    unsigned int outHeight = m_Param.m_TargetHeight;
+    unsigned int outChannels = inputShape[1];
+    unsigned int outBatch = inputShape[0];
+    TensorShape outShape({outBatch, outChannels, outHeight, outWidth});
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "ResizeBilinearLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/ResizeBilinearLayer.hpp b/src/armnn/layers/ResizeBilinearLayer.hpp
new file mode 100644
index 0000000000..2cefedb0b8
--- /dev/null
+++ b/src/armnn/layers/ResizeBilinearLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class ResizeBilinearLayer : public LayerWithParameters<ResizeBilinearDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload>
+        CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const override;
+
+    ResizeBilinearLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    ResizeBilinearLayer(const ResizeBilinearDescriptor& param, const char* name);
+    ~ResizeBilinearLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/SoftmaxLayer.cpp b/src/armnn/layers/SoftmaxLayer.cpp
new file mode 100644
index 0000000000..2bd0c1d106
--- /dev/null
+++ b/src/armnn/layers/SoftmaxLayer.cpp
@@ -0,0 +1,44 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "SoftmaxLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+SoftmaxLayer::SoftmaxLayer(const SoftmaxDescriptor &param, const char* name)
+    : LayerWithParameters(1, 1, LayerType::Softmax, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> SoftmaxLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    SoftmaxQueueDescriptor descriptor;
+    return factory.CreateSoftmax(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+SoftmaxLayer* SoftmaxLayer::Clone(Graph& graph) const
+{
+    return CloneBase<SoftmaxLayer>(graph, m_Param, GetName());
+}
+
+void SoftmaxLayer::ValidateTensorShapesFromInputs()
+{
+    ConditionalThrow<LayerValidationException>(GetInputSlot(0).GetConnection() != nullptr,
+                                               "SoftmaxLayer: Input slot must be connected.");
+
+    const TensorShape& outShape = GetInputSlot(0).GetConnection()->GetTensorInfo().GetShape();
+    ConditionalThrowIfNotEqual<LayerValidationException>(
+        "SoftmaxLayer: TensorShape set on OutputSlot[0] does not match the inferred shape.",
+        GetOutputSlot(0).GetTensorInfo().GetShape(),
+        outShape);
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/SoftmaxLayer.hpp b/src/armnn/layers/SoftmaxLayer.hpp
new file mode 100644
index 0000000000..ff60a08a91
--- /dev/null
+++ b/src/armnn/layers/SoftmaxLayer.hpp
@@ -0,0 +1,27 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class Pooling2dLayer : public LayerWithParameters<Pooling2dDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+
+    Pooling2dLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    Pooling2dLayer(const Pooling2dDescriptor& param, const char* name);
+    ~Pooling2dLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/layers/SplitterLayer.cpp b/src/armnn/layers/SplitterLayer.cpp
new file mode 100644
index 0000000000..630921e4d8
--- /dev/null
+++ b/src/armnn/layers/SplitterLayer.cpp
@@ -0,0 +1,81 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#include "SplitterLayer.hpp"
+
+#include "LayerCloneBase.hpp"
+
+#include <armnn/TypesUtils.hpp>
+#include <backends/WorkloadData.hpp>
+#include <backends/WorkloadFactory.hpp>
+
+namespace armnn
+{
+
+SplitterLayer::SplitterLayer(const ViewsDescriptor& param, const char* name)
+    : LayerWithParameters(1, param.GetNumViews(), LayerType::Splitter, param, name)
+{
+}
+
+std::unique_ptr<IWorkload> SplitterLayer::CreateWorkload(const Graph& graph, const IWorkloadFactory& factory) const
+{
+    SplitterQueueDescriptor descriptor;
+
+    // copy the window origins to the descriptor
+    for (unsigned int i = 0; i < m_Param.GetNumViews(); ++i)
+    {
+        descriptor.m_ViewOrigins.emplace_back(
+            std::vector<unsigned int>(m_Param.GetViewOrigin(i), m_Param.GetViewOrigin(i) + m_Param.GetNumDimensions()));
+    }
+
+    return factory.CreateSplitter(descriptor, PrepInfoAndDesc(descriptor, graph));
+}
+
+void SplitterLayer::CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory)
+{
+    //if sub tensors are supported than all the "splitter" need to do is to
+    //set the outputs to be appropriate sub tensors of the input.
+    if (factory.SupportsSubTensors())
+    {
+        const OutputHandler& outputHandler = GetInputSlots()[0].GetConnectedOutputSlot()->GetOutputHandler();
+
+        ITensorHandle* inputData = outputHandler.GetData();
+        //create the outputs as subtensors of the input
+        for (unsigned int i = 0; i < m_Param.GetNumViews(); ++i)
+        {
+            m_OutputHandlers[i].SetData(factory.CreateSubTensorHandle(*inputData,
+                                                                      m_OutputHandlers[i].GetTensorInfo().GetShape(),
+                                                                      m_Param.GetViewOrigin(i)));
+        }
+    }
+    else
+    {
+        for (unsigned int i = 0; i < m_Param.GetNumViews(); ++i)
+        {
+            m_OutputHandlers[i].CreateTensorHandles(factory);
+        }
+    }
+}
+
+SplitterLayer* SplitterLayer::Clone(Graph& graph) const
+{
+    return CloneBase<SplitterLayer>(graph, m_Param, GetName());
+}
+
+void SplitterLayer::ValidateTensorShapesFromInputs()
+{
+    //Output shapes must match View shapes.
+    for (unsigned int viewIdx = 0; viewIdx < m_Param.GetNumViews(); viewIdx++)
+    {
+        const uint32_t* sizes = m_Param.GetViewSizes(viewIdx);
+
+        TensorShape outShape(m_Param.GetNumDimensions(), sizes);
+        ConditionalThrowIfNotEqual<LayerValidationException>(
+            "SplitterLayer: View sizes must match output tensor shapes.",
+            GetOutputSlot(viewIdx).GetTensorInfo().GetShape(),
+            outShape);
+    }
+}
+
+} // namespace armnn
diff --git a/src/armnn/layers/SplitterLayer.hpp b/src/armnn/layers/SplitterLayer.hpp
new file mode 100644
index 0000000000..7e5bbd2668
--- /dev/null
+++ b/src/armnn/layers/SplitterLayer.hpp
@@ -0,0 +1,28 @@
+//
+// Copyright © 2017 Arm Ltd. All rights reserved.
+// See LICENSE file in the project root for full license information.
+//
+#pragma once
+
+#include "LayerWithParameters.hpp"
+
+namespace armnn
+{
+
+class SplitterLayer : public LayerWithParameters<ViewsDescriptor>
+{
+public:
+    virtual std::unique_ptr<IWorkload> CreateWorkload(const Graph&            graph,
+                                                      const IWorkloadFactory& factory) const override;
+    virtual void CreateTensorHandles(Graph& graph, const IWorkloadFactory& factory) override;
+
+    SplitterLayer* Clone(Graph& graph) const override;
+
+    void ValidateTensorShapesFromInputs() override;
+
+protected:
+    SplitterLayer(const ViewsDescriptor& param, const char* name);
+    ~SplitterLayer() = default;
+};
+
+} // namespace
diff --git a/src/armnn/test/CreateWorkload.hpp b/src/armnn/test/CreateWorkload.hpp
index d8aa208eb7..c3f4b8a1bf 100644
--- a/src/armnn/test/CreateWorkload.hpp
+++ b/src/armnn/test/CreateWorkload.hpp
@@ -9,7 +9,6 @@
 #include <boost/cast.hpp>
 
 #include "backends/WorkloadData.hpp"
-#include "Layers.hpp"
 #include "Graph.hpp"
 
 #include <utility>
@@ -541,10 +540,16 @@ std::unique_ptr<SplitterWorkload>
     CreateSplitterWorkloadTest(armnn::IWorkloadFactory& factory, armnn::Graph& graph)
 {
     // create the layer we're testing
-    ViewsDescriptor layerDesc(3, 2);
-    layerDesc.SetViewOriginCoord(0, 1, 2); // deliberately add these in a weird order
-    layerDesc.SetViewOriginCoord(2, 1, 0);
-    layerDesc.SetViewOriginCoord(1, 1, 3);
+    // NOTE: need three dimensions channels, height/y, width/x because the Compute
+    //       library restricts subtensors to have the same x and y dimensions as
+    //       their parent tensors, and therefore the origin on the x and y dimension
+    //       has to be zero for any view. So we need a third dimension to split...
+    // NOTE: arguments are: number of views, number of dimensions
+    ViewsDescriptor layerDesc(3, 3);
+    // NOTE: arguments are: view, dimension, value
+    layerDesc.SetViewOriginCoord(0, 0, 0);
+    layerDesc.SetViewOriginCoord(1, 0, 1);
+    layerDesc.SetViewOriginCoord(2, 0, 3);
 
     Layer* const layer = graph.AddLayer<SplitterLayer>(layerDesc, "layer");
 
@@ -555,15 +560,16 @@ std::unique_ptr<SplitterWorkload>
     Layer* const output2 = graph.AddLayer<OutputLayer>(2, "output2");
 
     // connect up
-    armnn::TensorInfo tensorInfo({1, 7}, SplitterWorkload::ms_DataType);
+    armnn::TensorInfo tensorInfo({5, 7, 7}, SplitterWorkload::ms_DataType);
     Connect(input, layer, tensorInfo);
 
-    armnn::TensorInfo output0Info({1, 2}, SplitterWorkload::ms_DataType);
-    armnn::TensorInfo output1Info({1, 1}, SplitterWorkload::ms_DataType);
-    armnn::TensorInfo output2Info({1, 4}, SplitterWorkload::ms_DataType);
-    Connect(layer, output1, output1Info, 1, 0); // deliberately connect these up in a weird order
-    Connect(layer, output0, output0Info, 2, 0);
-    Connect(layer, output2, output2Info, 0, 0);
+    armnn::TensorInfo output0Info({1, 7, 7}, SplitterWorkload::ms_DataType);
+    armnn::TensorInfo output1Info({2, 7, 7}, SplitterWorkload::ms_DataType);
+    armnn::TensorInfo output2Info({2, 7, 7}, SplitterWorkload::ms_DataType);
+
+    Connect(layer, output0, output0Info, 0, 0);
+    Connect(layer, output1, output1Info, 1, 0);
+    Connect(layer, output2, output2Info, 2, 0);
 
     CreateTensorHandles(graph, factory);
 
@@ -576,11 +582,14 @@ std::unique_ptr<SplitterWorkload>
     BOOST_TEST(queueDescriptor.m_ViewOrigins.size() == 3);
 
     BOOST_TEST(queueDescriptor.m_ViewOrigins[0].m_Origin[0] == 0);
-    BOOST_TEST(queueDescriptor.m_ViewOrigins[1].m_Origin[0] == 0);
-    BOOST_TEST(queueDescriptor.m_ViewOrigins[2].m_Origin[0] == 0);
-    BOOST_TEST(queueDescriptor.m_ViewOrigins[0].m_Origin[1] == 2);
-    BOOST_TEST(queueDescriptor.m_ViewOrigins[1].m_Origin[1] == 3);
+    BOOST_TEST(queueDescriptor.m_ViewOrigins[1].m_Origin[0] == 1);
+    BOOST_TEST(queueDescriptor.m_ViewOrigins[2].m_Origin[0] == 3);
+    BOOST_TEST(queueDescriptor.m_ViewOrigins[0].m_Origin[1] == 0);
+    BOOST_TEST(queueDescriptor.m_ViewOrigins[1].m_Origin[1] == 0);
     BOOST_TEST(queueDescriptor.m_ViewOrigins[2].m_Origin[1] == 0);
+    BOOST_TEST(queueDescriptor.m_ViewOrigins[0].m_Origin[2] == 0);
+    BOOST_TEST(queueDescriptor.m_ViewOrigins[1].m_Origin[2] == 0);
+    BOOST_TEST(queueDescriptor.m_ViewOrigins[2].m_Origin[2] == 0);
 
     // return so we can do extra, backend-specific tests
     return workload;
@@ -594,9 +603,10 @@ std::pair<std::unique_ptr<SplitterWorkload>, std::unique_ptr<MergerWorkload>>
     static_assert(SplitterWorkload::ms_DataType == MergerWorkload::ms_DataType,
         "Splitter and merger workloads must have the same data type");
 
-    armnn::TensorInfo inputTensorInfo({ 1, 1, 100, 10 }, SplitterWorkload::ms_DataType);
-    armnn::TensorInfo splitTensorInfo1({ 1, 1, 60, 10 }, SplitterWorkload::ms_DataType);
-    armnn::TensorInfo splitTensorInfo2({ 1, 1, 40, 10 }, SplitterWorkload::ms_DataType);
+    armnn::TensorInfo inputTensorInfo({ 1, 2, 100, 10 }, SplitterWorkload::ms_DataType);
+
+    armnn::TensorInfo splitTensorInfo1({ 1, 1, 100, 10 }, SplitterWorkload::ms_DataType);
+    armnn::TensorInfo splitTensorInfo2({ 1, 1, 100, 10 }, SplitterWorkload::ms_DataType);
 
     //construct the  graph
     Layer* const input = graph.AddLayer<InputLayer>(0, "input");
@@ -608,37 +618,46 @@ std::pair<std::unique_ptr<SplitterWorkload>, std::unique_ptr<MergerWorkload>>
     splitterViews.SetViewOriginCoord(0, 3, 0);
 
     splitterViews.SetViewOriginCoord(1, 0, 0);
-    splitterViews.SetViewOriginCoord(1, 1, 0);
-    splitterViews.SetViewOriginCoord(1, 2, 60);
+    splitterViews.SetViewOriginCoord(1, 1, 1);
+    splitterViews.SetViewOriginCoord(1, 2, 0);
     splitterViews.SetViewOriginCoord(1, 3, 0);
 
     Layer* const splitter = graph.AddLayer<SplitterLayer>(splitterViews, "splitter");
+    BOOST_TEST_CHECKPOINT("created splitter layer");
 
     armnn::OriginsDescriptor mergerViews(2);
     mergerViews.SetViewOriginCoord(0, 0, 0);
-    mergerViews.SetViewOriginCoord(0, 1, 0);
+    mergerViews.SetViewOriginCoord(0, 1, 1);
     mergerViews.SetViewOriginCoord(0, 2, 0);
     mergerViews.SetViewOriginCoord(0, 3, 0);
 
     mergerViews.SetViewOriginCoord(1, 0, 0);
     mergerViews.SetViewOriginCoord(1, 1, 0);
-    mergerViews.SetViewOriginCoord(1, 2, 40);
+    mergerViews.SetViewOriginCoord(1, 2, 0);
     mergerViews.SetViewOriginCoord(1, 3, 0);
 
     Layer* const merger = graph.AddLayer<MergerLayer>(mergerViews, "merger");
+    BOOST_TEST_CHECKPOINT("created merger layer");
 
     Layer* const output = graph.AddLayer<OutputLayer>(0, "output");
 
     // add connections
     Connect(input, splitter, inputTensorInfo, 0, 0);
+    BOOST_TEST_CHECKPOINT("connect input to splitter");
     Connect(splitter, merger, splitTensorInfo1, 0, 1); // The splitter & merger are connected up
+    BOOST_TEST_CHECKPOINT("connect splitter[0] to merger[1]");
     Connect(splitter, merger, splitTensorInfo2, 1, 0); // so that the outputs are flipped round
+    BOOST_TEST_CHECKPOINT("connect splitter[1] to merger[0]");
     Connect(merger, output, inputTensorInfo, 0, 0);
+    BOOST_TEST_CHECKPOINT("connect merger to output");
 
     CreateTensorHandles(graph, factory);
+    BOOST_TEST_CHECKPOINT("created tensor handles");
 
     auto workloadSplitter = MakeAndCheckWorkload<SplitterWorkload>(*splitter, graph, factory);
+    BOOST_TEST_CHECKPOINT("created splitter workload");
     auto workloadMerger = MakeAndCheckWorkload<MergerWorkload>(*merger, graph, factory);
+    BOOST_TEST_CHECKPOINT("created merger workload");
 
     return {std::move(workloadSplitter), std::move(workloadMerger)};
 }
@@ -657,22 +676,23 @@ void CreateSplitterMultipleInputsOneOutputWorkloadTest(armnn::IWorkloadFactory&
     static_assert(SplitterWorkload::ms_DataType == ActivationWorkload::ms_DataType,
         "Splitter and activation workloads must have the same data type");
 
-    armnn::TensorInfo inputTensorInfo({ 1, 1, 100, 10 }, SplitterWorkload::ms_DataType);
-    armnn::TensorInfo splitTensorInfo1({ 1, 1, 60, 10 }, SplitterWorkload::ms_DataType);
-    armnn::TensorInfo splitTensorInfo2({ 1, 1, 40, 10 }, SplitterWorkload::ms_DataType);
+    armnn::TensorInfo inputTensorInfo ({ 1, 3, 100, 50 }, SplitterWorkload::ms_DataType);
+    armnn::TensorInfo splitTensorInfo1({ 1, 1, 100, 50 }, SplitterWorkload::ms_DataType);
+    armnn::TensorInfo splitTensorInfo2({ 1, 2, 100, 50 }, SplitterWorkload::ms_DataType);
 
     //construct the  graph
     Layer* const input = graph.AddLayer<InputLayer>(0, "input");
 
     armnn::ViewsDescriptor splitterViews(2);
+
     splitterViews.SetViewOriginCoord(0, 0, 0);
     splitterViews.SetViewOriginCoord(0, 1, 0);
     splitterViews.SetViewOriginCoord(0, 2, 0);
     splitterViews.SetViewOriginCoord(0, 3, 0);
 
     splitterViews.SetViewOriginCoord(1, 0, 0);
-    splitterViews.SetViewOriginCoord(1, 1, 0);
-    splitterViews.SetViewOriginCoord(1, 2, 60);
+    splitterViews.SetViewOriginCoord(1, 1, 1);
+    splitterViews.SetViewOriginCoord(1, 2, 0);
     splitterViews.SetViewOriginCoord(1, 3, 0);
 
     Layer* const splitter = graph.AddLayer<SplitterLayer>(splitterViews, "splitter");
diff --git a/src/armnn/test/EndToEndTest.cpp b/src/armnn/test/EndToEndTest.cpp
index 77a1f071a8..5ed84d22d0 100644
--- a/src/armnn/test/EndToEndTest.cpp
+++ b/src/armnn/test/EndToEndTest.cpp
@@ -75,7 +75,8 @@ BOOST_AUTO_TEST_CASE(Unsigned8)
 
     // load it into the runtime
     NetworkId netId;
-    runtime->LoadNetwork(netId, std::move(optNet));
+    auto error = runtime->LoadNetwork(netId, std::move(optNet));
+    BOOST_TEST(error == Status::Success);
 
     // create structures for input & output
     std::vector<uint8_t> inputData
diff --git a/src/armnn/test/GraphTests.cpp b/src/armnn/test/GraphTests.cpp
index 473cda1247..99789e4737 100644
--- a/src/armnn/test/GraphTests.cpp
+++ b/src/armnn/test/GraphTests.cpp
@@ -7,7 +7,6 @@
 #include "armnn/ArmNN.hpp"
 #include "Graph.hpp"
 #include "Layer.hpp"
-#include "Layers.hpp"
 #include "armnn/TypesUtils.hpp"
 #include "armnn/Exceptions.hpp"
 
@@ -326,8 +325,7 @@ static void TestGraphAfterAddingCopyLayers(const armnn::Graph& graph, const armn
                 {
                     BOOST_ERROR("An edge (" << adjEdge.first << ", " << adjEdge.second <<") is adjacent to an edge "
                                 "connecting a layer and a copy layer, (" << edge.first << ", " << edge.second << "), "
-                                "but the non-copy layer in the former, '" << adjLayer->GetName() << "' does not "
-                                "correspond to a layer");
+                                "but the non-copy layer in the former does not correspond to a layer");
                     continue;
                 }
 
diff --git a/src/armnn/test/RuntimeTests.cpp b/src/armnn/test/RuntimeTests.cpp
index e42d71c37d..fcb0a1e7c2 100644
--- a/src/armnn/test/RuntimeTests.cpp
+++ b/src/armnn/test/RuntimeTests.cpp
@@ -10,13 +10,13 @@
 #include "armnn/INetwork.hpp"
 #include "armnn/Descriptors.hpp"
 #include "Runtime.hpp"
+#include "HeapProfiling.hpp"
+#include "LeakChecking.hpp"
 
 #ifdef WITH_VALGRIND
 #include "valgrind/memcheck.h"
 #endif
 
-#include <boost/core/ignore_unused.hpp>
-
 namespace armnn
 {
 
@@ -52,6 +52,141 @@ BOOST_AUTO_TEST_CASE(RuntimeUnloadNetwork)
     BOOST_TEST(runtime->UnloadNetwork(networkIdentifier1) == armnn::Status::Failure);
 }
 
+// Note: the current builds we don't do valgrind and gperftools based leak checking at the same
+//       time, so in practice WITH_VALGRIND and ARMNN_LEAK_CHECKING_ENABLED are exclusive. In
+//       the future the gperftools based leak checking should stay and the valgrind based should
+//       be removed.
+
+#if ARMNN_LEAK_CHECKING_ENABLED
+void CreateAndDropDummyNetwork(armnn::Runtime & runtime)
+{
+    armnn::NetworkId networkIdentifier;
+    {
+        armnn::TensorInfo inputTensorInfo(armnn::TensorShape({ 7, 7 }), armnn::DataType::Float32);
+        armnn::TensorInfo outputTensorInfo(armnn::TensorShape({ 7, 7 }), armnn::DataType::Float32);
+
+        armnn::INetworkPtr network(armnn::INetwork::Create());
+
+        armnn::IConnectableLayer* input = network->AddInputLayer(0, "input");
+        armnn::IConnectableLayer* layer = network->AddActivationLayer(armnn::ActivationDescriptor(), "test");
+        armnn::IConnectableLayer* output = network->AddOutputLayer(0, "output");
+
+        input->GetOutputSlot(0).Connect(layer->GetInputSlot(0));
+        layer->GetOutputSlot(0).Connect(output->GetInputSlot(0));
+
+        // set the tensors in the network
+        input->GetOutputSlot(0).SetTensorInfo(inputTensorInfo);
+        layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
+
+        // optimize the network
+        armnn::IOptimizedNetworkPtr optNet = Optimize(*network, runtime.GetDeviceSpec());
+
+        runtime.LoadNetwork(networkIdentifier, std::move(optNet));
+    }
+
+    runtime.UnloadNetwork(networkIdentifier);
+}
+
+BOOST_AUTO_TEST_CASE(RuntimeHeapMemoryUsageSanityChecks)
+{
+    BOOST_TEST(ARMNN_LEAK_CHECKER_IS_ACTIVE());
+    {
+        ARMNN_SCOPED_LEAK_CHECKER("Sanity_Check_Outer");
+        {
+            ARMNN_SCOPED_LEAK_CHECKER("Sanity_Check_Inner");
+            std::unique_ptr<char[]> dummyAllocation(new char[1000]);
+            BOOST_TEST(ARMNN_NO_LEAKS_IN_SCOPE() == false);
+            BOOST_TEST(ARMNN_BYTES_LEAKED_IN_SCOPE() >= 1000);
+            BOOST_TEST(ARMNN_OBJECTS_LEAKED_IN_SCOPE() >= 1);
+        }
+        BOOST_TEST(ARMNN_NO_LEAKS_IN_SCOPE());
+        BOOST_TEST(ARMNN_BYTES_LEAKED_IN_SCOPE() == 0);
+        BOOST_TEST(ARMNN_OBJECTS_LEAKED_IN_SCOPE() == 0);
+    }
+}
+
+#ifdef ARMCOMPUTECL_ENABLED
+BOOST_AUTO_TEST_CASE(RuntimeMemoryLeaksGpuAcc)
+{
+    BOOST_TEST(ARMNN_LEAK_CHECKER_IS_ACTIVE());
+
+    armnn::Runtime runtime(armnn::Compute::GpuAcc);
+    armnn::RuntimeLoadedNetworksReserve(&runtime);
+
+    {
+        // Do a warmup of this so we make sure that all one-time
+        // initialization happens before we do the leak checking.
+        CreateAndDropDummyNetwork(runtime);
+    }
+
+    {
+        ARMNN_SCOPED_LEAK_CHECKER("LoadAndUnloadNetworkGpuAcc");
+        // In the second run we check for all remaining memory
+        // in use after the network was unloaded. If there is any
+        // then it will be treated as a memory leak.
+        CreateAndDropDummyNetwork(runtime);
+        BOOST_TEST(ARMNN_NO_LEAKS_IN_SCOPE());
+        BOOST_TEST(ARMNN_BYTES_LEAKED_IN_SCOPE() == 0);
+        BOOST_TEST(ARMNN_OBJECTS_LEAKED_IN_SCOPE() == 0);
+    }
+}
+#endif // ARMCOMPUTECL_ENABLED
+
+#ifdef ARMCOMPUTENEON_ENABLED
+BOOST_AUTO_TEST_CASE(RuntimeMemoryLeaksCpuAcc)
+{
+    BOOST_TEST(ARMNN_LEAK_CHECKER_IS_ACTIVE());
+
+    armnn::Runtime runtime(armnn::Compute::CpuAcc);
+    armnn::RuntimeLoadedNetworksReserve(&runtime);
+
+    {
+        // Do a warmup of this so we make sure that all one-time
+        // initialization happens before we do the leak checking.
+        CreateAndDropDummyNetwork(runtime);
+    }
+
+    {
+        ARMNN_SCOPED_LEAK_CHECKER("LoadAndUnloadNetworkCpuAcc");
+        // In the second run we check for all remaining memory
+        // in use after the network was unloaded. If there is any
+        // then it will be treated as a memory leak.
+        CreateAndDropDummyNetwork(runtime);
+        BOOST_TEST(ARMNN_NO_LEAKS_IN_SCOPE());
+        BOOST_TEST(ARMNN_BYTES_LEAKED_IN_SCOPE() == 0);
+        BOOST_TEST(ARMNN_OBJECTS_LEAKED_IN_SCOPE() == 0);
+    }
+}
+#endif // ARMCOMPUTENEON_ENABLED
+
+BOOST_AUTO_TEST_CASE(RuntimeMemoryLeaksCpuRef)
+{
+    BOOST_TEST(ARMNN_LEAK_CHECKER_IS_ACTIVE());
+
+    armnn::Runtime runtime(armnn::Compute::CpuRef);
+    armnn::RuntimeLoadedNetworksReserve(&runtime);
+
+    {
+        // Do a warmup of this so we make sure that all one-time
+        // initialization happens before we do the leak checking.
+        CreateAndDropDummyNetwork(runtime);
+    }
+
+    {
+        ARMNN_SCOPED_LEAK_CHECKER("LoadAndUnloadNetworkCpuRef");
+        // In the second run we check for all remaining memory
+        // in use after the network was unloaded. If there is any
+        // then it will be treated as a memory leak.
+        CreateAndDropDummyNetwork(runtime);
+        BOOST_TEST(ARMNN_NO_LEAKS_IN_SCOPE());
+        BOOST_TEST(ARMNN_BYTES_LEAKED_IN_SCOPE() == 0);
+        BOOST_TEST(ARMNN_OBJECTS_LEAKED_IN_SCOPE() == 0);
+    }
+}
+
+#endif // ARMNN_LEAK_CHECKING_ENABLED
+
+// Note: this part of the code is due to be removed when we fully trust the gperftools based results.
 #if defined(ARMCOMPUTECL_ENABLED) && defined(WITH_VALGRIND)
 BOOST_AUTO_TEST_CASE(RuntimeMemoryUsage)
 {
@@ -115,7 +250,9 @@ BOOST_AUTO_TEST_CASE(RuntimeMemoryUsage)
     BOOST_TEST(leakedBefore == leakedAfter);
 
     // Add resonable threshold after and before running valgrind with the ACL clear cache function.
-    BOOST_TEST(static_cast<long>(reachableAfter) - static_cast<long>(reachableBefore) < 1024);
+    // TODO Threshold set to 80k until the root cause of the memory leakage is found and fixed. Revert threshold
+    // value to 1024 when fixed
+    BOOST_TEST(static_cast<long>(reachableAfter) - static_cast<long>(reachableBefore) < 81920);
 
     // these are needed because VALGRIND_COUNT_LEAKS is a macro that assigns to the parameters
     // so they are assigned to, but still considered unused, causing a warning
@@ -124,6 +261,7 @@ BOOST_AUTO_TEST_CASE(RuntimeMemoryUsage)
 }
 #endif
 
+// Note: this part of the code is due to be removed when we fully trust the gperftools based results.
 #ifdef WITH_VALGRIND
 // run with the following command to get all the amazing output (in the devenv/build folder) :)
 // valgrind --leak-check=full --show-leak-kinds=all --log-file=Valgrind_Memcheck_Leak_Report.txt armnn/test/UnitTests
diff --git a/src/armnn/test/TensorHelpers.hpp b/src/armnn/test/TensorHelpers.hpp
index e4ff899a4e..aac4c1d15e 100644
--- a/src/armnn/test/TensorHelpers.hpp
+++ b/src/armnn/test/TensorHelpers.hpp
@@ -22,7 +22,7 @@
 
 #include <cmath>
 
-constexpr float g_FloatCloseToZeroTolerance = 1.0e-7f;
+constexpr float g_FloatCloseToZeroTolerance = 1.0e-6f;
 
 template<typename T, bool isQuantized = true>
 struct SelectiveComparer
diff --git a/src/armnn/test/UnitTests.hpp b/src/armnn/test/UnitTests.hpp
index 040048ad99..9b750b5b33 100644
--- a/src/armnn/test/UnitTests.hpp
+++ b/src/armnn/test/UnitTests.hpp
@@ -32,7 +32,7 @@ inline void ConfigureLoggingTest()
 /// If support is added for a feature, the test case will fail because the name incorrectly contains UNSUPPORTED.
 /// If support is removed for a feature, the test case will fail because the name doesn't contain UNSUPPORTED.
 template <typename T, std::size_t n>
-void CompareTestResultIfSupported(const std::string& testName, LayerTestResult<T, n> testResult)
+void CompareTestResultIfSupported(const std::string& testName, const LayerTestResult<T, n>& testResult)
 {
     bool testNameIndicatesUnsupported = testName.find("UNSUPPORTED") != std::string::npos;
     BOOST_CHECK_MESSAGE(testNameIndicatesUnsupported != testResult.supported,