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| author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2021-08-31 16:53:54 +0100 |
|---|---|---|
| committer | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2021-08-31 16:53:54 +0100 |
| commit | bd575b270f65601ff7bdfdc58de45b9675d5541a (patch) | |
| tree | 0063b2d9716f5d1bab45577992a6e193522912d6 /docs | |
| parent | 7684b18e8fec45355a49e7f7165c582efc553ab6 (diff) | |
| download | armnn-bd575b270f65601ff7bdfdc58de45b9675d5541a.tar.gz | |
MLCE-530 Add support of int8 weight for UnidirectionalSequenceLstm
to Ref backend and armnn delegate
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I203d0029c12221228ffe229acda3c90594394e9b
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/01_03_delegate.dox | 2 | ||||
| -rw-r--r-- | docs/05_operator_list.dox | 45 |
2 files changed, 10 insertions, 37 deletions
diff --git a/docs/01_03_delegate.dox b/docs/01_03_delegate.dox index 92cdf6d7e1..04f216a87d 100644 --- a/docs/01_03_delegate.dox +++ b/docs/01_03_delegate.dox @@ -165,6 +165,8 @@ The Arm NN SDK TensorFlow Lite delegate currently supports the following operato - TRANSPOSE_CONV +- UNIDIRECTIONAL_SEQUENCE_LSTM + - UNPACK More machine learning operators will be supported in future releases. diff --git a/docs/05_operator_list.dox b/docs/05_operator_list.dox index 4c4f6d10ed..1f4b43f55e 100644 --- a/docs/05_operator_list.dox +++ b/docs/05_operator_list.dox @@ -3173,7 +3173,7 @@ where N = batches, C = channels, H = height, W = width </table> <tr> <td rowspan="3">UnidirectionalSquenceLstmLayer - <td rowspan="3" style="width:200px;"> Layer to perform unidirectional LSTM operation. + <td rowspan="3" style="width:200px;"> Layer to perform unidirectional sequence LSTM operation. <td rowspan="3"> <ul> <li>ANEURALNETWORKS_UNIDIRECTIONAL_SEQUENCE_LSTM @@ -3185,43 +3185,14 @@ where N = batches, C = channels, H = height, W = width </ul> <td> <table> - <tr><th> - <tr><td>All + <tr><th>Input Types + <tr><td>FLOAT32 + </table> + <table> + <tr><th>Weight Types + <tr><td>FLOAT32 + <tr><td>QASYMMS8 </table> -<tr> - <td>CpuAcc - <td> - <ul> - <li>NHWC - <li>NCHW - </ul> - <td> - <table> - <tr><th> - <tr><td>SIGNED32 - <tr><td>FLOAT16 - <tr><td>FLOAT32 - <tr><td>QASYMMU8 - <tr><td>QASYMMS8 - <tr><td>QUANTIZEDSYMM8PERAXIS - </table> -<tr> - <td>GpuAcc - <td> - <ul> - <li>NHWC - <li>NCHW - </ul> - <td> - <table> - <tr><th> - <tr><td>SIGNED32 - <tr><td>FLOAT16 - <tr><td>FLOAT32 - <tr><td>QASYMMU8 - <tr><td>QASYMMS8 - <tr><td>QUANTIZEDSYMM8PERAXIS - </table> <tr> <td rowspan="3">UnmapLayer <td rowspan="3" style="width:200px;"> Layer to perform unmap operation on tensor. |