IVGCVSW-6176 Add support for shape_signature in the tflite parser

* tflite shape_signatures will now be the preferred way to detect dynamic tensors
* add test utility to the parser that converts a model's tensors to dynamic
* by default tests will run a dynamic version of the model in addition to the original
* fix dynamic shape inference of unpack operator
* reactivate and fix quantize test
* add shape inference to expand dims

Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: If11ba19d813cd3590707583dff1e4eb0e6412a1d

60 files changed, 255 insertions, 218 deletions

diff --git a/CMakeLists.txt b/CMakeLists.txt
index e0b03c0049..b4e0a38b38 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -690,6 +690,7 @@ if(BUILD_UNIT_TESTS)
              src/armnnTfLiteParser/test/Reshape.cpp
              src/armnnTfLiteParser/test/ResizeBilinear.cpp
              src/armnnTfLiteParser/test/ResizeNearestNeighbor.cpp
+             src/armnnTfLiteParser/test/Quantize.cpp
              src/armnnTfLiteParser/test/Softmax.cpp
              src/armnnTfLiteParser/test/SpaceToBatchND.cpp
              src/armnnTfLiteParser/test/Shape.cpp
diff --git a/src/armnnTfLiteParser/TfLiteParser.cpp b/src/armnnTfLiteParser/TfLiteParser.cpp
index fbbc5acb3c..95e0e0af6e 100644
--- a/src/armnnTfLiteParser/TfLiteParser.cpp
+++ b/src/armnnTfLiteParser/TfLiteParser.cpp
@@ -363,7 +363,7 @@ void CalcPadding(uint32_t inputSize,
 }
 
 armnn::TensorInfo ToTensorInfo(TfLiteParserImpl::TensorRawPtr tensorPtr,
-                               const std::vector<unsigned int>& shapes,
+                               const std::vector<unsigned int>& shape,
                                const bool outputTensor = false)
 {
     armnn::DataType type;
@@ -412,14 +412,53 @@ armnn::TensorInfo ToTensorInfo(TfLiteParserImpl::TensorRawPtr tensorPtr,
                             location.AsString()));
         }
     }
-    std::vector<unsigned int> safeShape = shapes;
-    bool isDynamic = false;
-    if (safeShape.size() == 0)
+    TensorShape tensorShape;
+
+    std::vector<unsigned int> safeShape = shape;
+    if (shape.size() == 0)
     {
         safeShape.push_back(1);
-        if (outputTensor)
+    }
+
+    if (!outputTensor)
+    {
+        tensorShape = TensorShape(armnn::numeric_cast<unsigned int>(safeShape.size()), safeShape.data());
+    }
+    else
+    {
+        unsigned long shapeSignatureSize = tensorPtr->shape_signature.size();
+
+        // If a shape signature exists we will use that to infer dynamic tensors
+        if (shapeSignatureSize != 0)
         {
-            isDynamic = true;
+            // If the shape is incompatible with the shape signature override the shape
+            if (shapeSignatureSize != shape.size())
+            {
+                safeShape = {};
+
+                for (unsigned int i = 0; i < shapeSignatureSize; ++i)
+                {
+                    unsigned int dim = tensorPtr->shape_signature[i] > -1 ?
+                                       static_cast<unsigned int>(tensorPtr->shape_signature[i]) : 0;
+                    safeShape.push_back(dim);
+                }
+            }
+
+            bool dimMask[tensorPtr->shape_signature.size()];
+            for (unsigned int i = 0; i < tensorPtr->shape_signature.size(); ++i)
+            {
+                dimMask[i] = tensorPtr->shape_signature[i] == -1 ? false : true;
+            }
+            tensorShape = TensorShape(static_cast<unsigned int>(safeShape.size()), safeShape.data(), dimMask);
+        }
+        // If there is no shape signature treat the tensor as dynamic if the shape has a size of zero
+        else if (shape.size() == 0)
+        {
+            tensorShape = TensorShape(1, false);
+        }
+        else
+        {
+            tensorShape = TensorShape(armnn::numeric_cast<unsigned int>(shape.size()), shape.data());
         }
     }
 
@@ -444,12 +483,6 @@ armnn::TensorInfo ToTensorInfo(TfLiteParserImpl::TensorRawPtr tensorPtr,
                 quantizationOffset = armnn::numeric_cast<int32_t>(tensorPtr->quantization->zero_point[0]);
             }
 
-            TensorShape tensorShape(armnn::numeric_cast<unsigned int>(safeShape.size()),
-                                    safeShape.data());
-            if (isDynamic)
-            {
-                tensorShape = TensorShape(1, false);
-            }
             armnn::TensorInfo result(tensorShape,
                                      type,
                                      quantizationScale,
@@ -467,12 +500,6 @@ armnn::TensorInfo ToTensorInfo(TfLiteParserImpl::TensorRawPtr tensorPtr,
                       std::back_inserter(quantizationScales));
 
             // QSymmS8 Per-axis
-            TensorShape tensorShape(armnn::numeric_cast<unsigned int>(safeShape.size()),
-                                    safeShape.data());
-            if (isDynamic)
-            {
-                tensorShape = TensorShape(1, false);
-            }
             armnn::TensorInfo result(tensorShape,
                                      type,
                                      quantizationScales,
@@ -482,12 +509,6 @@ armnn::TensorInfo ToTensorInfo(TfLiteParserImpl::TensorRawPtr tensorPtr,
     }
     else
     {
-        TensorShape tensorShape(armnn::numeric_cast<unsigned int>(safeShape.size()),
-                                safeShape.data());
-        if (isDynamic)
-        {
-            tensorShape = TensorShape(1, false);
-        }
         armnn::TensorInfo result(tensorShape,
                                  type,
                                  quantizationScale,
@@ -695,6 +716,15 @@ INetworkPtr TfLiteParserImpl::CreateNetworkFromBinary(const std::vector<uint8_t>
     return CreateNetworkFromModel();
 }
 
+
+armnn::INetworkPtr TfLiteParserImpl::LoadModel(std::unique_ptr<tflite::ModelT> model)
+{
+    ResetParser();
+    m_Model = std::move(model);
+
+    return CreateNetworkFromModel();
+}
+
 INetworkPtr TfLiteParserImpl::CreateNetworkFromModel()
 {
 
@@ -1116,7 +1146,44 @@ void TfLiteParserImpl::ParseExpandDims(size_t subgraphIndex, size_t operatorInde
     CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
 
     ReshapeDescriptor reshapeDesc;
-    reshapeDesc.m_TargetShape = outputTensorInfo.GetShape();
+
+    if (outputTensorInfo.GetShape().AreAllDimensionsSpecified())
+    {
+        reshapeDesc.m_TargetShape = outputTensorInfo.GetShape();
+    }
+    else
+    {
+        int32_t axis = inputs[1]->shape[0];
+
+        int32_t inputDimSize = static_cast<int32_t>(inputTensorInfo.GetShape().GetNumDimensions());
+
+        if (axis > inputDimSize || axis < 0 - (inputDimSize + 1))
+        {
+            throw ParseException("axis must be in range [0 - (inputDimSize + 1), inputDimSize] inclusive");
+        }
+
+        if(axis < 0)
+        {
+            axis = inputDimSize + axis + 1;
+        }
+
+        unsigned int shape[inputDimSize + 1];
+        unsigned int inputShapeIndex = 0;
+        for (unsigned int i = 0; i < static_cast<unsigned int>(inputDimSize + 1); ++i)
+        {
+            if (i == static_cast<unsigned int>(axis))
+            {
+                shape[i] = 1;
+            }
+            else
+            {
+                shape[i] = inputTensorInfo.GetShape()[inputShapeIndex];
+                ++inputShapeIndex;
+            }
+        }
+
+        reshapeDesc.m_TargetShape = TensorShape(static_cast<unsigned int>(inputDimSize + 1), shape);
+    }
 
     IConnectableLayer* layer = m_Network->AddReshapeLayer(reshapeDesc, layerName.c_str());
     ARMNN_ASSERT(layer != nullptr);
@@ -2790,13 +2857,24 @@ void TfLiteParserImpl::ParseUnpack(size_t subgraphIndex, size_t operatorIndex)
     auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
     RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
 
+    std::vector<unsigned int> reshapeDims;
+    for (unsigned int axis = 0; axis < splitOutShape.GetNumDimensions(); ++axis)
+    {
+        if (axis != unpackAxis)
+        {
+            reshapeDims.push_back(splitOutShape[axis]);
+        }
+    }
+
+    TensorShape reshapeOutputShape(splitOutShape.GetNumDimensions() -1, reshapeDims.data());
+
     // Create reshape to remove the unpacked dimension for unpack operator of each output from Splitter.
     for (unsigned int k = 0; k < layer->GetNumOutputSlots(); ++k)
     {
         armnn::TensorInfo outputTensorInfo  = ToTensorInfo(outputs[k], true);
         std::string reshapeLayerName = fmt::format("Reshape_for:{}", layer->GetName());
         armnn::ReshapeDescriptor desc;
-        desc.m_TargetShape = outputTensorInfo.GetShape();
+        desc.m_TargetShape = reshapeOutputShape;
         armnn::IConnectableLayer* reshapeLayer = m_Network->AddReshapeLayer(desc, layerName.c_str());
 
         layer->GetOutputSlot(k).SetTensorInfo(armnn::TensorInfo(splitOutShape,
diff --git a/src/armnnTfLiteParser/TfLiteParser.hpp b/src/armnnTfLiteParser/TfLiteParser.hpp
index e601540fb1..0f11e41d37 100644
--- a/src/armnnTfLiteParser/TfLiteParser.hpp
+++ b/src/armnnTfLiteParser/TfLiteParser.hpp
@@ -64,6 +64,10 @@ public:
 
 public:
     // testable helpers
+    armnn::INetworkPtr CreateNetworkFromBinaryAsDynamic(const std::vector<uint8_t>& binaryContent);
+
+    armnn::INetworkPtr LoadModel(std::unique_ptr<tflite::ModelT> model);
+
     static ModelPtr LoadModelFromFile(const char* fileName);
     static ModelPtr LoadModelFromBinary(const uint8_t* binaryContent, size_t len);
     static TensorRawPtrVector GetInputs(const ModelPtr& model, size_t subgraphIndex, size_t operatorIndex);
diff --git a/src/armnnTfLiteParser/test/Activations.cpp b/src/armnnTfLiteParser/test/Activations.cpp
index 980edc4c5d..a3d75edab5 100644
--- a/src/armnnTfLiteParser/test/Activations.cpp
+++ b/src/armnnTfLiteParser/test/Activations.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 #include <doctest/doctest.h>
 
diff --git a/src/armnnTfLiteParser/test/Addition.cpp b/src/armnnTfLiteParser/test/Addition.cpp
index d7c207f783..2da89e93e0 100644
--- a/src/armnnTfLiteParser/test/Addition.cpp
+++ b/src/armnnTfLiteParser/test/Addition.cpp
@@ -1,15 +1,12 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 #include <doctest/doctest.h>
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Addition")
 {
diff --git a/src/armnnTfLiteParser/test/ArgMinMax.cpp b/src/armnnTfLiteParser/test/ArgMinMax.cpp
index 77574b12dc..91782d2fe2 100644
--- a/src/armnnTfLiteParser/test/ArgMinMax.cpp
+++ b/src/armnnTfLiteParser/test/ArgMinMax.cpp
@@ -4,10 +4,7 @@
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <iostream>
-#include <string>
 
 TEST_SUITE("TensorflowLiteParser_ArgMinMax")
 {
diff --git a/src/armnnTfLiteParser/test/AvgPool2D.cpp b/src/armnnTfLiteParser/test/AvgPool2D.cpp
index fdab4da296..561a0473f2 100644
--- a/src/armnnTfLiteParser/test/AvgPool2D.cpp
+++ b/src/armnnTfLiteParser/test/AvgPool2D.cpp
@@ -1,8 +1,7 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
-#include "armnnTfLiteParser/ITfLiteParser.hpp"
 #include "ParserFlatbuffersFixture.hpp"
 
 TEST_SUITE("TensorflowLiteParser_AvgPool2D")
diff --git a/src/armnnTfLiteParser/test/BatchToSpaceND.cpp b/src/armnnTfLiteParser/test/BatchToSpaceND.cpp
index f5285f80f8..108bf38e8e 100644
--- a/src/armnnTfLiteParser/test/BatchToSpaceND.cpp
+++ b/src/armnnTfLiteParser/test/BatchToSpaceND.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_BatchToSpaceND")
 {
diff --git a/src/armnnTfLiteParser/test/Cast.cpp b/src/armnnTfLiteParser/test/Cast.cpp
index 9971ee867b..9782167501 100644
--- a/src/armnnTfLiteParser/test/Cast.cpp
+++ b/src/armnnTfLiteParser/test/Cast.cpp
@@ -4,10 +4,7 @@
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Cast")
 {
diff --git a/src/armnnTfLiteParser/test/Concatenation.cpp b/src/armnnTfLiteParser/test/Concatenation.cpp
index 2407794f0d..253ad91768 100644
--- a/src/armnnTfLiteParser/test/Concatenation.cpp
+++ b/src/armnnTfLiteParser/test/Concatenation.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Concatenation")
 {
diff --git a/src/armnnTfLiteParser/test/Constant.cpp b/src/armnnTfLiteParser/test/Constant.cpp
index 641fd7ba56..0cd56e96f3 100644
--- a/src/armnnTfLiteParser/test/Constant.cpp
+++ b/src/armnnTfLiteParser/test/Constant.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 using armnnTfLiteParser::TfLiteParserImpl;
 
diff --git a/src/armnnTfLiteParser/test/Conv2D.cpp b/src/armnnTfLiteParser/test/Conv2D.cpp
index dc5e6974ad..c25e62bb00 100644
--- a/src/armnnTfLiteParser/test/Conv2D.cpp
+++ b/src/armnnTfLiteParser/test/Conv2D.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 #include <sstream>
 
 TEST_SUITE("TensorflowLiteParser_Conv2D")
diff --git a/src/armnnTfLiteParser/test/DepthToSpace.cpp b/src/armnnTfLiteParser/test/DepthToSpace.cpp
index 6b7e9c52ba..f951943ed5 100644
--- a/src/armnnTfLiteParser/test/DepthToSpace.cpp
+++ b/src/armnnTfLiteParser/test/DepthToSpace.cpp
@@ -4,10 +4,7 @@
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_DepthToSpace")
 {
diff --git a/src/armnnTfLiteParser/test/DepthwiseConvolution2D.cpp b/src/armnnTfLiteParser/test/DepthwiseConvolution2D.cpp
index 13f92ad828..309c8a3a96 100644
--- a/src/armnnTfLiteParser/test/DepthwiseConvolution2D.cpp
+++ b/src/armnnTfLiteParser/test/DepthwiseConvolution2D.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_DepthwiseConvolution2D")
 {
diff --git a/src/armnnTfLiteParser/test/Dequantize.cpp b/src/armnnTfLiteParser/test/Dequantize.cpp
index 6de6fe543b..37af71612b 100644
--- a/src/armnnTfLiteParser/test/Dequantize.cpp
+++ b/src/armnnTfLiteParser/test/Dequantize.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2019 Arm Ltd. All rights reserved.
+// Copyright © 2019 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Dequantize")
 {
diff --git a/src/armnnTfLiteParser/test/DetectionPostProcess.cpp b/src/armnnTfLiteParser/test/DetectionPostProcess.cpp
index e7ef7402f2..4000d49132 100644
--- a/src/armnnTfLiteParser/test/DetectionPostProcess.cpp
+++ b/src/armnnTfLiteParser/test/DetectionPostProcess.cpp
@@ -1,9 +1,8 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
-#include "../TfLiteParser.hpp"
 #include "ParserFlatbuffersFixture.hpp"
 #include "ParserPrototxtFixture.hpp"
 #include "ParserHelper.hpp"
diff --git a/src/armnnTfLiteParser/test/Div.cpp b/src/armnnTfLiteParser/test/Div.cpp
index 736e821a09..a6ba3667a0 100644
--- a/src/armnnTfLiteParser/test/Div.cpp
+++ b/src/armnnTfLiteParser/test/Div.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2020 Arm Ltd. All rights reserved.
+// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Div")
 {
diff --git a/src/armnnTfLiteParser/test/ElementWiseUnary.cpp b/src/armnnTfLiteParser/test/ElementWiseUnary.cpp
index 21718d8d16..2d784fb022 100644
--- a/src/armnnTfLiteParser/test/ElementWiseUnary.cpp
+++ b/src/armnnTfLiteParser/test/ElementWiseUnary.cpp
@@ -4,9 +4,7 @@
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
 
 TEST_SUITE("TensorflowLiteParser_ElementwiseUnary")
 {
diff --git a/src/armnnTfLiteParser/test/FullyConnected.cpp b/src/armnnTfLiteParser/test/FullyConnected.cpp
index 521ab34b7a..fc000bf95b 100644
--- a/src/armnnTfLiteParser/test/FullyConnected.cpp
+++ b/src/armnnTfLiteParser/test/FullyConnected.cpp
@@ -1,12 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
 
 TEST_SUITE("TensorflowLiteParser_FullyConnected")
 {
diff --git a/src/armnnTfLiteParser/test/Gather.cpp b/src/armnnTfLiteParser/test/Gather.cpp
index 3c0bd9d6c5..39190ed0a0 100644
--- a/src/armnnTfLiteParser/test/Gather.cpp
+++ b/src/armnnTfLiteParser/test/Gather.cpp
@@ -4,10 +4,7 @@
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Gather")
 {
diff --git a/src/armnnTfLiteParser/test/GetBuffer.cpp b/src/armnnTfLiteParser/test/GetBuffer.cpp
index 9dfc9fff13..9f7335f7b5 100644
--- a/src/armnnTfLiteParser/test/GetBuffer.cpp
+++ b/src/armnnTfLiteParser/test/GetBuffer.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
diff --git a/src/armnnTfLiteParser/test/GetInputsOutputs.cpp b/src/armnnTfLiteParser/test/GetInputsOutputs.cpp
index 398217f42b..1ae4eb51c4 100644
--- a/src/armnnTfLiteParser/test/GetInputsOutputs.cpp
+++ b/src/armnnTfLiteParser/test/GetInputsOutputs.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 using armnnTfLiteParser::TfLiteParserImpl;
 using ModelPtr = TfLiteParserImpl::ModelPtr;
diff --git a/src/armnnTfLiteParser/test/GetSubgraphInputsOutputs.cpp b/src/armnnTfLiteParser/test/GetSubgraphInputsOutputs.cpp
index 5c64449c34..925845940f 100644
--- a/src/armnnTfLiteParser/test/GetSubgraphInputsOutputs.cpp
+++ b/src/armnnTfLiteParser/test/GetSubgraphInputsOutputs.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 using armnnTfLiteParser::TfLiteParserImpl;
 using ModelPtr = TfLiteParserImpl::ModelPtr;
diff --git a/src/armnnTfLiteParser/test/GetTensorIds.cpp b/src/armnnTfLiteParser/test/GetTensorIds.cpp
index 5b17dcd037..31fbfbf6a9 100644
--- a/src/armnnTfLiteParser/test/GetTensorIds.cpp
+++ b/src/armnnTfLiteParser/test/GetTensorIds.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 using armnnTfLiteParser::TfLiteParserImpl;
 using ModelPtr = TfLiteParserImpl::ModelPtr;
diff --git a/src/armnnTfLiteParser/test/InputOutputTensorNames.cpp b/src/armnnTfLiteParser/test/InputOutputTensorNames.cpp
index 97d9381413..f090d39f0b 100644
--- a/src/armnnTfLiteParser/test/InputOutputTensorNames.cpp
+++ b/src/armnnTfLiteParser/test/InputOutputTensorNames.cpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -22,7 +22,7 @@ struct EmptyNetworkFixture : public ParserFlatbuffersFixture
 
 TEST_CASE_FIXTURE(EmptyNetworkFixture, "EmptyNetworkHasNoInputsAndOutputs")
 {
-    Setup();
+    Setup(false);
     CHECK(m_Parser->GetSubgraphCount() == 1);
     CHECK(m_Parser->GetSubgraphInputTensorNames(0).size() == 0);
     CHECK(m_Parser->GetSubgraphOutputTensorNames(0).size() == 0);
diff --git a/src/armnnTfLiteParser/test/L2Normalization.cpp b/src/armnnTfLiteParser/test/L2Normalization.cpp
index 76bb9456a9..eb513c472b 100644
--- a/src/armnnTfLiteParser/test/L2Normalization.cpp
+++ b/src/armnnTfLiteParser/test/L2Normalization.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 #include <numeric>
 
 TEST_SUITE("TensorflowLiteParser_L2Normalization")
diff --git a/src/armnnTfLiteParser/test/LeakyRelu.cpp b/src/armnnTfLiteParser/test/LeakyRelu.cpp
index 20f95abee5..2930a8baca 100644
--- a/src/armnnTfLiteParser/test/LeakyRelu.cpp
+++ b/src/armnnTfLiteParser/test/LeakyRelu.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2020 Arm Ltd. All rights reserved.
+// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_LeakyRelu")
 {
diff --git a/src/armnnTfLiteParser/test/LoadModel.cpp b/src/armnnTfLiteParser/test/LoadModel.cpp
index 9e7677df7a..c11cd2ba68 100644
--- a/src/armnnTfLiteParser/test/LoadModel.cpp
+++ b/src/armnnTfLiteParser/test/LoadModel.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 #include <armnnUtils/Filesystem.hpp>
 
diff --git a/src/armnnTfLiteParser/test/LoadScopeDynamicTensor.cpp b/src/armnnTfLiteParser/test/LoadScopeDynamicTensor.cpp
index a6e9c88346..7c28311a16 100644
--- a/src/armnnTfLiteParser/test/LoadScopeDynamicTensor.cpp
+++ b/src/armnnTfLiteParser/test/LoadScopeDynamicTensor.cpp
@@ -6,7 +6,6 @@
 #include "armnnTfLiteParser/ITfLiteParser.hpp"
 #include "ParserFlatbuffersFixture.hpp"
 
-#include <string>
 
 TEST_SUITE("TensorflowLiteParser_LoadScopeDynamicTensor")
 {
diff --git a/src/armnnTfLiteParser/test/MaxPool2D.cpp b/src/armnnTfLiteParser/test/MaxPool2D.cpp
index bcafac6710..0fd704fa09 100644
--- a/src/armnnTfLiteParser/test/MaxPool2D.cpp
+++ b/src/armnnTfLiteParser/test/MaxPool2D.cpp
@@ -1,9 +1,8 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
-#include "armnnTfLiteParser/ITfLiteParser.hpp"
 #include "ParserFlatbuffersFixture.hpp"
 
 TEST_SUITE("TensorflowLiteParser_MaxPool2D")
diff --git a/src/armnnTfLiteParser/test/Maximum.cpp b/src/armnnTfLiteParser/test/Maximum.cpp
index caf1c70ff4..05ea36f333 100644
--- a/src/armnnTfLiteParser/test/Maximum.cpp
+++ b/src/armnnTfLiteParser/test/Maximum.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Maximum")
 {
diff --git a/src/armnnTfLiteParser/test/Mean.cpp b/src/armnnTfLiteParser/test/Mean.cpp
index 935118256a..77bdeb52f8 100644
--- a/src/armnnTfLiteParser/test/Mean.cpp
+++ b/src/armnnTfLiteParser/test/Mean.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Mean")
 {
diff --git a/src/armnnTfLiteParser/test/Minimum.cpp b/src/armnnTfLiteParser/test/Minimum.cpp
index 7aec63841a..b8a7154a1e 100644
--- a/src/armnnTfLiteParser/test/Minimum.cpp
+++ b/src/armnnTfLiteParser/test/Minimum.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Minimum")
 {
diff --git a/src/armnnTfLiteParser/test/Multiplication.cpp b/src/armnnTfLiteParser/test/Multiplication.cpp
index 60756274a1..10780c95e1 100644
--- a/src/armnnTfLiteParser/test/Multiplication.cpp
+++ b/src/armnnTfLiteParser/test/Multiplication.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Multiplication")
 {
diff --git a/src/armnnTfLiteParser/test/OutputShapeOfSqueeze.cpp b/src/armnnTfLiteParser/test/OutputShapeOfSqueeze.cpp
index 395038d959..3124498d66 100644
--- a/src/armnnTfLiteParser/test/OutputShapeOfSqueeze.cpp
+++ b/src/armnnTfLiteParser/test/OutputShapeOfSqueeze.cpp
@@ -1,11 +1,9 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "../TfLiteParser.hpp"
-#include <iostream>
-#include <string>
 
 #include <doctest/doctest.h>
 
diff --git a/src/armnnTfLiteParser/test/Pack.cpp b/src/armnnTfLiteParser/test/Pack.cpp
index 4aff8feca4..907138e739 100644
--- a/src/armnnTfLiteParser/test/Pack.cpp
+++ b/src/armnnTfLiteParser/test/Pack.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Pack")
 {
diff --git a/src/armnnTfLiteParser/test/Pad.cpp b/src/armnnTfLiteParser/test/Pad.cpp
index 1ac06277f8..31df50d6b9 100644
--- a/src/armnnTfLiteParser/test/Pad.cpp
+++ b/src/armnnTfLiteParser/test/Pad.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Pad")
 {
diff --git a/src/armnnTfLiteParser/test/ParserFlatbuffersFixture.hpp b/src/armnnTfLiteParser/test/ParserFlatbuffersFixture.hpp
index c4c75594a3..b4653cd8db 100644
--- a/src/armnnTfLiteParser/test/ParserFlatbuffersFixture.hpp
+++ b/src/armnnTfLiteParser/test/ParserFlatbuffersFixture.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
@@ -13,7 +13,7 @@
 #include <armnn/BackendRegistry.hpp>
 #include <armnn/utility/Assert.hpp>
 
-#include <armnnTfLiteParser/ITfLiteParser.hpp>
+#include "../TfLiteParser.hpp"
 
 #include <ResolveType.hpp>
 
@@ -28,7 +28,6 @@
 
 #include <schema_generated.h>
 
-#include <iostream>
 
 using armnnTfLiteParser::ITfLiteParser;
 using armnnTfLiteParser::ITfLiteParserPtr;
@@ -37,37 +36,97 @@ using TensorRawPtr = const tflite::TensorT *;
 struct ParserFlatbuffersFixture
 {
     ParserFlatbuffersFixture() :
-        m_Parser(nullptr, &ITfLiteParser::Destroy),
-        m_Runtime(armnn::IRuntime::Create(armnn::IRuntime::CreationOptions())),
-        m_NetworkIdentifier(-1)
+            m_Runtime(armnn::IRuntime::Create(armnn::IRuntime::CreationOptions())),
+            m_NetworkIdentifier(0),
+            m_DynamicNetworkIdentifier(1)
     {
         ITfLiteParser::TfLiteParserOptions options;
         options.m_StandInLayerForUnsupported = true;
         options.m_InferAndValidate = true;
 
-        m_Parser.reset(ITfLiteParser::CreateRaw(armnn::Optional<ITfLiteParser::TfLiteParserOptions>(options)));
+        m_Parser = std::make_unique<armnnTfLiteParser::TfLiteParserImpl>(
+                        armnn::Optional<ITfLiteParser::TfLiteParserOptions>(options));
     }
 
     std::vector<uint8_t> m_GraphBinary;
     std::string          m_JsonString;
-    ITfLiteParserPtr     m_Parser;
     armnn::IRuntimePtr   m_Runtime;
     armnn::NetworkId     m_NetworkIdentifier;
+    armnn::NetworkId     m_DynamicNetworkIdentifier;
+    bool                 m_TestDynamic;
+    std::unique_ptr<armnnTfLiteParser::TfLiteParserImpl> m_Parser;
 
     /// If the single-input-single-output overload of Setup() is called, these will store the input and output name
     /// so they don't need to be passed to the single-input-single-output overload of RunTest().
     std::string m_SingleInputName;
     std::string m_SingleOutputName;
 
-    void Setup()
+    void Setup(bool testDynamic = true)
+    {
+        m_TestDynamic = testDynamic;
+        loadNetwork(m_NetworkIdentifier, false);
+
+        if (m_TestDynamic)
+        {
+            loadNetwork(m_DynamicNetworkIdentifier, true);
+        }
+    }
+
+    std::unique_ptr<tflite::ModelT> MakeModelDynamic(std::vector<uint8_t> graphBinary)
+    {
+        const uint8_t* binaryContent = graphBinary.data();
+        const size_t len = graphBinary.size();
+        if (binaryContent == nullptr)
+        {
+            throw armnn::InvalidArgumentException(fmt::format("Invalid (null) binary content {}",
+                                                               CHECK_LOCATION().AsString()));
+        }
+        flatbuffers::Verifier verifier(binaryContent, len);
+        if (verifier.VerifyBuffer<tflite::Model>() == false)
+        {
+            throw armnn::ParseException(fmt::format("Buffer doesn't conform to the expected Tensorflow Lite "
+                                                    "flatbuffers format. size:{} {}",
+                                                    len,
+                                                    CHECK_LOCATION().AsString()));
+        }
+        auto model =  tflite::UnPackModel(binaryContent);
+
+        for (auto const& subgraph : model->subgraphs)
+        {
+            std::vector<int32_t> inputIds = subgraph->inputs;
+            for (unsigned int tensorIndex = 0; tensorIndex < subgraph->tensors.size(); ++tensorIndex)
+            {
+                if (std::find(inputIds.begin(), inputIds.end(), tensorIndex) != inputIds.end())
+                {
+                    continue;
+                }
+                for (auto const& tensor : subgraph->tensors)
+                {
+                    if (tensor->shape_signature.size() != 0)
+                    {
+                        continue;
+                    }
+
+                    for (unsigned int i = 0; i < tensor->shape.size(); ++i)
+                    {
+                        tensor->shape_signature.push_back(-1);
+                    }
+                }
+            }
+        }
+
+        return model;
+    }
+
+    void loadNetwork(armnn::NetworkId networkId, bool loadDynamic)
     {
         bool ok = ReadStringToBinary();
         if (!ok) {
             throw armnn::Exception("LoadNetwork failed while reading binary input");
         }
 
-        armnn::INetworkPtr network =
-                m_Parser->CreateNetworkFromBinary(m_GraphBinary);
+        armnn::INetworkPtr network = loadDynamic ? m_Parser->LoadModel(MakeModelDynamic(m_GraphBinary))
+                                                 : m_Parser->CreateNetworkFromBinary(m_GraphBinary);
 
         if (!network) {
             throw armnn::Exception("The parser failed to create an ArmNN network");
@@ -77,7 +136,7 @@ struct ParserFlatbuffersFixture
                                   m_Runtime->GetDeviceSpec());
         std::string errorMessage;
 
-        armnn::Status ret = m_Runtime->LoadNetwork(m_NetworkIdentifier, move(optimized), errorMessage);
+        armnn::Status ret = m_Runtime->LoadNetwork(networkId, move(optimized), errorMessage);
 
         if (ret != armnn::Status::Success)
         {
@@ -337,6 +396,22 @@ void ParserFlatbuffersFixture::RunTest(size_t subgraphId,
             CHECK_MESSAGE(result.m_Result, result.m_Message.str());
         }
     }
+
+    if (isDynamic)
+    {
+        m_Runtime->EnqueueWorkload(m_DynamicNetworkIdentifier, inputTensors, outputTensors);
+
+        // Compare each output tensor to the expected values
+        for (auto&& it : expectedOutputData)
+        {
+            armnn::BindingPointInfo bindingInfo = m_Parser->GetNetworkOutputBindingInfo(subgraphId, it.first);
+            auto outputExpected = it.second;
+            auto result = CompareTensors(outputExpected, outputStorage[it.first],
+                                         bindingInfo.second.GetShape(), bindingInfo.second.GetShape(),
+                                         false, isDynamic);
+            CHECK_MESSAGE(result.m_Result, result.m_Message.str());
+        }
+    }
 }
 
 /// Multiple Inputs, Multiple Outputs w/ Variable Datatypes and different dimension sizes.
diff --git a/src/armnnTfLiteParser/test/Prelu.cpp b/src/armnnTfLiteParser/test/Prelu.cpp
index 6c70ff6287..bfe2c6a4fd 100644
--- a/src/armnnTfLiteParser/test/Prelu.cpp
+++ b/src/armnnTfLiteParser/test/Prelu.cpp
@@ -1,13 +1,11 @@
 //
-// Copyright © 2021 Arm Ltd. All rights reserved.
+// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include <doctest/doctest.h>
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
 
 TEST_SUITE("TensorflowLiteParser_Prelu")
 {
diff --git a/src/armnnTfLiteParser/test/Quantize.cpp b/src/armnnTfLiteParser/test/Quantize.cpp
index c7c936e745..800edbdf46 100644
--- a/src/armnnTfLiteParser/test/Quantize.cpp
+++ b/src/armnnTfLiteParser/test/Quantize.cpp
@@ -1,21 +1,19 @@
 //
-// Copyright © 2019 Arm Ltd. All rights reserved.
+// Copyright © 2019 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Quantize")
 {
     struct QuantizeFixture : public ParserFlatbuffersFixture
     {
-        explicit QuantizeFixture(const std::string & inputShape,
-                                 const std::string & outputShape,
-                                 const std::string & dataType)
+        explicit QuantizeFixture(const std::string& inputShape,
+                                 const std::string& outputShape,
+                                 const std::string& dataType,
+                                 const std::string& zeroPoint = "[ 0 ]")
         {
             m_JsonString = R"(
             {
@@ -32,7 +30,7 @@ TEST_SUITE("TensorflowLiteParser_Quantize")
                                 "min": [ 0.0 ],
                                 "max": [ 255.0 ],
                                 "scale": [ 1.0 ],
-                                "zero_point": [ 0 ],
+                                "zero_point": )" + zeroPoint + R"(,
                             }
                         },
                         {
@@ -44,7 +42,7 @@ TEST_SUITE("TensorflowLiteParser_Quantize")
                                 "min": [ 0.0 ],
                                 "max": [ 255.0 ],
                                 "scale": [ 1.5 ],
-                                "zero_point": [ 0 ],
+                                "zero_point": )" + zeroPoint + R"(,
                             }
                         }
                     ],
@@ -79,9 +77,9 @@ TEST_SUITE("TensorflowLiteParser_Quantize")
                                                          "UINT8") {}
     };
 
-    TEST_CASE_FIXTURE(SimpleQuantizeQAsymm8, SimpleQuantizeFixtureQAsymm8)
+    TEST_CASE_FIXTURE(SimpleQuantizeFixtureQAsymm8, "SimpleQuantizeFixtureQAsymm8")
     {
-        RunTest<2, armnn::DataType::Float32, armnn::DataType::QuantisedAsymm8>(
+        RunTest<2, armnn::DataType::Float32, armnn::DataType::QAsymmU8>(
                 0,
                 {{"inputTensor",  { 0.0f, 1.5f, 7.5f, 150.0f, 300.0f, 382.5f }}},
                 {{"outputTensor", { 0u,   1u,   5u,   100u,   200u,   255u }}});
@@ -96,7 +94,7 @@ TEST_SUITE("TensorflowLiteParser_Quantize")
 
     TEST_CASE_FIXTURE(SimpleQuantizeFixtureQSymm16, "SimpleQuantizeQsymm16")
     {
-        RunTest<2, armnn::DataType::Float32, armnn::DataType::QuantisedSymm16>(
+        RunTest<2, armnn::DataType::Float32, armnn::DataType::QSymmS16>(
                 0,
                 {{"inputTensor",  { 0.0f, 1.5f, 7.5f, 49150.5f, -1.5f,-49152.0f }}},
                 {{"outputTensor", { 0,    1,    5,    32767,    -1,   -32768 }}});
@@ -106,7 +104,8 @@ TEST_SUITE("TensorflowLiteParser_Quantize")
     {
         SimpleQuantizeFixtureQSymmS8() : QuantizeFixture("[ 1, 6 ]",
                                                          "[ 1, 6 ]",
-                                                         "INT8") {}
+                                                         "INT8",
+                                                         "[]") {}
     };
 
     TEST_CASE_FIXTURE(SimpleQuantizeFixtureQSymmS8, "SimpleQuantizeQSymmS8")
diff --git a/src/armnnTfLiteParser/test/Reduce.cpp b/src/armnnTfLiteParser/test/Reduce.cpp
index cde9d09cd3..4e55a45728 100644
--- a/src/armnnTfLiteParser/test/Reduce.cpp
+++ b/src/armnnTfLiteParser/test/Reduce.cpp
@@ -4,10 +4,7 @@
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Reduce")
 {
diff --git a/src/armnnTfLiteParser/test/Reshape.cpp b/src/armnnTfLiteParser/test/Reshape.cpp
index 0824a27f87..8edecb1196 100644
--- a/src/armnnTfLiteParser/test/Reshape.cpp
+++ b/src/armnnTfLiteParser/test/Reshape.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Reshape")
 {
diff --git a/src/armnnTfLiteParser/test/ResizeBilinear.cpp b/src/armnnTfLiteParser/test/ResizeBilinear.cpp
index dce9e1d914..0354b39067 100644
--- a/src/armnnTfLiteParser/test/ResizeBilinear.cpp
+++ b/src/armnnTfLiteParser/test/ResizeBilinear.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_ResizeBilinear")
 {
diff --git a/src/armnnTfLiteParser/test/ResizeNearestNeighbor.cpp b/src/armnnTfLiteParser/test/ResizeNearestNeighbor.cpp
index 948f4fe0cd..b885284e62 100644
--- a/src/armnnTfLiteParser/test/ResizeNearestNeighbor.cpp
+++ b/src/armnnTfLiteParser/test/ResizeNearestNeighbor.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2019 Arm Ltd. All rights reserved.
+// Copyright © 2019 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_ResizeNearestNeighbor")
 {
diff --git a/src/armnnTfLiteParser/test/Schema.hpp b/src/armnnTfLiteParser/test/Schema.hpp
index 243811553f..a5d0f987da 100644
--- a/src/armnnTfLiteParser/test/Schema.hpp
+++ b/src/armnnTfLiteParser/test/Schema.hpp
@@ -1,5 +1,5 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
diff --git a/src/armnnTfLiteParser/test/Shape.cpp b/src/armnnTfLiteParser/test/Shape.cpp
index c82bc4ef57..46fa80fce6 100644
--- a/src/armnnTfLiteParser/test/Shape.cpp
+++ b/src/armnnTfLiteParser/test/Shape.cpp
@@ -4,7 +4,6 @@
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 TEST_SUITE("TensorflowLiteParser_Shape")
 {
diff --git a/src/armnnTfLiteParser/test/Slice.cpp b/src/armnnTfLiteParser/test/Slice.cpp
index 80dff73146..2a28c6ef09 100644
--- a/src/armnnTfLiteParser/test/Slice.cpp
+++ b/src/armnnTfLiteParser/test/Slice.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2019 Arm Ltd. All rights reserved.
+// Copyright © 2019 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 TEST_SUITE("TensorflowLiteParser_Slice")
 {
diff --git a/src/armnnTfLiteParser/test/Softmax.cpp b/src/armnnTfLiteParser/test/Softmax.cpp
index 11a2a0d84b..8aa116192d 100644
--- a/src/armnnTfLiteParser/test/Softmax.cpp
+++ b/src/armnnTfLiteParser/test/Softmax.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Softmax")
 {
diff --git a/src/armnnTfLiteParser/test/SpaceToBatchND.cpp b/src/armnnTfLiteParser/test/SpaceToBatchND.cpp
index b99713ce0a..9c85a4a5c5 100644
--- a/src/armnnTfLiteParser/test/SpaceToBatchND.cpp
+++ b/src/armnnTfLiteParser/test/SpaceToBatchND.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_SpaceToBatchND")
 {
diff --git a/src/armnnTfLiteParser/test/Split.cpp b/src/armnnTfLiteParser/test/Split.cpp
index 97f8f12339..3a162ceedb 100644
--- a/src/armnnTfLiteParser/test/Split.cpp
+++ b/src/armnnTfLiteParser/test/Split.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Split")
 {
diff --git a/src/armnnTfLiteParser/test/SplitV.cpp b/src/armnnTfLiteParser/test/SplitV.cpp
index 51b75faf07..5ac6d1dece 100644
--- a/src/armnnTfLiteParser/test/SplitV.cpp
+++ b/src/armnnTfLiteParser/test/SplitV.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2020 Arm Ltd. All rights reserved.
+// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser")
 {
diff --git a/src/armnnTfLiteParser/test/Squeeze.cpp b/src/armnnTfLiteParser/test/Squeeze.cpp
index 6f533ba4ff..860c5eea65 100644
--- a/src/armnnTfLiteParser/test/Squeeze.cpp
+++ b/src/armnnTfLiteParser/test/Squeeze.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Squeeze")
 {
diff --git a/src/armnnTfLiteParser/test/StridedSlice.cpp b/src/armnnTfLiteParser/test/StridedSlice.cpp
index 2951b8890d..199134d70b 100644
--- a/src/armnnTfLiteParser/test/StridedSlice.cpp
+++ b/src/armnnTfLiteParser/test/StridedSlice.cpp
@@ -1,12 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
 
 TEST_SUITE("TensorflowLiteParser_StridedSlice")
 {
diff --git a/src/armnnTfLiteParser/test/Sub.cpp b/src/armnnTfLiteParser/test/Sub.cpp
index 4e715ff712..b6d0b58dbc 100644
--- a/src/armnnTfLiteParser/test/Sub.cpp
+++ b/src/armnnTfLiteParser/test/Sub.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Sub")
 {
diff --git a/src/armnnTfLiteParser/test/Sum.cpp b/src/armnnTfLiteParser/test/Sum.cpp
index 09b20b654b..e4ebcf6974 100644
--- a/src/armnnTfLiteParser/test/Sum.cpp
+++ b/src/armnnTfLiteParser/test/Sum.cpp
@@ -4,10 +4,7 @@
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Sum")
 {
diff --git a/src/armnnTfLiteParser/test/TfLiteParser.cpp b/src/armnnTfLiteParser/test/TfLiteParser.cpp
index 53fe4a33e7..65bbaeae0f 100644
--- a/src/armnnTfLiteParser/test/TfLiteParser.cpp
+++ b/src/armnnTfLiteParser/test/TfLiteParser.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2020 Arm Ltd. All rights reserved.
+// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 #include <doctest/doctest.h>
 
 TEST_SUITE("TensorflowLiteParser")
diff --git a/src/armnnTfLiteParser/test/Transpose.cpp b/src/armnnTfLiteParser/test/Transpose.cpp
index 5429e567ef..4db69996eb 100644
--- a/src/armnnTfLiteParser/test/Transpose.cpp
+++ b/src/armnnTfLiteParser/test/Transpose.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2019 Arm Ltd. All rights reserved.
+// Copyright © 2019 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 TEST_SUITE("TensorflowLiteParser_Transpose")
 {
diff --git a/src/armnnTfLiteParser/test/TransposeConv.cpp b/src/armnnTfLiteParser/test/TransposeConv.cpp
index 0f53e73640..555e63729d 100644
--- a/src/armnnTfLiteParser/test/TransposeConv.cpp
+++ b/src/armnnTfLiteParser/test/TransposeConv.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 TEST_SUITE("TensorflowLiteParser_TransposeConv")
 {
diff --git a/src/armnnTfLiteParser/test/Unpack.cpp b/src/armnnTfLiteParser/test/Unpack.cpp
index 991352ba6b..889391f64c 100644
--- a/src/armnnTfLiteParser/test/Unpack.cpp
+++ b/src/armnnTfLiteParser/test/Unpack.cpp
@@ -1,13 +1,10 @@
 //
-// Copyright © 2017 Arm Ltd. All rights reserved.
+// Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
-#include <string>
-#include <iostream>
 
 TEST_SUITE("TensorflowLiteParser_Unpack")
 {
diff --git a/src/armnnTfLiteParser/test/Unsupported.cpp b/src/armnnTfLiteParser/test/Unsupported.cpp
index 69744f45cf..b405e1958c 100644
--- a/src/armnnTfLiteParser/test/Unsupported.cpp
+++ b/src/armnnTfLiteParser/test/Unsupported.cpp
@@ -1,10 +1,9 @@
 //
-// Copyright © 2019 Arm Ltd. All rights reserved.
+// Copyright © 2019 Arm Ltd and Contributors. All rights reserved.
 // SPDX-License-Identifier: MIT
 //
 
 #include "ParserFlatbuffersFixture.hpp"
-#include "../TfLiteParser.hpp"
 
 #include <armnn/LayerVisitorBase.hpp>
 #include <armnn/utility/Assert.hpp>
@@ -14,7 +13,6 @@
 #include <layers/StandInLayer.hpp>
 
 #include <sstream>
-#include <string>
 #include <vector>
 
 TEST_SUITE("TensorflowLiteParser_Unsupported")