diff options
| author | Teresa Charlin <teresa.charlinreyes@arm.com> | 2022-01-19 15:55:37 +0000 |
|---|---|---|
| committer | TeresaARM <teresa.charlinreyes@arm.com> | 2022-01-26 20:30:55 +0000 |
| commit | 588cbdfbd20dc524674db40c07cde3c4ffb85d11 (patch) | |
| tree | 99fe40838290e08103ca668f20361033264e90e4 | |
| parent | 0d77ae103f88c7a6e6b09ef0bc2e0e47a59c4364 (diff) | |
| download | armnn-588cbdfbd20dc524674db40c07cde3c4ffb85d11.tar.gz | |
IVGCVSW-6685-6686 Modify workloads to extend Neon/Cl BaseWorkload
* Neon workloads to extend NeonBaseWorkload instead of BaseWorkload
* Cl workload to extend ClBaseWorkload instead of BaseWorkload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I8f39a31a89a8865ac4acf18573ab290d548d2864
246 files changed, 539 insertions, 525 deletions
diff --git a/src/backends/cl/workloads/ClAbsWorkload.cpp b/src/backends/cl/workloads/ClAbsWorkload.cpp index eeaec54439..c108bd4432 100644 --- a/src/backends/cl/workloads/ClAbsWorkload.cpp +++ b/src/backends/cl/workloads/ClAbsWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -27,7 +27,7 @@ arm_compute::Status ClAbsWorkloadValidate(const TensorInfo& input, const TensorI ClAbsWorkload::ClAbsWorkload(const AbsQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<AbsQueueDescriptor>(descriptor, info) + : ClBaseWorkload<AbsQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClAbsWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClAbsWorkload.hpp b/src/backends/cl/workloads/ClAbsWorkload.hpp index fb34fe3918..2ed3eac07b 100644 --- a/src/backends/cl/workloads/ClAbsWorkload.hpp +++ b/src/backends/cl/workloads/ClAbsWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClAbsWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClAbsWorkload : public BaseWorkload<AbsQueueDescriptor> +class ClAbsWorkload : public ClBaseWorkload<AbsQueueDescriptor> { public: ClAbsWorkload(const AbsQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClAdditionWorkload.cpp b/src/backends/cl/workloads/ClAdditionWorkload.cpp index ce51b9f4fe..afdd1bb23a 100644 --- a/src/backends/cl/workloads/ClAdditionWorkload.cpp +++ b/src/backends/cl/workloads/ClAdditionWorkload.cpp @@ -21,7 +21,7 @@ static constexpr arm_compute::ConvertPolicy g_AclConvertPolicy = arm_compute::Co ClAdditionWorkload::ClAdditionWorkload(const AdditionQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<AdditionQueueDescriptor>(descriptor, info) + : ClBaseWorkload<AdditionQueueDescriptor>(descriptor, info) { this->m_Data.ValidateInputsOutputs("ClAdditionWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClAdditionWorkload.hpp b/src/backends/cl/workloads/ClAdditionWorkload.hpp index 4b26be333f..4131abf65f 100644 --- a/src/backends/cl/workloads/ClAdditionWorkload.hpp +++ b/src/backends/cl/workloads/ClAdditionWorkload.hpp @@ -1,18 +1,18 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> namespace armnn { -class ClAdditionWorkload : public BaseWorkload<AdditionQueueDescriptor> +class ClAdditionWorkload : public ClBaseWorkload<AdditionQueueDescriptor> { public: ClAdditionWorkload(const AdditionQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClArgMinMaxWorkload.cpp b/src/backends/cl/workloads/ClArgMinMaxWorkload.cpp index 4b1dc1ea81..4305b255c0 100644 --- a/src/backends/cl/workloads/ClArgMinMaxWorkload.cpp +++ b/src/backends/cl/workloads/ClArgMinMaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -55,7 +55,7 @@ arm_compute::Status ClArgMinMaxWorkloadValidate(const TensorInfo& input, ClArgMinMaxWorkload::ClArgMinMaxWorkload(const ArgMinMaxQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ArgMinMaxQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ArgMinMaxQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClArgMinMaxWorkload_Construct", diff --git a/src/backends/cl/workloads/ClArgMinMaxWorkload.hpp b/src/backends/cl/workloads/ClArgMinMaxWorkload.hpp index aa36e0847a..22a03e668b 100644 --- a/src/backends/cl/workloads/ClArgMinMaxWorkload.hpp +++ b/src/backends/cl/workloads/ClArgMinMaxWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLArgMinMaxLayer.h> @@ -17,7 +17,7 @@ arm_compute::Status ClArgMinMaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ArgMinMaxDescriptor& descriptor); -class ClArgMinMaxWorkload : public BaseWorkload<ArgMinMaxQueueDescriptor> +class ClArgMinMaxWorkload : public ClBaseWorkload<ArgMinMaxQueueDescriptor> { public: ClArgMinMaxWorkload(const ArgMinMaxQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.cpp b/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.cpp index 8e314fcdf0..992abc2f56 100644 --- a/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.hpp b/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.hpp index e36ab68ba5..dc76703382 100644 --- a/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClBatchNormalizationFloatWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/CLTensor.h> #include <arm_compute/runtime/CL/functions/CLBatchNormalizationLayer.h> diff --git a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp index c6bd624815..8a9a33b16b 100644 --- a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp +++ b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ using namespace armcomputetensorutils; ClBatchToSpaceNdWorkload::ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<BatchToSpaceNdQueueDescriptor>(descriptor, info) + : ClBaseWorkload<BatchToSpaceNdQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClBatchToSpaceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp index 9e5ebff842..5026dc3aaf 100644 --- a/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp +++ b/src/backends/cl/workloads/ClBatchToSpaceNdWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLBatchToSpaceLayer.h> namespace armnn @@ -15,7 +15,7 @@ arm_compute::Status ClBatchToSpaceNdWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const BatchToSpaceNdDescriptor& descriptor); -class ClBatchToSpaceNdWorkload : public BaseWorkload<BatchToSpaceNdQueueDescriptor> +class ClBatchToSpaceNdWorkload : public ClBaseWorkload<BatchToSpaceNdQueueDescriptor> { public: ClBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClCastWorkload.cpp b/src/backends/cl/workloads/ClCastWorkload.cpp index 9606385720..25d52c8356 100644 --- a/src/backends/cl/workloads/ClCastWorkload.cpp +++ b/src/backends/cl/workloads/ClCastWorkload.cpp @@ -28,7 +28,7 @@ arm_compute::Status ClCastValidate(const TensorInfo& input, const TensorInfo& ou ClCastWorkload::ClCastWorkload(const CastQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<CastQueueDescriptor>(descriptor, info) + : ClBaseWorkload<CastQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClCastWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClCastWorkload.hpp b/src/backends/cl/workloads/ClCastWorkload.hpp index d36c1b19e8..53a25bdc93 100644 --- a/src/backends/cl/workloads/ClCastWorkload.hpp +++ b/src/backends/cl/workloads/ClCastWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLCast.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClCastValidate(const TensorInfo& input, const TensorInfo& output); -class ClCastWorkload : public BaseWorkload<CastQueueDescriptor> +class ClCastWorkload : public ClBaseWorkload<CastQueueDescriptor> { public: ClCastWorkload(const CastQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp b/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp index 5d3e66c782..bf2958782e 100644 --- a/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp +++ b/src/backends/cl/workloads/ClChannelShuffleWorkload.cpp @@ -54,7 +54,7 @@ arm_compute::Status ClChannelShuffleValidate(const TensorInfo& input, ClChannelShuffleWorkload::ClChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ChannelShuffleQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ChannelShuffleQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClChannelShufflenWorkload_Construct", diff --git a/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp b/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp index 972b2dd54a..9002e66142 100644 --- a/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp +++ b/src/backends/cl/workloads/ClChannelShuffleWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLChannelShuffleLayer.h> @@ -17,7 +17,7 @@ arm_compute::Status ClChannelShuffleValidate(const TensorInfo& input, const TensorInfo& output, const ChannelShuffleDescriptor& descriptor); -class ClChannelShuffleWorkload : public BaseWorkload<ChannelShuffleQueueDescriptor> +class ClChannelShuffleWorkload : public ClBaseWorkload<ChannelShuffleQueueDescriptor> { public: ClChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClComparisonWorkload.cpp b/src/backends/cl/workloads/ClComparisonWorkload.cpp index a66bd6cba1..2ae7b3bed6 100644 --- a/src/backends/cl/workloads/ClComparisonWorkload.cpp +++ b/src/backends/cl/workloads/ClComparisonWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -42,7 +42,7 @@ arm_compute::Status ClComparisonWorkloadValidate(const TensorInfo& input0, ClComparisonWorkload::ClComparisonWorkload(const ComparisonQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ComparisonQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ComparisonQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonComparisonWorkload_Construct", diff --git a/src/backends/cl/workloads/ClComparisonWorkload.hpp b/src/backends/cl/workloads/ClComparisonWorkload.hpp index 662c1fa826..d976ef322e 100644 --- a/src/backends/cl/workloads/ClComparisonWorkload.hpp +++ b/src/backends/cl/workloads/ClComparisonWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLComparison.h> @@ -17,7 +17,7 @@ arm_compute::Status ClComparisonWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ComparisonDescriptor& descriptor); -class ClComparisonWorkload : public BaseWorkload<ComparisonQueueDescriptor> +class ClComparisonWorkload : public ClBaseWorkload<ComparisonQueueDescriptor> { public: ClComparisonWorkload(const ComparisonQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClConcatWorkload.cpp b/src/backends/cl/workloads/ClConcatWorkload.cpp index 50f2acb62b..53c4e2c7ff 100644 --- a/src/backends/cl/workloads/ClConcatWorkload.cpp +++ b/src/backends/cl/workloads/ClConcatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #include "ClConcatWorkload.hpp" @@ -48,7 +48,7 @@ arm_compute::Status ClConcatWorkloadValidate(const std::vector<const TensorInfo* ClConcatWorkload::ClConcatWorkload(const ConcatQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) -: BaseWorkload<ConcatQueueDescriptor>(descriptor, info) +: ClBaseWorkload<ConcatQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClConcatWorkload_Construct", diff --git a/src/backends/cl/workloads/ClConcatWorkload.hpp b/src/backends/cl/workloads/ClConcatWorkload.hpp index f1d780e914..327826c3b4 100644 --- a/src/backends/cl/workloads/ClConcatWorkload.hpp +++ b/src/backends/cl/workloads/ClConcatWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -18,7 +18,7 @@ arm_compute::Status ClConcatWorkloadValidate(const std::vector<const TensorInfo* const TensorInfo& output, const OriginsDescriptor& descriptor); -class ClConcatWorkload : public BaseWorkload<ConcatQueueDescriptor> +class ClConcatWorkload : public ClBaseWorkload<ConcatQueueDescriptor> { public: ClConcatWorkload(const ConcatQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClConstantWorkload.cpp b/src/backends/cl/workloads/ClConstantWorkload.cpp index cd493057a2..d6a4ad66ef 100644 --- a/src/backends/cl/workloads/ClConstantWorkload.cpp +++ b/src/backends/cl/workloads/ClConstantWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -44,7 +44,7 @@ arm_compute::Status ClConstantWorkloadValidate(const TensorInfo& output) ClConstantWorkload::ClConstantWorkload(const ConstantQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext&) - : BaseWorkload<ConstantQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ConstantQueueDescriptor>(descriptor, info) , m_RanOnce(false) { } diff --git a/src/backends/cl/workloads/ClConstantWorkload.hpp b/src/backends/cl/workloads/ClConstantWorkload.hpp index 39e49e7d14..96582636a2 100644 --- a/src/backends/cl/workloads/ClConstantWorkload.hpp +++ b/src/backends/cl/workloads/ClConstantWorkload.hpp @@ -1,12 +1,12 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once #include <arm_compute/core/Error.h> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/CL/CLCompileContext.h> @@ -14,7 +14,7 @@ namespace armnn { arm_compute::Status ClConstantWorkloadValidate(const TensorInfo& output); -class ClConstantWorkload : public BaseWorkload<ConstantQueueDescriptor> +class ClConstantWorkload : public ClBaseWorkload<ConstantQueueDescriptor> { public: ClConstantWorkload(const ConstantQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.cpp b/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.cpp index ccea7c84b8..867770a112 100644 --- a/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.cpp +++ b/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp b/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp index d831cc1dc0..b392c0be2e 100644 --- a/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp +++ b/src/backends/cl/workloads/ClConvertFp16ToFp32Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.cpp b/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.cpp index 9b38b22019..017fcaf454 100644 --- a/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.cpp +++ b/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.hpp b/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.hpp index df25072840..1d777b5256 100644 --- a/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.hpp +++ b/src/backends/cl/workloads/ClConvertFp32ToFp16Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp index 95753053dd..705e92d307 100644 --- a/src/backends/cl/workloads/ClConvolution2dWorkload.cpp +++ b/src/backends/cl/workloads/ClConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -67,7 +67,7 @@ ClConvolution2dWorkload::ClConvolution2dWorkload(const Convolution2dQueueDescrip std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext, const bool isFastMathEnabled) - : BaseWorkload<Convolution2dQueueDescriptor>(descriptor, info) + : ClBaseWorkload<Convolution2dQueueDescriptor>(descriptor, info) , m_ConvolutionLayer(memoryManager) { ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "ClConvolution2dWorkload"); diff --git a/src/backends/cl/workloads/ClConvolution2dWorkload.hpp b/src/backends/cl/workloads/ClConvolution2dWorkload.hpp index e0921ed7ce..8a4599df47 100644 --- a/src/backends/cl/workloads/ClConvolution2dWorkload.hpp +++ b/src/backends/cl/workloads/ClConvolution2dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLConvolutionLayer.h> #include <arm_compute/runtime/MemoryManagerOnDemand.h> @@ -26,7 +26,7 @@ arm_compute::Status ClConvolution2dWorkloadValidate(const TensorInfo& input, bool isFastMathEnabled = false, const ActivationDescriptor* activationDescriptor = nullptr); -class ClConvolution2dWorkload : public BaseWorkload<Convolution2dQueueDescriptor> +class ClConvolution2dWorkload : public ClBaseWorkload<Convolution2dQueueDescriptor> { public: ClConvolution2dWorkload(const Convolution2dQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClConvolution3dWorkload.cpp b/src/backends/cl/workloads/ClConvolution3dWorkload.cpp index a47a3be2df..b096562747 100644 --- a/src/backends/cl/workloads/ClConvolution3dWorkload.cpp +++ b/src/backends/cl/workloads/ClConvolution3dWorkload.cpp @@ -58,7 +58,7 @@ ClConvolution3dWorkload::ClConvolution3dWorkload(const Convolution3dQueueDescrip std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext, const bool isFastMathEnabled) - : BaseWorkload<Convolution3dQueueDescriptor>(descriptor, info) + : ClBaseWorkload<Convolution3dQueueDescriptor>(descriptor, info) , m_ConvolutionLayer() { IgnoreUnused(memoryManager); diff --git a/src/backends/cl/workloads/ClConvolution3dWorkload.hpp b/src/backends/cl/workloads/ClConvolution3dWorkload.hpp index 850cf9b1f2..0c5b233a41 100644 --- a/src/backends/cl/workloads/ClConvolution3dWorkload.hpp +++ b/src/backends/cl/workloads/ClConvolution3dWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLConv3D.h> #include <arm_compute/runtime/MemoryManagerOnDemand.h> @@ -23,7 +23,7 @@ arm_compute::Status ClConvolution3dWorkloadValidate(const TensorInfo& input, bool isFastMathEnabled = false, const ActivationDescriptor* activationDescriptor = nullptr); -class ClConvolution3dWorkload : public BaseWorkload<Convolution3dQueueDescriptor> +class ClConvolution3dWorkload : public ClBaseWorkload<Convolution3dQueueDescriptor> { public: ClConvolution3dWorkload(const Convolution3dQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClDepthToSpaceWorkload.cpp b/src/backends/cl/workloads/ClDepthToSpaceWorkload.cpp index 75a87c7000..28d700c2a0 100644 --- a/src/backends/cl/workloads/ClDepthToSpaceWorkload.cpp +++ b/src/backends/cl/workloads/ClDepthToSpaceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,7 +39,7 @@ arm_compute::Status ClDepthToSpaceWorkloadValidate(const TensorInfo& input, ClDepthToSpaceWorkload::ClDepthToSpaceWorkload(const DepthToSpaceQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<DepthToSpaceQueueDescriptor>(descriptor, info) + : ClBaseWorkload<DepthToSpaceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClDepthToSpaceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClDepthToSpaceWorkload.hpp b/src/backends/cl/workloads/ClDepthToSpaceWorkload.hpp index 014fbb6472..3599b60d8a 100644 --- a/src/backends/cl/workloads/ClDepthToSpaceWorkload.hpp +++ b/src/backends/cl/workloads/ClDepthToSpaceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLDepthToSpaceLayer.h> @@ -18,7 +18,7 @@ arm_compute::Status ClDepthToSpaceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const DepthToSpaceDescriptor& descriptor); -class ClDepthToSpaceWorkload : public BaseWorkload<DepthToSpaceQueueDescriptor> +class ClDepthToSpaceWorkload : public ClBaseWorkload<DepthToSpaceQueueDescriptor> { public: ClDepthToSpaceWorkload(const DepthToSpaceQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp index 73396d6045..f6a071ab98 100644 --- a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp +++ b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -76,7 +76,7 @@ ClDepthwiseConvolutionWorkload::ClDepthwiseConvolutionWorkload( const DepthwiseConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<DepthwiseConvolution2dQueueDescriptor>(descriptor, info) + : ClBaseWorkload<DepthwiseConvolution2dQueueDescriptor>(descriptor, info) { // Add details for profiling output WorkloadInfo detailsInfo; diff --git a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.hpp b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.hpp index aab8c852c1..7a99d6c466 100644 --- a/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.hpp +++ b/src/backends/cl/workloads/ClDepthwiseConvolutionWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/core/Error.h> @@ -21,7 +21,7 @@ arm_compute::Status ClDepthwiseConvolutionWorkloadValidate(const TensorInfo& inp const Optional<TensorInfo>& biases, const ActivationDescriptor* activationDescriptor = nullptr); -class ClDepthwiseConvolutionWorkload : public BaseWorkload<DepthwiseConvolution2dQueueDescriptor> +class ClDepthwiseConvolutionWorkload : public ClBaseWorkload<DepthwiseConvolution2dQueueDescriptor> { public: using BaseWorkload<DepthwiseConvolution2dQueueDescriptor>::m_Data; diff --git a/src/backends/cl/workloads/ClDequantizeWorkload.cpp b/src/backends/cl/workloads/ClDequantizeWorkload.cpp index 772d126d65..0081fb8d25 100644 --- a/src/backends/cl/workloads/ClDequantizeWorkload.cpp +++ b/src/backends/cl/workloads/ClDequantizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -30,7 +30,7 @@ arm_compute::Status ClDequantizeWorkloadValidate(const TensorInfo& input, const ClDequantizeWorkload::ClDequantizeWorkload(const DequantizeQueueDescriptor& descriptor, const WorkloadInfo& workloadInfo, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<DequantizeQueueDescriptor>(descriptor, workloadInfo) + : ClBaseWorkload<DequantizeQueueDescriptor>(descriptor, workloadInfo) { m_Data.ValidateInputsOutputs("ClDequantizeWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClDequantizeWorkload.hpp b/src/backends/cl/workloads/ClDequantizeWorkload.hpp index 24babd36c9..eaf7fb99ef 100644 --- a/src/backends/cl/workloads/ClDequantizeWorkload.hpp +++ b/src/backends/cl/workloads/ClDequantizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLDequantizationLayer.h> @@ -14,7 +14,7 @@ namespace armnn arm_compute::Status ClDequantizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClDequantizeWorkload : public BaseWorkload<DequantizeQueueDescriptor> +class ClDequantizeWorkload : public ClBaseWorkload<DequantizeQueueDescriptor> { public: ClDequantizeWorkload(const DequantizeQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClDivisionWorkload.cpp b/src/backends/cl/workloads/ClDivisionWorkload.cpp index 9c30d9143e..cfcb1046cc 100644 --- a/src/backends/cl/workloads/ClDivisionWorkload.cpp +++ b/src/backends/cl/workloads/ClDivisionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -34,7 +34,7 @@ arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, ClDivisionWorkload::ClDivisionWorkload(const DivisionQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<DivisionQueueDescriptor>(descriptor, info) + : ClBaseWorkload<DivisionQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClDivisionWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClDivisionWorkload.hpp b/src/backends/cl/workloads/ClDivisionWorkload.hpp index 8018f5a522..786dcc8f12 100644 --- a/src/backends/cl/workloads/ClDivisionWorkload.hpp +++ b/src/backends/cl/workloads/ClDivisionWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> @@ -17,14 +17,14 @@ arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ActivationDescriptor* activationDescriptor = nullptr); -class ClDivisionWorkload : public BaseWorkload<DivisionQueueDescriptor> +class ClDivisionWorkload : public ClBaseWorkload<DivisionQueueDescriptor> { public: ClDivisionWorkload(const DivisionQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext); - using BaseWorkload<DivisionQueueDescriptor>::BaseWorkload; + using ClBaseWorkload<DivisionQueueDescriptor>::ClBaseWorkload; void Execute() const override; private: diff --git a/src/backends/cl/workloads/ClExpWorkload.cpp b/src/backends/cl/workloads/ClExpWorkload.cpp index eeb6637705..15da905051 100644 --- a/src/backends/cl/workloads/ClExpWorkload.cpp +++ b/src/backends/cl/workloads/ClExpWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status ClExpWorkloadValidate(const TensorInfo& input, const TensorI ClExpWorkload::ClExpWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClExpWorkload_Construct", diff --git a/src/backends/cl/workloads/ClExpWorkload.hpp b/src/backends/cl/workloads/ClExpWorkload.hpp index e1f74f8db3..9e7f4acb3c 100644 --- a/src/backends/cl/workloads/ClExpWorkload.hpp +++ b/src/backends/cl/workloads/ClExpWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClExpWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClExpWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClExpWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClExpWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClFillWorkload.cpp b/src/backends/cl/workloads/ClFillWorkload.cpp index 2f95bc564c..d0a43a2cee 100644 --- a/src/backends/cl/workloads/ClFillWorkload.cpp +++ b/src/backends/cl/workloads/ClFillWorkload.cpp @@ -18,7 +18,7 @@ using namespace armcomputetensorutils; ClFillWorkload::ClFillWorkload(const FillQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<FillQueueDescriptor>(descriptor, info) + : ClBaseWorkload<FillQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClFillWorkload_Construct", diff --git a/src/backends/cl/workloads/ClFillWorkload.hpp b/src/backends/cl/workloads/ClFillWorkload.hpp index b0f9fe19e1..f104f78d6f 100644 --- a/src/backends/cl/workloads/ClFillWorkload.hpp +++ b/src/backends/cl/workloads/ClFillWorkload.hpp @@ -6,12 +6,12 @@ #pragma once #include <armnn/backends/WorkloadData.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLFill.h> namespace armnn { -class ClFillWorkload : public BaseWorkload<FillQueueDescriptor> +class ClFillWorkload : public ClBaseWorkload<FillQueueDescriptor> { public: ClFillWorkload(const FillQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClFloorFloatWorkload.cpp b/src/backends/cl/workloads/ClFloorFloatWorkload.cpp index 5db8cc6a7d..679e225c63 100644 --- a/src/backends/cl/workloads/ClFloorFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClFloorFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClFloorFloatWorkload.hpp b/src/backends/cl/workloads/ClFloorFloatWorkload.hpp index 4e09311867..5740c6887a 100644 --- a/src/backends/cl/workloads/ClFloorFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClFloorFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp b/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp index 532d0d45da..3eb53e64b4 100644 --- a/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp +++ b/src/backends/cl/workloads/ClFullyConnectedWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -50,7 +50,7 @@ ClFullyConnectedWorkload::ClFullyConnectedWorkload( const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<FullyConnectedQueueDescriptor>(descriptor, info), m_FullyConnectedLayer(memoryManager) + : ClBaseWorkload<FullyConnectedQueueDescriptor>(descriptor, info), m_FullyConnectedLayer(memoryManager) { // Add details for profiling output WorkloadInfo detailsInfo; diff --git a/src/backends/cl/workloads/ClFullyConnectedWorkload.hpp b/src/backends/cl/workloads/ClFullyConnectedWorkload.hpp index 6576fb2078..210757779f 100644 --- a/src/backends/cl/workloads/ClFullyConnectedWorkload.hpp +++ b/src/backends/cl/workloads/ClFullyConnectedWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLFullyConnectedLayer.h> #include <arm_compute/runtime/MemoryManagerOnDemand.h> @@ -22,15 +22,15 @@ arm_compute::Status ClFullyConnectedWorkloadValidate(const TensorInfo& input, const FullyConnectedDescriptor& descriptor, const ActivationDescriptor* activationDescriptor = nullptr); -class ClFullyConnectedWorkload : public armnn::BaseWorkload<armnn::FullyConnectedQueueDescriptor> +class ClFullyConnectedWorkload : public ClBaseWorkload<FullyConnectedQueueDescriptor> { public: - ClFullyConnectedWorkload(const armnn::FullyConnectedQueueDescriptor& descriptor, - const armnn::WorkloadInfo& info, + ClFullyConnectedWorkload(const FullyConnectedQueueDescriptor& descriptor, + const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext); - using armnn::BaseWorkload<armnn::FullyConnectedQueueDescriptor>::m_Data; + using ClBaseWorkload<FullyConnectedQueueDescriptor>::m_Data; void Execute() const override; private: diff --git a/src/backends/cl/workloads/ClGatherWorkload.cpp b/src/backends/cl/workloads/ClGatherWorkload.cpp index 06fa5af65e..55bf422d19 100644 --- a/src/backends/cl/workloads/ClGatherWorkload.cpp +++ b/src/backends/cl/workloads/ClGatherWorkload.cpp @@ -29,7 +29,7 @@ arm_compute::Status ClGatherWorkloadValidate(const TensorInfo& input, ClGatherWorkload::ClGatherWorkload(const GatherQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<GatherQueueDescriptor>(descriptor, info) + : ClBaseWorkload<GatherQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClGatherWorkload_Construct", diff --git a/src/backends/cl/workloads/ClGatherWorkload.hpp b/src/backends/cl/workloads/ClGatherWorkload.hpp index e6d198dc27..264e276358 100644 --- a/src/backends/cl/workloads/ClGatherWorkload.hpp +++ b/src/backends/cl/workloads/ClGatherWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLGather.h> @@ -16,7 +16,7 @@ arm_compute::Status ClGatherWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const GatherDescriptor& descriptor); -class ClGatherWorkload : public BaseWorkload<GatherQueueDescriptor> +class ClGatherWorkload : public ClBaseWorkload<GatherQueueDescriptor> { public: ClGatherWorkload(const GatherQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClInstanceNormalizationWorkload.cpp b/src/backends/cl/workloads/ClInstanceNormalizationWorkload.cpp index 58e65ddab7..54114c11d3 100644 --- a/src/backends/cl/workloads/ClInstanceNormalizationWorkload.cpp +++ b/src/backends/cl/workloads/ClInstanceNormalizationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -33,7 +33,7 @@ ClInstanceNormalizationWorkload::ClInstanceNormalizationWorkload( const InstanceNormalizationQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<InstanceNormalizationQueueDescriptor>(descriptor, info) + : ClBaseWorkload<InstanceNormalizationQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClInstanceNormalizationWorkload_Construct", diff --git a/src/backends/cl/workloads/ClInstanceNormalizationWorkload.hpp b/src/backends/cl/workloads/ClInstanceNormalizationWorkload.hpp index 250cd4d1b1..f6e49722e6 100644 --- a/src/backends/cl/workloads/ClInstanceNormalizationWorkload.hpp +++ b/src/backends/cl/workloads/ClInstanceNormalizationWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLInstanceNormalizationLayer.h> @@ -16,7 +16,7 @@ arm_compute::Status ClInstanceNormalizationWorkloadValidate(const TensorInfo& in const TensorInfo& output, const InstanceNormalizationDescriptor& descriptor); -class ClInstanceNormalizationWorkload : public BaseWorkload<InstanceNormalizationQueueDescriptor> +class ClInstanceNormalizationWorkload : public ClBaseWorkload<InstanceNormalizationQueueDescriptor> { public: ClInstanceNormalizationWorkload(const InstanceNormalizationQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.cpp b/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.cpp index 39cbe711e2..b34153fff0 100644 --- a/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.hpp b/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.hpp index 12ca0a10b1..cfa1a97eec 100644 --- a/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClL2NormalizationFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClLogSoftmaxWorkload.cpp b/src/backends/cl/workloads/ClLogSoftmaxWorkload.cpp index b75c6b0266..67c366d1b1 100644 --- a/src/backends/cl/workloads/ClLogSoftmaxWorkload.cpp +++ b/src/backends/cl/workloads/ClLogSoftmaxWorkload.cpp @@ -29,7 +29,7 @@ ClLogSoftmaxWorkload::ClLogSoftmaxWorkload(const LogSoftmaxQueueDescriptor& desc const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<LogSoftmaxQueueDescriptor>(descriptor, info) + : ClBaseWorkload<LogSoftmaxQueueDescriptor>(descriptor, info) , m_LogSoftmaxLayer(memoryManager) { // Report Profiling Details diff --git a/src/backends/cl/workloads/ClLogSoftmaxWorkload.hpp b/src/backends/cl/workloads/ClLogSoftmaxWorkload.hpp index 4eb86eac8a..988408c9b7 100644 --- a/src/backends/cl/workloads/ClLogSoftmaxWorkload.hpp +++ b/src/backends/cl/workloads/ClLogSoftmaxWorkload.hpp @@ -12,7 +12,7 @@ #include <arm_compute/runtime/CL/functions/CLSoftmaxLayer.h> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" namespace armnn { @@ -21,7 +21,7 @@ arm_compute::Status ClLogSoftmaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const LogSoftmaxDescriptor& descriptor); -class ClLogSoftmaxWorkload : public BaseWorkload<LogSoftmaxQueueDescriptor> +class ClLogSoftmaxWorkload : public ClBaseWorkload<LogSoftmaxQueueDescriptor> { public: ClLogSoftmaxWorkload(const LogSoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, diff --git a/src/backends/cl/workloads/ClLogWorkload.cpp b/src/backends/cl/workloads/ClLogWorkload.cpp index d13a0eaa3f..024a634093 100644 --- a/src/backends/cl/workloads/ClLogWorkload.cpp +++ b/src/backends/cl/workloads/ClLogWorkload.cpp @@ -26,7 +26,7 @@ arm_compute::Status ClLogWorkloadValidate(const TensorInfo& input, const TensorI ClLogWorkload::ClLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClLogWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClLogWorkload.hpp b/src/backends/cl/workloads/ClLogWorkload.hpp index 5a2992a64c..7eec3fc8f4 100644 --- a/src/backends/cl/workloads/ClLogWorkload.hpp +++ b/src/backends/cl/workloads/ClLogWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClLogWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClLogWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClLogWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClLogicalAndWorkload.cpp b/src/backends/cl/workloads/ClLogicalAndWorkload.cpp index 481d87c4ff..c37a300a1c 100644 --- a/src/backends/cl/workloads/ClLogicalAndWorkload.cpp +++ b/src/backends/cl/workloads/ClLogicalAndWorkload.cpp @@ -34,7 +34,7 @@ arm_compute::Status ClLogicalAndWorkloadValidate(const TensorInfo& input0, ClLogicalAndWorkload::ClLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClLogicalAndWorkload_Construct", diff --git a/src/backends/cl/workloads/ClLogicalAndWorkload.hpp b/src/backends/cl/workloads/ClLogicalAndWorkload.hpp index 547995eed9..571b9af9f2 100644 --- a/src/backends/cl/workloads/ClLogicalAndWorkload.hpp +++ b/src/backends/cl/workloads/ClLogicalAndWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLLogicalAnd.h> @@ -17,7 +17,7 @@ arm_compute::Status ClLogicalAndWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class ClLogicalAndWorkload : public BaseWorkload<LogicalBinaryQueueDescriptor> +class ClLogicalAndWorkload : public ClBaseWorkload<LogicalBinaryQueueDescriptor> { public: ClLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClLogicalNotWorkload.cpp b/src/backends/cl/workloads/ClLogicalNotWorkload.cpp index c61f8443b7..9d2f8fd4d2 100644 --- a/src/backends/cl/workloads/ClLogicalNotWorkload.cpp +++ b/src/backends/cl/workloads/ClLogicalNotWorkload.cpp @@ -31,7 +31,7 @@ arm_compute::Status ClLogicalNotWorkloadValidate(const TensorInfo& input, ClLogicalNotWorkload::ClLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClLogicalNotWorkload_Construct", diff --git a/src/backends/cl/workloads/ClLogicalNotWorkload.hpp b/src/backends/cl/workloads/ClLogicalNotWorkload.hpp index 2dc0d095f8..7623492e8d 100644 --- a/src/backends/cl/workloads/ClLogicalNotWorkload.hpp +++ b/src/backends/cl/workloads/ClLogicalNotWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLLogicalNot.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClLogicalNotWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClLogicalNotWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClLogicalNotWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClLogicalOrWorkload.cpp b/src/backends/cl/workloads/ClLogicalOrWorkload.cpp index 307af2086a..7e3cce1d95 100644 --- a/src/backends/cl/workloads/ClLogicalOrWorkload.cpp +++ b/src/backends/cl/workloads/ClLogicalOrWorkload.cpp @@ -34,7 +34,7 @@ arm_compute::Status ClLogicalOrWorkloadValidate(const TensorInfo& input0, ClLogicalOrWorkload::ClLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClLogicalOrWorkload_Construct", diff --git a/src/backends/cl/workloads/ClLogicalOrWorkload.hpp b/src/backends/cl/workloads/ClLogicalOrWorkload.hpp index ada72c2654..03c8114cb6 100644 --- a/src/backends/cl/workloads/ClLogicalOrWorkload.hpp +++ b/src/backends/cl/workloads/ClLogicalOrWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLLogicalOr.h> @@ -17,7 +17,7 @@ arm_compute::Status ClLogicalOrWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class ClLogicalOrWorkload : public BaseWorkload<LogicalBinaryQueueDescriptor> +class ClLogicalOrWorkload : public ClBaseWorkload<LogicalBinaryQueueDescriptor> { public: ClLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClLstmFloatWorkload.cpp b/src/backends/cl/workloads/ClLstmFloatWorkload.cpp index c7b644c46a..d8d95f5c74 100644 --- a/src/backends/cl/workloads/ClLstmFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClLstmFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClLstmFloatWorkload.hpp b/src/backends/cl/workloads/ClLstmFloatWorkload.hpp index bfa98d46b2..b9faca8b54 100644 --- a/src/backends/cl/workloads/ClLstmFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClLstmFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClMaximumWorkload.cpp b/src/backends/cl/workloads/ClMaximumWorkload.cpp index 421a5310a7..21f1a2324f 100644 --- a/src/backends/cl/workloads/ClMaximumWorkload.cpp +++ b/src/backends/cl/workloads/ClMaximumWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,7 +39,7 @@ arm_compute::Status ClMaximumWorkloadValidate(const TensorInfo& input0, ClMaximumWorkload::ClMaximumWorkload(const MaximumQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<MaximumQueueDescriptor>(descriptor, info) + : ClBaseWorkload<MaximumQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClMaximumWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClMaximumWorkload.hpp b/src/backends/cl/workloads/ClMaximumWorkload.hpp index 55a375b939..c453c0a47a 100644 --- a/src/backends/cl/workloads/ClMaximumWorkload.hpp +++ b/src/backends/cl/workloads/ClMaximumWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> @@ -16,7 +16,7 @@ arm_compute::Status ClMaximumWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class ClMaximumWorkload : public BaseWorkload<MaximumQueueDescriptor> +class ClMaximumWorkload : public ClBaseWorkload<MaximumQueueDescriptor> { public: ClMaximumWorkload(const MaximumQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClMeanWorkload.cpp b/src/backends/cl/workloads/ClMeanWorkload.cpp index 074b4b2061..b59eb6f8e4 100644 --- a/src/backends/cl/workloads/ClMeanWorkload.cpp +++ b/src/backends/cl/workloads/ClMeanWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -31,7 +31,7 @@ arm_compute::Status ClMeanValidate(const TensorInfo& input, ClMeanWorkload::ClMeanWorkload(const MeanQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<MeanQueueDescriptor>(descriptor, info) + : ClBaseWorkload<MeanQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClMeanWorkload_Construct", diff --git a/src/backends/cl/workloads/ClMeanWorkload.hpp b/src/backends/cl/workloads/ClMeanWorkload.hpp index 0ea6c595d7..2a12cb44aa 100644 --- a/src/backends/cl/workloads/ClMeanWorkload.hpp +++ b/src/backends/cl/workloads/ClMeanWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLReduceMean.h> @@ -16,7 +16,7 @@ arm_compute::Status ClMeanValidate(const TensorInfo& input, const TensorInfo& output, const MeanDescriptor& descriptor); -class ClMeanWorkload : public BaseWorkload<MeanQueueDescriptor> +class ClMeanWorkload : public ClBaseWorkload<MeanQueueDescriptor> { public: ClMeanWorkload(const MeanQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClMinimumWorkload.cpp b/src/backends/cl/workloads/ClMinimumWorkload.cpp index 934598c3dc..5c329062a3 100644 --- a/src/backends/cl/workloads/ClMinimumWorkload.cpp +++ b/src/backends/cl/workloads/ClMinimumWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,7 +39,7 @@ arm_compute::Status ClMinimumWorkloadValidate(const TensorInfo& input0, ClMinimumWorkload::ClMinimumWorkload(const MinimumQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<MinimumQueueDescriptor>(descriptor, info) + : ClBaseWorkload<MinimumQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClMinimumWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClMinimumWorkload.hpp b/src/backends/cl/workloads/ClMinimumWorkload.hpp index 061788f81a..31d821afb4 100644 --- a/src/backends/cl/workloads/ClMinimumWorkload.hpp +++ b/src/backends/cl/workloads/ClMinimumWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> @@ -16,7 +16,7 @@ arm_compute::Status ClMinimumWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class ClMinimumWorkload : public BaseWorkload<MinimumQueueDescriptor> +class ClMinimumWorkload : public ClBaseWorkload<MinimumQueueDescriptor> { public: ClMinimumWorkload(const MinimumQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClMultiplicationWorkload.cpp b/src/backends/cl/workloads/ClMultiplicationWorkload.cpp index 0ef4d9a3de..99822b3a65 100644 --- a/src/backends/cl/workloads/ClMultiplicationWorkload.cpp +++ b/src/backends/cl/workloads/ClMultiplicationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -47,7 +47,7 @@ arm_compute::Status ClMultiplicationWorkloadValidate(const TensorInfo& input0, ClMultiplicationWorkload::ClMultiplicationWorkload(const MultiplicationQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<MultiplicationQueueDescriptor>(descriptor, info) + : ClBaseWorkload<MultiplicationQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClMultiplicationWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClMultiplicationWorkload.hpp b/src/backends/cl/workloads/ClMultiplicationWorkload.hpp index 5db81d6f86..a01efb82c8 100644 --- a/src/backends/cl/workloads/ClMultiplicationWorkload.hpp +++ b/src/backends/cl/workloads/ClMultiplicationWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLPixelWiseMultiplication.h> @@ -17,14 +17,14 @@ arm_compute::Status ClMultiplicationWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ActivationDescriptor* activationDescriptor = nullptr); -class ClMultiplicationWorkload : public BaseWorkload<MultiplicationQueueDescriptor> +class ClMultiplicationWorkload : public ClBaseWorkload<MultiplicationQueueDescriptor> { public: ClMultiplicationWorkload(const MultiplicationQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext); - using BaseWorkload<MultiplicationQueueDescriptor>::BaseWorkload; + using ClBaseWorkload<MultiplicationQueueDescriptor>::ClBaseWorkload; void Execute() const override; private: diff --git a/src/backends/cl/workloads/ClNegWorkload.cpp b/src/backends/cl/workloads/ClNegWorkload.cpp index c606189e83..94b5fcbdb6 100644 --- a/src/backends/cl/workloads/ClNegWorkload.cpp +++ b/src/backends/cl/workloads/ClNegWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status ClNegWorkloadValidate(const TensorInfo& input, const TensorI ClNegWorkload::ClNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClNegWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClNegWorkload.hpp b/src/backends/cl/workloads/ClNegWorkload.hpp index 77092e1d7d..e43f3fef93 100644 --- a/src/backends/cl/workloads/ClNegWorkload.hpp +++ b/src/backends/cl/workloads/ClNegWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClNegWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClNegWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClNegWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClNormalizationFloatWorkload.cpp b/src/backends/cl/workloads/ClNormalizationFloatWorkload.cpp index b61869b852..d98532d7d1 100644 --- a/src/backends/cl/workloads/ClNormalizationFloatWorkload.cpp +++ b/src/backends/cl/workloads/ClNormalizationFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClNormalizationFloatWorkload.hpp b/src/backends/cl/workloads/ClNormalizationFloatWorkload.hpp index b3a16351cc..40b2693cd4 100644 --- a/src/backends/cl/workloads/ClNormalizationFloatWorkload.hpp +++ b/src/backends/cl/workloads/ClNormalizationFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/cl/workloads/ClPadWorkload.cpp b/src/backends/cl/workloads/ClPadWorkload.cpp index 4f8c34cb77..aecfb278c5 100644 --- a/src/backends/cl/workloads/ClPadWorkload.cpp +++ b/src/backends/cl/workloads/ClPadWorkload.cpp @@ -19,7 +19,7 @@ using namespace armcomputetensorutils; ClPadWorkload::ClPadWorkload(const PadQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<PadQueueDescriptor>(descriptor, info) + : ClBaseWorkload<PadQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClPadWorkload_Construct", diff --git a/src/backends/cl/workloads/ClPadWorkload.hpp b/src/backends/cl/workloads/ClPadWorkload.hpp index 83ec5a4825..06c206bfb9 100644 --- a/src/backends/cl/workloads/ClPadWorkload.hpp +++ b/src/backends/cl/workloads/ClPadWorkload.hpp @@ -1,17 +1,17 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once #include <armnn/backends/WorkloadData.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLPadLayer.h> namespace armnn { -class ClPadWorkload : public BaseWorkload<PadQueueDescriptor> +class ClPadWorkload : public ClBaseWorkload<PadQueueDescriptor> { public: ClPadWorkload(const PadQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClPermuteWorkload.cpp b/src/backends/cl/workloads/ClPermuteWorkload.cpp index 641e871d50..f3d12ae72c 100644 --- a/src/backends/cl/workloads/ClPermuteWorkload.cpp +++ b/src/backends/cl/workloads/ClPermuteWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ arm_compute::Status ClPermuteWorkloadValidate(const TensorInfo& input, ClPermuteWorkload::ClPermuteWorkload(const PermuteQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<PermuteQueueDescriptor>(descriptor, info) + : ClBaseWorkload<PermuteQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClPermuteWorkload_Construct", diff --git a/src/backends/cl/workloads/ClPermuteWorkload.hpp b/src/backends/cl/workloads/ClPermuteWorkload.hpp index f0f12d7b7a..a7afbc7b34 100644 --- a/src/backends/cl/workloads/ClPermuteWorkload.hpp +++ b/src/backends/cl/workloads/ClPermuteWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include <armnn/TypesUtils.hpp> @@ -20,7 +20,7 @@ arm_compute::Status ClPermuteWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const PermuteDescriptor& descriptor); -class ClPermuteWorkload : public BaseWorkload<PermuteQueueDescriptor> +class ClPermuteWorkload : public ClBaseWorkload<PermuteQueueDescriptor> { public: static const std::string& GetName() diff --git a/src/backends/cl/workloads/ClPooling2dWorkload.cpp b/src/backends/cl/workloads/ClPooling2dWorkload.cpp index f967c6dd39..40a794ea2e 100644 --- a/src/backends/cl/workloads/ClPooling2dWorkload.cpp +++ b/src/backends/cl/workloads/ClPooling2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -31,7 +31,7 @@ ClPooling2dWorkload::ClPooling2dWorkload( const Pooling2dQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<Pooling2dQueueDescriptor>(descriptor, info) + : ClBaseWorkload<Pooling2dQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClPooling2dWorkload_Construct", diff --git a/src/backends/cl/workloads/ClPooling2dWorkload.hpp b/src/backends/cl/workloads/ClPooling2dWorkload.hpp index 451a28501a..ce583117e0 100644 --- a/src/backends/cl/workloads/ClPooling2dWorkload.hpp +++ b/src/backends/cl/workloads/ClPooling2dWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLPoolingLayer.h> @@ -16,7 +16,7 @@ arm_compute::Status ClPooling2dWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const Pooling2dDescriptor& descriptor); -class ClPooling2dWorkload : public BaseWorkload<Pooling2dQueueDescriptor> +class ClPooling2dWorkload : public ClBaseWorkload<Pooling2dQueueDescriptor> { public: using BaseWorkload<Pooling2dQueueDescriptor>::m_Data; diff --git a/src/backends/cl/workloads/ClPreluWorkload.cpp b/src/backends/cl/workloads/ClPreluWorkload.cpp index 81d40db7b1..b2b8eebfaf 100644 --- a/src/backends/cl/workloads/ClPreluWorkload.cpp +++ b/src/backends/cl/workloads/ClPreluWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ arm_compute::Status ClPreluWorkloadValidate(const TensorInfo& input, ClPreluWorkload::ClPreluWorkload(const PreluQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<PreluQueueDescriptor>(descriptor, info) + : ClBaseWorkload<PreluQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClPreluWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClPreluWorkload.hpp b/src/backends/cl/workloads/ClPreluWorkload.hpp index 6b0520f2e6..abc77708b9 100644 --- a/src/backends/cl/workloads/ClPreluWorkload.hpp +++ b/src/backends/cl/workloads/ClPreluWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLPReluLayer.h> @@ -15,7 +15,7 @@ arm_compute::Status ClPreluWorkloadValidate(const TensorInfo& input, const TensorInfo& alpha, const TensorInfo& output); -class ClPreluWorkload : public BaseWorkload<PreluQueueDescriptor> +class ClPreluWorkload : public ClBaseWorkload<PreluQueueDescriptor> { public: ClPreluWorkload(const PreluQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClQLstmWorkload.cpp b/src/backends/cl/workloads/ClQLstmWorkload.cpp index b2c1d6d63b..92090e666c 100644 --- a/src/backends/cl/workloads/ClQLstmWorkload.cpp +++ b/src/backends/cl/workloads/ClQLstmWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -17,7 +17,7 @@ using namespace armcomputetensorutils; ClQLstmWorkload::ClQLstmWorkload(const QLstmQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<QLstmQueueDescriptor>(descriptor, info) + : ClBaseWorkload<QLstmQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClQLstmWorkload_Construct", diff --git a/src/backends/cl/workloads/ClQLstmWorkload.hpp b/src/backends/cl/workloads/ClQLstmWorkload.hpp index 6c389064d0..133665a6d5 100644 --- a/src/backends/cl/workloads/ClQLstmWorkload.hpp +++ b/src/backends/cl/workloads/ClQLstmWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/Descriptors.hpp> #include <armnn/LstmParams.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include "arm_compute/graph/Tensor.h" @@ -16,7 +16,7 @@ namespace armnn { -class ClQLstmWorkload : public BaseWorkload<QLstmQueueDescriptor> +class ClQLstmWorkload : public ClBaseWorkload<QLstmQueueDescriptor> { public: ClQLstmWorkload(const QLstmQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClQuantizeWorkload.cpp b/src/backends/cl/workloads/ClQuantizeWorkload.cpp index be17edd7fd..add2f3d9a0 100644 --- a/src/backends/cl/workloads/ClQuantizeWorkload.cpp +++ b/src/backends/cl/workloads/ClQuantizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -32,7 +32,7 @@ arm_compute::Status ClQuantizeWorkloadValidate(const TensorInfo& input, ClQuantizeWorkload::ClQuantizeWorkload(const QuantizeQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<QuantizeQueueDescriptor>(descriptor, info) + : ClBaseWorkload<QuantizeQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClQuantizeWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClQuantizeWorkload.hpp b/src/backends/cl/workloads/ClQuantizeWorkload.hpp index cf459b20e0..00833c4334 100644 --- a/src/backends/cl/workloads/ClQuantizeWorkload.hpp +++ b/src/backends/cl/workloads/ClQuantizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLQuantizationLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClQuantizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClQuantizeWorkload : public BaseWorkload<QuantizeQueueDescriptor> +class ClQuantizeWorkload : public ClBaseWorkload<QuantizeQueueDescriptor> { public: ClQuantizeWorkload(const QuantizeQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClQuantizedLstmWorkload.cpp b/src/backends/cl/workloads/ClQuantizedLstmWorkload.cpp index ad1d143aa7..0fb19ecd71 100644 --- a/src/backends/cl/workloads/ClQuantizedLstmWorkload.cpp +++ b/src/backends/cl/workloads/ClQuantizedLstmWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -63,8 +63,8 @@ arm_compute::Status ClQuantizedLstmWorkloadValidate(const TensorInfo& input, con ClQuantizedLstmWorkload::ClQuantizedLstmWorkload(const QuantizedLstmQueueDescriptor &descriptor, const WorkloadInfo &info, - const arm_compute::CLCompileContext& clCompileContext): - BaseWorkload<QuantizedLstmQueueDescriptor>(descriptor, info) + const arm_compute::CLCompileContext& clCompileContext) + : ClBaseWorkload<QuantizedLstmQueueDescriptor>(descriptor, info) { m_InputToInputWeightsTensor = std::make_unique<arm_compute::CLTensor>(); BuildArmComputeTensor(*m_InputToInputWeightsTensor, m_Data.m_InputToInputWeights->GetTensorInfo()); diff --git a/src/backends/cl/workloads/ClQuantizedLstmWorkload.hpp b/src/backends/cl/workloads/ClQuantizedLstmWorkload.hpp index 48b0b27525..65d874b5f3 100644 --- a/src/backends/cl/workloads/ClQuantizedLstmWorkload.hpp +++ b/src/backends/cl/workloads/ClQuantizedLstmWorkload.hpp @@ -1,10 +1,12 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once +#include "ClBaseWorkload.hpp" + #include <armnn/QuantizedLstmParams.hpp> #include <armnn/backends/Workload.hpp> #include <armnn/backends/WorkloadData.hpp> @@ -19,7 +21,7 @@ arm_compute::Status ClQuantizedLstmWorkloadValidate(const TensorInfo& input, con const TensorInfo& output, const QuantizedLstmInputParamsInfo& paramsInfo); -class ClQuantizedLstmWorkload : public BaseWorkload<QuantizedLstmQueueDescriptor> +class ClQuantizedLstmWorkload : public ClBaseWorkload<QuantizedLstmQueueDescriptor> { public: ClQuantizedLstmWorkload(const QuantizedLstmQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClRankWorkload.hpp b/src/backends/cl/workloads/ClRankWorkload.hpp index b5a856ff07..8a7e2c2078 100644 --- a/src/backends/cl/workloads/ClRankWorkload.hpp +++ b/src/backends/cl/workloads/ClRankWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include "ClWorkloadUtils.hpp" @@ -13,10 +13,10 @@ namespace armnn { -struct ClRankWorkload : public BaseWorkload<RankQueueDescriptor> +struct ClRankWorkload : public ClBaseWorkload<RankQueueDescriptor> { public: - using BaseWorkload<RankQueueDescriptor>::BaseWorkload; + using ClBaseWorkload<RankQueueDescriptor>::ClBaseWorkload; virtual void Execute() const override { const ClTensorHandle* clTensorHandle = PolymorphicDowncast<const ClTensorHandle*>(m_Data.m_Inputs[0]); diff --git a/src/backends/cl/workloads/ClReduceWorkload.cpp b/src/backends/cl/workloads/ClReduceWorkload.cpp index b5f10292e5..ace76935c4 100644 --- a/src/backends/cl/workloads/ClReduceWorkload.cpp +++ b/src/backends/cl/workloads/ClReduceWorkload.cpp @@ -44,7 +44,7 @@ arm_compute::Status ClReduceWorkloadValidate(const TensorInfo& input, } ClReduceWorkload::ClReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ReduceQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ReduceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClReduceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClReduceWorkload.hpp b/src/backends/cl/workloads/ClReduceWorkload.hpp index a9c1409dcf..c63c3137bd 100644 --- a/src/backends/cl/workloads/ClReduceWorkload.hpp +++ b/src/backends/cl/workloads/ClReduceWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLReductionOperation.h> @@ -16,7 +16,7 @@ arm_compute::Status ClReduceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ReduceDescriptor& descriptor); -class ClReduceWorkload : public BaseWorkload<ReduceQueueDescriptor> +class ClReduceWorkload : public ClBaseWorkload<ReduceQueueDescriptor> { public: ClReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/cl/workloads/ClReshapeWorkload.cpp b/src/backends/cl/workloads/ClReshapeWorkload.cpp index 8ca05d0af1..b666e7cc7b 100644 --- a/src/backends/cl/workloads/ClReshapeWorkload.cpp +++ b/src/backends/cl/workloads/ClReshapeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -24,7 +24,7 @@ arm_compute::Status ClReshapeWorkloadValidate(const TensorInfo& input, ClReshapeWorkload::ClReshapeWorkload(const ReshapeQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ReshapeQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ReshapeQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClReshapeWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClReshapeWorkload.hpp b/src/backends/cl/workloads/ClReshapeWorkload.hpp index 9acfc838b4..d3533e64bd 100644 --- a/src/backends/cl/workloads/ClReshapeWorkload.hpp +++ b/src/backends/cl/workloads/ClReshapeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLReshapeLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClReshapeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClReshapeWorkload : public BaseWorkload<ReshapeQueueDescriptor> +class ClReshapeWorkload : public ClBaseWorkload<ReshapeQueueDescriptor> { public: ClReshapeWorkload(const ReshapeQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClResizeWorkload.cpp b/src/backends/cl/workloads/ClResizeWorkload.cpp index 628cbbd752..7d6d938d5e 100644 --- a/src/backends/cl/workloads/ClResizeWorkload.cpp +++ b/src/backends/cl/workloads/ClResizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -49,7 +49,7 @@ arm_compute::Status ClResizeWorkloadValidate(const TensorInfo& input, ClResizeWorkload::ClResizeWorkload(const ResizeQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ResizeQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ResizeQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClResizeWorkload_Construct", diff --git a/src/backends/cl/workloads/ClResizeWorkload.hpp b/src/backends/cl/workloads/ClResizeWorkload.hpp index f062eb70b5..8a345514af 100644 --- a/src/backends/cl/workloads/ClResizeWorkload.hpp +++ b/src/backends/cl/workloads/ClResizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLScale.h> @@ -16,7 +16,7 @@ arm_compute::Status ClResizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ResizeDescriptor& descriptor); -class ClResizeWorkload : public BaseWorkload<ResizeQueueDescriptor> +class ClResizeWorkload : public ClBaseWorkload<ResizeQueueDescriptor> { public: ClResizeWorkload(const ResizeQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClRsqrtWorkload.cpp b/src/backends/cl/workloads/ClRsqrtWorkload.cpp index b8ae2f6d59..3bc5f38166 100644 --- a/src/backends/cl/workloads/ClRsqrtWorkload.cpp +++ b/src/backends/cl/workloads/ClRsqrtWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status ClRsqrtWorkloadValidate(const TensorInfo& input, const Tenso ClRsqrtWorkload::ClRsqrtWorkload(const RsqrtQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<RsqrtQueueDescriptor>(descriptor, info) + : ClBaseWorkload<RsqrtQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClRsqrtWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClRsqrtWorkload.hpp b/src/backends/cl/workloads/ClRsqrtWorkload.hpp index e53d576d6e..153aef5534 100644 --- a/src/backends/cl/workloads/ClRsqrtWorkload.hpp +++ b/src/backends/cl/workloads/ClRsqrtWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClRsqrtWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClRsqrtWorkload : public BaseWorkload<RsqrtQueueDescriptor> +class ClRsqrtWorkload : public ClBaseWorkload<RsqrtQueueDescriptor> { public: ClRsqrtWorkload(const RsqrtQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSinWorkload.cpp b/src/backends/cl/workloads/ClSinWorkload.cpp index 2989ac9691..bcab32fa9a 100644 --- a/src/backends/cl/workloads/ClSinWorkload.cpp +++ b/src/backends/cl/workloads/ClSinWorkload.cpp @@ -26,7 +26,7 @@ arm_compute::Status ClSinWorkloadValidate(const TensorInfo& input, const TensorI ClSinWorkload::ClSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : ClBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("ClSinWorkload", 1, 1); diff --git a/src/backends/cl/workloads/ClSinWorkload.hpp b/src/backends/cl/workloads/ClSinWorkload.hpp index d6e799bf7e..5b7d70aea3 100644 --- a/src/backends/cl/workloads/ClSinWorkload.hpp +++ b/src/backends/cl/workloads/ClSinWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status ClSinWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class ClSinWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class ClSinWorkload : public ClBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: ClSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSliceWorkload.cpp b/src/backends/cl/workloads/ClSliceWorkload.cpp index f92bb378dc..3976e120d2 100644 --- a/src/backends/cl/workloads/ClSliceWorkload.cpp +++ b/src/backends/cl/workloads/ClSliceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -33,7 +33,7 @@ arm_compute::Status ClSliceWorkloadValidate(const TensorInfo& input, ClSliceWorkload::ClSliceWorkload(const SliceQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SliceQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SliceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSliceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClSliceWorkload.hpp b/src/backends/cl/workloads/ClSliceWorkload.hpp index 1451a6df79..dba89641d0 100644 --- a/src/backends/cl/workloads/ClSliceWorkload.hpp +++ b/src/backends/cl/workloads/ClSliceWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/CL/functions/CLSlice.h> @@ -17,7 +17,7 @@ arm_compute::Status ClSliceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SliceDescriptor& descriptor); -class ClSliceWorkload : public BaseWorkload<SliceQueueDescriptor> +class ClSliceWorkload : public ClBaseWorkload<SliceQueueDescriptor> { public: ClSliceWorkload(const SliceQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSoftmaxWorkload.cpp b/src/backends/cl/workloads/ClSoftmaxWorkload.cpp index 39684d83c1..99bc89e200 100644 --- a/src/backends/cl/workloads/ClSoftmaxWorkload.cpp +++ b/src/backends/cl/workloads/ClSoftmaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ ClSoftmaxWorkload::ClSoftmaxWorkload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SoftmaxQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SoftmaxQueueDescriptor>(descriptor, info) , m_SoftmaxLayer(memoryManager) { // Report Profiling Details diff --git a/src/backends/cl/workloads/ClSoftmaxWorkload.hpp b/src/backends/cl/workloads/ClSoftmaxWorkload.hpp index 04b03c8f2b..09167a0e10 100644 --- a/src/backends/cl/workloads/ClSoftmaxWorkload.hpp +++ b/src/backends/cl/workloads/ClSoftmaxWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -11,7 +11,7 @@ #include <arm_compute/runtime/MemoryManagerOnDemand.h> #include <arm_compute/runtime/CL/functions/CLSoftmaxLayer.h> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" namespace armnn { @@ -20,7 +20,7 @@ arm_compute::Status ClSoftmaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SoftmaxDescriptor& descriptor); -class ClSoftmaxWorkload : public BaseWorkload<SoftmaxQueueDescriptor> +class ClSoftmaxWorkload : public ClBaseWorkload<SoftmaxQueueDescriptor> { public: ClSoftmaxWorkload(const SoftmaxQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.cpp b/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.cpp index 9e6c00e9d0..220d2d1908 100644 --- a/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.cpp +++ b/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -48,7 +48,7 @@ ClSpaceToBatchNdWorkload::ClSpaceToBatchNdWorkload( const SpaceToBatchNdQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SpaceToBatchNdQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SpaceToBatchNdQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSpaceToBatchNdWorkload_Construct", diff --git a/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.hpp b/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.hpp index ed9870da5e..948d13b934 100644 --- a/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.hpp +++ b/src/backends/cl/workloads/ClSpaceToBatchNdWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLSpaceToBatchLayer.h> @@ -19,7 +19,7 @@ arm_compute::Status ClSpaceToBatchNdWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SpaceToBatchNdDescriptor& descriptor); -class ClSpaceToBatchNdWorkload : public BaseWorkload<SpaceToBatchNdQueueDescriptor> +class ClSpaceToBatchNdWorkload : public ClBaseWorkload<SpaceToBatchNdQueueDescriptor> { public: ClSpaceToBatchNdWorkload(const SpaceToBatchNdQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp b/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp index 23b4d97c04..da1a350290 100644 --- a/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp +++ b/src/backends/cl/workloads/ClSpaceToDepthWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -20,7 +20,7 @@ using namespace armcomputetensorutils; ClSpaceToDepthWorkload::ClSpaceToDepthWorkload(const SpaceToDepthQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SpaceToDepthQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SpaceToDepthQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSpaceToDepthWorkload_Construct", diff --git a/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp b/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp index ace3116b3e..202671d5fa 100644 --- a/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp +++ b/src/backends/cl/workloads/ClSpaceToDepthWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLSpaceToDepthLayer.h> namespace armnn @@ -16,7 +16,7 @@ arm_compute::Status ClSpaceToDepthWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SpaceToDepthDescriptor& descriptor); -class ClSpaceToDepthWorkload : public BaseWorkload<SpaceToDepthQueueDescriptor> +class ClSpaceToDepthWorkload : public ClBaseWorkload<SpaceToDepthQueueDescriptor> { public: ClSpaceToDepthWorkload(const SpaceToDepthQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSplitterWorkload.cpp b/src/backends/cl/workloads/ClSplitterWorkload.cpp index 54454412e6..f4622ce26d 100644 --- a/src/backends/cl/workloads/ClSplitterWorkload.cpp +++ b/src/backends/cl/workloads/ClSplitterWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -55,7 +55,7 @@ arm_compute::Status ClSplitterWorkloadValidate(const TensorInfo& input, ClSplitterWorkload::ClSplitterWorkload(const SplitterQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext&) - : BaseWorkload<SplitterQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SplitterQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClSplitterWorkload_Construct", diff --git a/src/backends/cl/workloads/ClSplitterWorkload.hpp b/src/backends/cl/workloads/ClSplitterWorkload.hpp index eaeeebe55f..530d3c9145 100644 --- a/src/backends/cl/workloads/ClSplitterWorkload.hpp +++ b/src/backends/cl/workloads/ClSplitterWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -20,7 +20,7 @@ arm_compute::Status ClSplitterWorkloadValidate(const TensorInfo& input, const std::vector<std::reference_wrapper<TensorInfo>>& outputs, unsigned int splitAxis); -class ClSplitterWorkload : public BaseWorkload<SplitterQueueDescriptor> +class ClSplitterWorkload : public ClBaseWorkload<SplitterQueueDescriptor> { public: ClSplitterWorkload(const SplitterQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClStackWorkload.cpp b/src/backends/cl/workloads/ClStackWorkload.cpp index d239f00ed5..46b4702783 100644 --- a/src/backends/cl/workloads/ClStackWorkload.cpp +++ b/src/backends/cl/workloads/ClStackWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #include "ClStackWorkload.hpp" @@ -47,7 +47,7 @@ arm_compute::Status ClStackWorkloadValidate(const std::vector<const TensorInfo*> ClStackWorkload::ClStackWorkload(const StackQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) -: BaseWorkload<StackQueueDescriptor>(descriptor, info) +: ClBaseWorkload<StackQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClStackWorkload_Construct", diff --git a/src/backends/cl/workloads/ClStackWorkload.hpp b/src/backends/cl/workloads/ClStackWorkload.hpp index a7aa84d624..3a9d5ffee7 100644 --- a/src/backends/cl/workloads/ClStackWorkload.hpp +++ b/src/backends/cl/workloads/ClStackWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLStackLayer.h> @@ -15,7 +15,7 @@ arm_compute::Status ClStackWorkloadValidate(const std::vector<const TensorInfo*> const TensorInfo& output, const StackDescriptor& descriptor); -class ClStackWorkload : public BaseWorkload<StackQueueDescriptor> +class ClStackWorkload : public ClBaseWorkload<StackQueueDescriptor> { public: ClStackWorkload(const StackQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClStridedSliceWorkload.cpp b/src/backends/cl/workloads/ClStridedSliceWorkload.cpp index cf8fc37456..62a59feed4 100644 --- a/src/backends/cl/workloads/ClStridedSliceWorkload.cpp +++ b/src/backends/cl/workloads/ClStridedSliceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -55,7 +55,7 @@ arm_compute::Status ClStridedSliceWorkloadValidate(const TensorInfo& input, ClStridedSliceWorkload::ClStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<StridedSliceQueueDescriptor>(descriptor, info) + : ClBaseWorkload<StridedSliceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClStridedSliceWorkload_Construct", diff --git a/src/backends/cl/workloads/ClStridedSliceWorkload.hpp b/src/backends/cl/workloads/ClStridedSliceWorkload.hpp index 1cd5a1df17..07df39aed3 100644 --- a/src/backends/cl/workloads/ClStridedSliceWorkload.hpp +++ b/src/backends/cl/workloads/ClStridedSliceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLStridedSlice.h> @@ -19,7 +19,7 @@ arm_compute::Status ClStridedSliceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const StridedSliceDescriptor& descriptor); -class ClStridedSliceWorkload : public BaseWorkload<StridedSliceQueueDescriptor> +class ClStridedSliceWorkload : public ClBaseWorkload<StridedSliceQueueDescriptor> { public: ClStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClSubtractionWorkload.cpp b/src/backends/cl/workloads/ClSubtractionWorkload.cpp index 3766c05a2b..789d457ff4 100644 --- a/src/backends/cl/workloads/ClSubtractionWorkload.cpp +++ b/src/backends/cl/workloads/ClSubtractionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -21,7 +21,7 @@ static constexpr arm_compute::ConvertPolicy g_AclConvertPolicy = arm_compute::Co ClSubtractionWorkload::ClSubtractionWorkload(const SubtractionQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<SubtractionQueueDescriptor>(descriptor, info) + : ClBaseWorkload<SubtractionQueueDescriptor>(descriptor, info) { this->m_Data.ValidateInputsOutputs("ClSubtractionWorkload", 2, 1); diff --git a/src/backends/cl/workloads/ClSubtractionWorkload.hpp b/src/backends/cl/workloads/ClSubtractionWorkload.hpp index 7107bcc035..c5dd72b9c1 100644 --- a/src/backends/cl/workloads/ClSubtractionWorkload.hpp +++ b/src/backends/cl/workloads/ClSubtractionWorkload.hpp @@ -1,18 +1,18 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLElementwiseOperations.h> namespace armnn { -class ClSubtractionWorkload : public BaseWorkload<SubtractionQueueDescriptor> +class ClSubtractionWorkload : public ClBaseWorkload<SubtractionQueueDescriptor> { public: ClSubtractionWorkload(const SubtractionQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp index 385bece6fb..96c0a81a2f 100644 --- a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp +++ b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -57,9 +57,9 @@ ClTransposeConvolution2dWorkload::ClTransposeConvolution2dWorkload( const TransposeConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, - const arm_compute::CLCompileContext& clCompileContext) : - BaseWorkload<TransposeConvolution2dQueueDescriptor>(descriptor, info), - m_Layer(memoryManager) + const arm_compute::CLCompileContext& clCompileContext) + : ClBaseWorkload<TransposeConvolution2dQueueDescriptor>(descriptor, info) + , m_Layer(memoryManager) { // Add details for profiling output WorkloadInfo detailsInfo; diff --git a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp index c0ba8139fd..88cc0b3811 100644 --- a/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp +++ b/src/backends/cl/workloads/ClTransposeConvolution2dWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <arm_compute/runtime/CL/functions/CLDeconvolutionLayer.h> #include <arm_compute/runtime/MemoryManagerOnDemand.h> @@ -24,7 +24,7 @@ arm_compute::Status ClTransposeConvolution2dWorkloadValidate(const TensorInfo& i const TensorInfo& weights, const Optional<TensorInfo>& biases); -class ClTransposeConvolution2dWorkload : public BaseWorkload<TransposeConvolution2dQueueDescriptor> +class ClTransposeConvolution2dWorkload : public ClBaseWorkload<TransposeConvolution2dQueueDescriptor> { public: ClTransposeConvolution2dWorkload(const TransposeConvolution2dQueueDescriptor& descriptor, diff --git a/src/backends/cl/workloads/ClTransposeWorkload.cpp b/src/backends/cl/workloads/ClTransposeWorkload.cpp index d52806b9d4..383f5f1faf 100644 --- a/src/backends/cl/workloads/ClTransposeWorkload.cpp +++ b/src/backends/cl/workloads/ClTransposeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ arm_compute::Status ClTransposeWorkloadValidate(const TensorInfo& input, ClTransposeWorkload::ClTransposeWorkload(const TransposeQueueDescriptor& descriptor, const WorkloadInfo& info, const arm_compute::CLCompileContext& clCompileContext) - : BaseWorkload<TransposeQueueDescriptor>(descriptor, info) + : ClBaseWorkload<TransposeQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClTransposeWorkload_Construct", diff --git a/src/backends/cl/workloads/ClTransposeWorkload.hpp b/src/backends/cl/workloads/ClTransposeWorkload.hpp index 8186cac52e..fb4803592f 100644 --- a/src/backends/cl/workloads/ClTransposeWorkload.hpp +++ b/src/backends/cl/workloads/ClTransposeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "ClBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include <armnn/TypesUtils.hpp> @@ -20,7 +20,7 @@ arm_compute::Status ClTransposeWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const TransposeDescriptor& descriptor); -class ClTransposeWorkload : public BaseWorkload<TransposeQueueDescriptor> +class ClTransposeWorkload : public ClBaseWorkload<TransposeQueueDescriptor> { public: static const std::string& GetName() diff --git a/src/backends/cl/workloads/ClWorkloadUtils.hpp b/src/backends/cl/workloads/ClWorkloadUtils.hpp index 16f6c6156d..ebdd504a97 100644 --- a/src/backends/cl/workloads/ClWorkloadUtils.hpp +++ b/src/backends/cl/workloads/ClWorkloadUtils.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once diff --git a/src/backends/neon/workloads/NeonAbsWorkload.cpp b/src/backends/neon/workloads/NeonAbsWorkload.cpp index bd476be1ae..8854771b30 100644 --- a/src/backends/neon/workloads/NeonAbsWorkload.cpp +++ b/src/backends/neon/workloads/NeonAbsWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,7 +23,7 @@ arm_compute::Status NeonAbsWorkloadValidate(const TensorInfo& input, const Tenso } NeonAbsWorkload::NeonAbsWorkload(const AbsQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<AbsQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<AbsQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonAbsWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonAbsWorkload.hpp b/src/backends/neon/workloads/NeonAbsWorkload.hpp index 3440af5a05..52510855eb 100644 --- a/src/backends/neon/workloads/NeonAbsWorkload.hpp +++ b/src/backends/neon/workloads/NeonAbsWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status NeonAbsWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonAbsWorkload : public BaseWorkload<AbsQueueDescriptor> +class NeonAbsWorkload : public NeonBaseWorkload<AbsQueueDescriptor> { public: NeonAbsWorkload(const AbsQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonAdditionWorkload.cpp b/src/backends/neon/workloads/NeonAdditionWorkload.cpp index fdfe8b5b55..004af9b239 100644 --- a/src/backends/neon/workloads/NeonAdditionWorkload.cpp +++ b/src/backends/neon/workloads/NeonAdditionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -39,7 +39,7 @@ arm_compute::Status NeonAdditionWorkloadValidate(const TensorInfo& input0, NeonAdditionWorkload::NeonAdditionWorkload(const AdditionQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<AdditionQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<AdditionQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonAdditionWorkload", 2, 1); diff --git a/src/backends/neon/workloads/NeonAdditionWorkload.hpp b/src/backends/neon/workloads/NeonAdditionWorkload.hpp index b691e66a06..491d3b89da 100644 --- a/src/backends/neon/workloads/NeonAdditionWorkload.hpp +++ b/src/backends/neon/workloads/NeonAdditionWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/core/Types.h> @@ -19,7 +19,7 @@ arm_compute::Status NeonAdditionWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ActivationDescriptor* activationDescriptor = nullptr); -class NeonAdditionWorkload : public BaseWorkload<AdditionQueueDescriptor> +class NeonAdditionWorkload : public NeonBaseWorkload<AdditionQueueDescriptor> { public: NeonAdditionWorkload(const AdditionQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonArgMinMaxWorkload.cpp b/src/backends/neon/workloads/NeonArgMinMaxWorkload.cpp index aea5fe5abe..06f763042c 100644 --- a/src/backends/neon/workloads/NeonArgMinMaxWorkload.cpp +++ b/src/backends/neon/workloads/NeonArgMinMaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -54,7 +54,7 @@ arm_compute::Status NeonArgMinMaxWorkloadValidate(const TensorInfo& input, NeonArgMinMaxWorkload::NeonArgMinMaxWorkload(const ArgMinMaxQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ArgMinMaxQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ArgMinMaxQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonArgMinMaxWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonArgMinMaxWorkload.hpp b/src/backends/neon/workloads/NeonArgMinMaxWorkload.hpp index f5d33b3eae..ce1681b919 100644 --- a/src/backends/neon/workloads/NeonArgMinMaxWorkload.hpp +++ b/src/backends/neon/workloads/NeonArgMinMaxWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -17,7 +17,7 @@ arm_compute::Status NeonArgMinMaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ArgMinMaxDescriptor& descriptor); -class NeonArgMinMaxWorkload : public BaseWorkload<ArgMinMaxQueueDescriptor> +class NeonArgMinMaxWorkload : public NeonBaseWorkload<ArgMinMaxQueueDescriptor> { public: NeonArgMinMaxWorkload(const ArgMinMaxQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonBatchNormalizationWorkload.cpp b/src/backends/neon/workloads/NeonBatchNormalizationWorkload.cpp index 897a54d0d6..8e78846ee4 100644 --- a/src/backends/neon/workloads/NeonBatchNormalizationWorkload.cpp +++ b/src/backends/neon/workloads/NeonBatchNormalizationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -58,7 +58,7 @@ arm_compute::Status NeonBatchNormalizationValidate(const TensorInfo& input, NeonBatchNormalizationWorkload::NeonBatchNormalizationWorkload( const BatchNormalizationQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<BatchNormalizationQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<BatchNormalizationQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonBatchNormalizationWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonBatchNormalizationWorkload.hpp b/src/backends/neon/workloads/NeonBatchNormalizationWorkload.hpp index 3cceefe615..aa39d2a48f 100644 --- a/src/backends/neon/workloads/NeonBatchNormalizationWorkload.hpp +++ b/src/backends/neon/workloads/NeonBatchNormalizationWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/runtime/Tensor.h> @@ -24,7 +24,7 @@ arm_compute::Status NeonBatchNormalizationValidate(const TensorInfo& input, const BatchNormalizationDescriptor& descriptor, const ActivationDescriptor* activationDescriptor = nullptr); -class NeonBatchNormalizationWorkload : public BaseWorkload<BatchNormalizationQueueDescriptor> +class NeonBatchNormalizationWorkload : public NeonBaseWorkload<BatchNormalizationQueueDescriptor> { public: NeonBatchNormalizationWorkload(const BatchNormalizationQueueDescriptor& descriptor, diff --git a/src/backends/neon/workloads/NeonBatchToSpaceNdWorkload.cpp b/src/backends/neon/workloads/NeonBatchToSpaceNdWorkload.cpp index 2a35475541..3f477bc452 100644 --- a/src/backends/neon/workloads/NeonBatchToSpaceNdWorkload.cpp +++ b/src/backends/neon/workloads/NeonBatchToSpaceNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -37,7 +37,7 @@ arm_compute::Status NeonBatchToSpaceNdWorkloadValidate(const TensorInfo& input, NeonBatchToSpaceNdWorkload::NeonBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<BatchToSpaceNdQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<BatchToSpaceNdQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonBatchToSpaceWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonBatchToSpaceNdWorkload.hpp b/src/backends/neon/workloads/NeonBatchToSpaceNdWorkload.hpp index 21eebe0a0f..55f773e42f 100644 --- a/src/backends/neon/workloads/NeonBatchToSpaceNdWorkload.hpp +++ b/src/backends/neon/workloads/NeonBatchToSpaceNdWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NEBatchToSpaceLayer.h> @@ -19,10 +19,10 @@ arm_compute::Status NeonBatchToSpaceNdWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const BatchToSpaceNdDescriptor& descriptor); -class NeonBatchToSpaceNdWorkload : public BaseWorkload<BatchToSpaceNdQueueDescriptor> +class NeonBatchToSpaceNdWorkload : public NeonBaseWorkload<BatchToSpaceNdQueueDescriptor> { public: - using BaseWorkload<BatchToSpaceNdQueueDescriptor>::BaseWorkload; + using NeonBaseWorkload<BatchToSpaceNdQueueDescriptor>::NeonBaseWorkload; NeonBatchToSpaceNdWorkload(const BatchToSpaceNdQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonCastWorkload.cpp b/src/backends/neon/workloads/NeonCastWorkload.cpp index 50e212e1bc..bbac207e27 100644 --- a/src/backends/neon/workloads/NeonCastWorkload.cpp +++ b/src/backends/neon/workloads/NeonCastWorkload.cpp @@ -25,7 +25,7 @@ arm_compute::Status NeonCastValidate(const TensorInfo& input, const TensorInfo& } NeonCastWorkload::NeonCastWorkload(const CastQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<CastQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<CastQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonCastWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonCastWorkload.hpp b/src/backends/neon/workloads/NeonCastWorkload.hpp index 86edd90dc1..ad0665c7f2 100644 --- a/src/backends/neon/workloads/NeonCastWorkload.hpp +++ b/src/backends/neon/workloads/NeonCastWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NECast.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status NeonCastValidate(const TensorInfo& input, const TensorInfo& output); -class NeonCastWorkload : public BaseWorkload<CastQueueDescriptor> +class NeonCastWorkload : public NeonBaseWorkload<CastQueueDescriptor> { public: NeonCastWorkload(const CastQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonChannelShuffleWorkload.cpp b/src/backends/neon/workloads/NeonChannelShuffleWorkload.cpp index b28ee447b3..2f91c7b28a 100644 --- a/src/backends/neon/workloads/NeonChannelShuffleWorkload.cpp +++ b/src/backends/neon/workloads/NeonChannelShuffleWorkload.cpp @@ -50,7 +50,7 @@ arm_compute::Status NeonChannelShuffleValidate(const TensorInfo& input, NeonChannelShuffleWorkload::NeonChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ChannelShuffleQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ChannelShuffleQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonChannelShufflenWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonChannelShuffleWorkload.hpp b/src/backends/neon/workloads/NeonChannelShuffleWorkload.hpp index 73d645f7b3..f47e8eb4cc 100644 --- a/src/backends/neon/workloads/NeonChannelShuffleWorkload.hpp +++ b/src/backends/neon/workloads/NeonChannelShuffleWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NEChannelShuffleLayer.h> @@ -17,7 +17,7 @@ arm_compute::Status NeonChannelShuffleValidate(const TensorInfo& input, const TensorInfo& output, const ChannelShuffleDescriptor& descriptor); -class NeonChannelShuffleWorkload : public BaseWorkload<ChannelShuffleQueueDescriptor> +class NeonChannelShuffleWorkload : public NeonBaseWorkload<ChannelShuffleQueueDescriptor> { public: NeonChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonComparisonWorkload.cpp b/src/backends/neon/workloads/NeonComparisonWorkload.cpp index bd66c2f59a..23f6ca40dd 100644 --- a/src/backends/neon/workloads/NeonComparisonWorkload.cpp +++ b/src/backends/neon/workloads/NeonComparisonWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -32,7 +32,7 @@ arm_compute::Status NeonComparisonWorkloadValidate(const TensorInfo& input0, } NeonComparisonWorkload::NeonComparisonWorkload(const ComparisonQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ComparisonQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ComparisonQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonComparisonWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonComparisonWorkload.hpp b/src/backends/neon/workloads/NeonComparisonWorkload.hpp index 1b01053d00..2af9b470ed 100644 --- a/src/backends/neon/workloads/NeonComparisonWorkload.hpp +++ b/src/backends/neon/workloads/NeonComparisonWorkload.hpp @@ -1,10 +1,12 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once +#include "NeonBaseWorkload.hpp" + #include <neon/workloads/NeonWorkloadUtils.hpp> #include <arm_compute/runtime/NEON/functions/NEElementwiseOperations.h> @@ -17,7 +19,7 @@ arm_compute::Status NeonComparisonWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ComparisonDescriptor& descriptor); -class NeonComparisonWorkload : public BaseWorkload<ComparisonQueueDescriptor> +class NeonComparisonWorkload : public NeonBaseWorkload<ComparisonQueueDescriptor> { public: NeonComparisonWorkload(const ComparisonQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonConcatWorkload.cpp b/src/backends/neon/workloads/NeonConcatWorkload.cpp index 88e0e8d118..5b538b6481 100644 --- a/src/backends/neon/workloads/NeonConcatWorkload.cpp +++ b/src/backends/neon/workloads/NeonConcatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -48,7 +48,7 @@ arm_compute::Status NeonConcatWorkloadValidate(const std::vector<const TensorInf NeonConcatWorkload::NeonConcatWorkload( const ConcatQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ConcatQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ConcatQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonConcatWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonConcatWorkload.hpp b/src/backends/neon/workloads/NeonConcatWorkload.hpp index cf93035548..cd2a5b208d 100644 --- a/src/backends/neon/workloads/NeonConcatWorkload.hpp +++ b/src/backends/neon/workloads/NeonConcatWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -19,12 +19,12 @@ arm_compute::Status NeonConcatWorkloadValidate(const std::vector<const TensorInf const TensorInfo& output, const OriginsDescriptor& descriptor); -class NeonConcatWorkload : public BaseWorkload<ConcatQueueDescriptor> +class NeonConcatWorkload : public NeonBaseWorkload<ConcatQueueDescriptor> { public: NeonConcatWorkload(const ConcatQueueDescriptor& descriptor, const WorkloadInfo& info); - using BaseWorkload<ConcatQueueDescriptor>::BaseWorkload; + using NeonBaseWorkload<ConcatQueueDescriptor>::NeonBaseWorkload; void Execute() const override; private: diff --git a/src/backends/neon/workloads/NeonConstantWorkload.cpp b/src/backends/neon/workloads/NeonConstantWorkload.cpp index 471a0bb0fc..bbdee78d8b 100644 --- a/src/backends/neon/workloads/NeonConstantWorkload.cpp +++ b/src/backends/neon/workloads/NeonConstantWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -12,7 +12,7 @@ #include <armnn/utility/PolymorphicDowncast.hpp> #include <neon/NeonTensorHandle.hpp> #include <armnn/backends/TensorHandle.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" namespace armnn { @@ -46,7 +46,7 @@ arm_compute::Status NeonConstantWorkloadValidate(const TensorInfo& output) NeonConstantWorkload::NeonConstantWorkload(const ConstantQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ConstantQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ConstantQueueDescriptor>(descriptor, info) , m_RanOnce(false) { } diff --git a/src/backends/neon/workloads/NeonConstantWorkload.hpp b/src/backends/neon/workloads/NeonConstantWorkload.hpp index f800a45256..3ca0bce5d2 100644 --- a/src/backends/neon/workloads/NeonConstantWorkload.hpp +++ b/src/backends/neon/workloads/NeonConstantWorkload.hpp @@ -1,17 +1,19 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once +#include "NeonBaseWorkload.hpp" + #include <neon/workloads/NeonWorkloadUtils.hpp> namespace armnn { arm_compute::Status NeonConstantWorkloadValidate(const TensorInfo& output); -class NeonConstantWorkload : public BaseWorkload<ConstantQueueDescriptor> +class NeonConstantWorkload : public NeonBaseWorkload<ConstantQueueDescriptor> { public: NeonConstantWorkload(const ConstantQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonConvertBf16ToFp32Workload.cpp b/src/backends/neon/workloads/NeonConvertBf16ToFp32Workload.cpp index e8cc1254e5..dcef025a3d 100644 --- a/src/backends/neon/workloads/NeonConvertBf16ToFp32Workload.cpp +++ b/src/backends/neon/workloads/NeonConvertBf16ToFp32Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonConvertBf16ToFp32Workload.hpp b/src/backends/neon/workloads/NeonConvertBf16ToFp32Workload.hpp index eb2091264c..9770fbdbb0 100644 --- a/src/backends/neon/workloads/NeonConvertBf16ToFp32Workload.hpp +++ b/src/backends/neon/workloads/NeonConvertBf16ToFp32Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonConvertFp16ToFp32Workload.cpp b/src/backends/neon/workloads/NeonConvertFp16ToFp32Workload.cpp index 0d6bb047f9..1b9e1bcfb5 100644 --- a/src/backends/neon/workloads/NeonConvertFp16ToFp32Workload.cpp +++ b/src/backends/neon/workloads/NeonConvertFp16ToFp32Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonConvertFp16ToFp32Workload.hpp b/src/backends/neon/workloads/NeonConvertFp16ToFp32Workload.hpp index 9d98f92ec4..9159e51f8b 100644 --- a/src/backends/neon/workloads/NeonConvertFp16ToFp32Workload.hpp +++ b/src/backends/neon/workloads/NeonConvertFp16ToFp32Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonConvertFp32ToBf16Workload.cpp b/src/backends/neon/workloads/NeonConvertFp32ToBf16Workload.cpp index 84d3c78b49..ac6a69d21a 100644 --- a/src/backends/neon/workloads/NeonConvertFp32ToBf16Workload.cpp +++ b/src/backends/neon/workloads/NeonConvertFp32ToBf16Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonConvertFp32ToBf16Workload.hpp b/src/backends/neon/workloads/NeonConvertFp32ToBf16Workload.hpp index 7c8d45d253..6c0118712f 100644 --- a/src/backends/neon/workloads/NeonConvertFp32ToBf16Workload.hpp +++ b/src/backends/neon/workloads/NeonConvertFp32ToBf16Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonConvertFp32ToFp16Workload.cpp b/src/backends/neon/workloads/NeonConvertFp32ToFp16Workload.cpp index 7f6d4d6215..d65cba046b 100644 --- a/src/backends/neon/workloads/NeonConvertFp32ToFp16Workload.cpp +++ b/src/backends/neon/workloads/NeonConvertFp32ToFp16Workload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonConvertFp32ToFp16Workload.hpp b/src/backends/neon/workloads/NeonConvertFp32ToFp16Workload.hpp index 71a71590d1..8e9f11b857 100644 --- a/src/backends/neon/workloads/NeonConvertFp32ToFp16Workload.hpp +++ b/src/backends/neon/workloads/NeonConvertFp32ToFp16Workload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonConvolution2dWorkload.cpp b/src/backends/neon/workloads/NeonConvolution2dWorkload.cpp index 6fb34d7218..fce57e62a8 100644 --- a/src/backends/neon/workloads/NeonConvolution2dWorkload.cpp +++ b/src/backends/neon/workloads/NeonConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -68,7 +68,7 @@ NeonConvolution2dWorkload::NeonConvolution2dWorkload( const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const bool isFastMathEnabled) - : BaseWorkload<Convolution2dQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<Convolution2dQueueDescriptor>(descriptor, info) { using arm_compute::NEConvolutionLayer; diff --git a/src/backends/neon/workloads/NeonConvolution2dWorkload.hpp b/src/backends/neon/workloads/NeonConvolution2dWorkload.hpp index a28321d041..93e5cb4691 100644 --- a/src/backends/neon/workloads/NeonConvolution2dWorkload.hpp +++ b/src/backends/neon/workloads/NeonConvolution2dWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/runtime/Tensor.h> @@ -24,7 +24,7 @@ arm_compute::Status NeonConvolution2dWorkloadValidate(const TensorInfo& input, bool isFastMathEnabled = false, const ActivationDescriptor* activationDescriptor = nullptr); -class NeonConvolution2dWorkload : public BaseWorkload<Convolution2dQueueDescriptor> +class NeonConvolution2dWorkload : public NeonBaseWorkload<Convolution2dQueueDescriptor> { public: using BaseWorkload<Convolution2dQueueDescriptor>::m_Data; diff --git a/src/backends/neon/workloads/NeonConvolution3dWorkload.cpp b/src/backends/neon/workloads/NeonConvolution3dWorkload.cpp index 5d19737b06..6aa4b69683 100644 --- a/src/backends/neon/workloads/NeonConvolution3dWorkload.cpp +++ b/src/backends/neon/workloads/NeonConvolution3dWorkload.cpp @@ -57,7 +57,7 @@ NeonConvolution3dWorkload::NeonConvolution3dWorkload(const Convolution3dQueueDes const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager, const bool isFastMathEnabled) - : BaseWorkload<Convolution3dQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<Convolution3dQueueDescriptor>(descriptor, info) { IgnoreUnused(memoryManager); diff --git a/src/backends/neon/workloads/NeonConvolution3dWorkload.hpp b/src/backends/neon/workloads/NeonConvolution3dWorkload.hpp index a14dc24cc4..50a61306ec 100644 --- a/src/backends/neon/workloads/NeonConvolution3dWorkload.hpp +++ b/src/backends/neon/workloads/NeonConvolution3dWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/runtime/Tensor.h> @@ -24,7 +24,7 @@ arm_compute::Status NeonConvolution3dWorkloadValidate(const TensorInfo& input, bool isFastMathEnabled = false, const ActivationDescriptor* activationDescriptor = nullptr); -class NeonConvolution3dWorkload : public BaseWorkload<Convolution3dQueueDescriptor> +class NeonConvolution3dWorkload : public NeonBaseWorkload<Convolution3dQueueDescriptor> { public: using BaseWorkload<Convolution3dQueueDescriptor>::m_Data; diff --git a/src/backends/neon/workloads/NeonDepthToSpaceWorkload.cpp b/src/backends/neon/workloads/NeonDepthToSpaceWorkload.cpp index 76829f376c..c3c069a1d1 100644 --- a/src/backends/neon/workloads/NeonDepthToSpaceWorkload.cpp +++ b/src/backends/neon/workloads/NeonDepthToSpaceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -31,7 +31,7 @@ arm_compute::Status NeonDepthToSpaceWorkloadValidate(const TensorInfo& input, NeonDepthToSpaceWorkload::NeonDepthToSpaceWorkload(const DepthToSpaceQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<DepthToSpaceQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<DepthToSpaceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonDepthToSpaceWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonDepthToSpaceWorkload.hpp b/src/backends/neon/workloads/NeonDepthToSpaceWorkload.hpp index 09d9293307..fbc092bbde 100644 --- a/src/backends/neon/workloads/NeonDepthToSpaceWorkload.hpp +++ b/src/backends/neon/workloads/NeonDepthToSpaceWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NEDepthToSpaceLayer.h> @@ -18,7 +18,7 @@ arm_compute::Status NeonDepthToSpaceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const DepthToSpaceDescriptor& descriptor); -class NeonDepthToSpaceWorkload : public BaseWorkload<DepthToSpaceQueueDescriptor> +class NeonDepthToSpaceWorkload : public NeonBaseWorkload<DepthToSpaceQueueDescriptor> { public: NeonDepthToSpaceWorkload(const DepthToSpaceQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonDepthwiseConvolutionWorkload.cpp b/src/backends/neon/workloads/NeonDepthwiseConvolutionWorkload.cpp index cdb3368699..42a476c6ca 100644 --- a/src/backends/neon/workloads/NeonDepthwiseConvolutionWorkload.cpp +++ b/src/backends/neon/workloads/NeonDepthwiseConvolutionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -76,7 +76,7 @@ arm_compute::Status NeonDepthwiseConvolutionWorkloadValidate(const TensorInfo& i NeonDepthwiseConvolutionWorkload::NeonDepthwiseConvolutionWorkload( const DepthwiseConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<DepthwiseConvolution2dQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<DepthwiseConvolution2dQueueDescriptor>(descriptor, info) { // ArmNN's weight format for depthwise is [ 1, H, W, I*M ] auto& weightInfo = m_Data.m_Weight->GetTensorInfo(); diff --git a/src/backends/neon/workloads/NeonDepthwiseConvolutionWorkload.hpp b/src/backends/neon/workloads/NeonDepthwiseConvolutionWorkload.hpp index acb190f384..45c646aa44 100644 --- a/src/backends/neon/workloads/NeonDepthwiseConvolutionWorkload.hpp +++ b/src/backends/neon/workloads/NeonDepthwiseConvolutionWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/runtime/Tensor.h> @@ -23,7 +23,7 @@ arm_compute::Status NeonDepthwiseConvolutionWorkloadValidate(const TensorInfo& i const ActivationDescriptor* activationDescriptor = nullptr); -class NeonDepthwiseConvolutionWorkload : public BaseWorkload<DepthwiseConvolution2dQueueDescriptor> +class NeonDepthwiseConvolutionWorkload : public NeonBaseWorkload<DepthwiseConvolution2dQueueDescriptor> { public: NeonDepthwiseConvolutionWorkload(const DepthwiseConvolution2dQueueDescriptor& descriptor, diff --git a/src/backends/neon/workloads/NeonDequantizeWorkload.cpp b/src/backends/neon/workloads/NeonDequantizeWorkload.cpp index 62c76fcd06..2764141e1d 100644 --- a/src/backends/neon/workloads/NeonDequantizeWorkload.cpp +++ b/src/backends/neon/workloads/NeonDequantizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ arm_compute::Status NeonDequantizeWorkloadValidate(const TensorInfo& input, } NeonDequantizeWorkload::NeonDequantizeWorkload(const DequantizeQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<DequantizeQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<DequantizeQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonDequantizeWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonDequantizeWorkload.hpp b/src/backends/neon/workloads/NeonDequantizeWorkload.hpp index f9ffb7860c..6a3676902d 100644 --- a/src/backends/neon/workloads/NeonDequantizeWorkload.hpp +++ b/src/backends/neon/workloads/NeonDequantizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -18,7 +18,7 @@ namespace armnn arm_compute::Status NeonDequantizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonDequantizeWorkload : public BaseWorkload<DequantizeQueueDescriptor> +class NeonDequantizeWorkload : public NeonBaseWorkload<DequantizeQueueDescriptor> { public: NeonDequantizeWorkload(const DequantizeQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonDetectionPostProcessWorkload.cpp b/src/backends/neon/workloads/NeonDetectionPostProcessWorkload.cpp index a9cb5c40be..48db83d7af 100644 --- a/src/backends/neon/workloads/NeonDetectionPostProcessWorkload.cpp +++ b/src/backends/neon/workloads/NeonDetectionPostProcessWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -75,7 +75,7 @@ arm_compute::Status NeonDetectionPostProcessValidate(const TensorInfo& boxEncodi NeonDetectionPostProcessWorkload::NeonDetectionPostProcessWorkload( const DetectionPostProcessQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<DetectionPostProcessQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<DetectionPostProcessQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonDetectionPostProcessWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonDetectionPostProcessWorkload.hpp b/src/backends/neon/workloads/NeonDetectionPostProcessWorkload.hpp index fd26bef334..e549c7e367 100644 --- a/src/backends/neon/workloads/NeonDetectionPostProcessWorkload.hpp +++ b/src/backends/neon/workloads/NeonDetectionPostProcessWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NEDetectionPostProcessLayer.h> @@ -22,7 +22,7 @@ arm_compute::Status NeonDetectionPostProcessValidate(const TensorInfo& boxEncodi const TensorInfo& numDetections, const DetectionPostProcessDescriptor &descriptor); -class NeonDetectionPostProcessWorkload : public BaseWorkload<DetectionPostProcessQueueDescriptor> +class NeonDetectionPostProcessWorkload : public NeonBaseWorkload<DetectionPostProcessQueueDescriptor> { public: NeonDetectionPostProcessWorkload( diff --git a/src/backends/neon/workloads/NeonDivisionWorkload.cpp b/src/backends/neon/workloads/NeonDivisionWorkload.cpp index 08caef6a7e..19c2bf50b5 100644 --- a/src/backends/neon/workloads/NeonDivisionWorkload.cpp +++ b/src/backends/neon/workloads/NeonDivisionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -35,7 +35,7 @@ arm_compute::Status NeonDivisionWorkloadValidate(const TensorInfo& input0, NeonDivisionWorkload::NeonDivisionWorkload(const DivisionQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<DivisionQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<DivisionQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonDivisionWorkload", 2, 1); diff --git a/src/backends/neon/workloads/NeonDivisionWorkload.hpp b/src/backends/neon/workloads/NeonDivisionWorkload.hpp index fffe02fc00..d753d8e10e 100644 --- a/src/backends/neon/workloads/NeonDivisionWorkload.hpp +++ b/src/backends/neon/workloads/NeonDivisionWorkload.hpp @@ -1,10 +1,12 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once +#include "NeonBaseWorkload.hpp" + #include <neon/workloads/NeonWorkloadUtils.hpp> #include <arm_compute/runtime/NEON/functions/NEElementwiseOperations.h> @@ -17,7 +19,7 @@ arm_compute::Status NeonDivisionWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ActivationDescriptor* activationDescriptor = nullptr); -class NeonDivisionWorkload : public BaseWorkload<DivisionQueueDescriptor> +class NeonDivisionWorkload : public NeonBaseWorkload<DivisionQueueDescriptor> { public: NeonDivisionWorkload(const DivisionQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonExpWorkload.cpp b/src/backends/neon/workloads/NeonExpWorkload.cpp index aff8e72a4e..8c659508e2 100644 --- a/src/backends/neon/workloads/NeonExpWorkload.cpp +++ b/src/backends/neon/workloads/NeonExpWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,7 +23,7 @@ arm_compute::Status NeonExpWorkloadValidate(const TensorInfo& input, const Tenso } NeonExpWorkload::NeonExpWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonExpWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonExpWorkload.hpp b/src/backends/neon/workloads/NeonExpWorkload.hpp index d7053effd6..874434dd86 100644 --- a/src/backends/neon/workloads/NeonExpWorkload.hpp +++ b/src/backends/neon/workloads/NeonExpWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayer.h> @@ -14,7 +14,7 @@ namespace armnn arm_compute::Status NeonExpWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonExpWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class NeonExpWorkload : public NeonBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: NeonExpWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonFillWorkload.cpp b/src/backends/neon/workloads/NeonFillWorkload.cpp index 3cfa56ab54..bc42482527 100644 --- a/src/backends/neon/workloads/NeonFillWorkload.cpp +++ b/src/backends/neon/workloads/NeonFillWorkload.cpp @@ -17,7 +17,7 @@ namespace armnn using namespace armcomputetensorutils; NeonFillWorkload::NeonFillWorkload(const FillQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<FillQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<FillQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonFillWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonFillWorkload.hpp b/src/backends/neon/workloads/NeonFillWorkload.hpp index adffaa37ee..b33c3085c3 100644 --- a/src/backends/neon/workloads/NeonFillWorkload.hpp +++ b/src/backends/neon/workloads/NeonFillWorkload.hpp @@ -6,13 +6,13 @@ #pragma once #include <armnn/backends/WorkloadData.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/core/Error.h> namespace armnn { -class NeonFillWorkload : public BaseWorkload<FillQueueDescriptor> +class NeonFillWorkload : public NeonBaseWorkload<FillQueueDescriptor> { public: NeonFillWorkload(const FillQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonFloorFloatWorkload.cpp b/src/backends/neon/workloads/NeonFloorFloatWorkload.cpp index d728e00ea6..b97e3cef75 100644 --- a/src/backends/neon/workloads/NeonFloorFloatWorkload.cpp +++ b/src/backends/neon/workloads/NeonFloorFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonFloorFloatWorkload.hpp b/src/backends/neon/workloads/NeonFloorFloatWorkload.hpp index 75b3546c5d..7113931673 100644 --- a/src/backends/neon/workloads/NeonFloorFloatWorkload.hpp +++ b/src/backends/neon/workloads/NeonFloorFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonFullyConnectedWorkload.cpp b/src/backends/neon/workloads/NeonFullyConnectedWorkload.cpp index 39927889cf..39a56965d9 100644 --- a/src/backends/neon/workloads/NeonFullyConnectedWorkload.cpp +++ b/src/backends/neon/workloads/NeonFullyConnectedWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -53,7 +53,7 @@ arm_compute::Status NeonFullyConnectedWorkloadValidate(const TensorInfo& input, NeonFullyConnectedWorkload::NeonFullyConnectedWorkload(const FullyConnectedQueueDescriptor& descriptor, const WorkloadInfo& info, ACLMemManagerOnDemand& memoryManager) - : BaseWorkload<FullyConnectedQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<FullyConnectedQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonFullyConnectedWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonFullyConnectedWorkload.hpp b/src/backends/neon/workloads/NeonFullyConnectedWorkload.hpp index 129fb73323..b5f616057f 100644 --- a/src/backends/neon/workloads/NeonFullyConnectedWorkload.hpp +++ b/src/backends/neon/workloads/NeonFullyConnectedWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -24,7 +24,7 @@ arm_compute::Status NeonFullyConnectedWorkloadValidate(const TensorInfo& input, const FullyConnectedDescriptor& descriptor, const ActivationDescriptor* activationDescriptor = nullptr); -class NeonFullyConnectedWorkload : public BaseWorkload<FullyConnectedQueueDescriptor> +class NeonFullyConnectedWorkload : public NeonBaseWorkload<FullyConnectedQueueDescriptor> { public: NeonFullyConnectedWorkload(const FullyConnectedQueueDescriptor& descriptor, const WorkloadInfo& info, diff --git a/src/backends/neon/workloads/NeonGatherWorkload.cpp b/src/backends/neon/workloads/NeonGatherWorkload.cpp index 4cb17caffa..c1378e987d 100644 --- a/src/backends/neon/workloads/NeonGatherWorkload.cpp +++ b/src/backends/neon/workloads/NeonGatherWorkload.cpp @@ -26,7 +26,7 @@ arm_compute::Status NeonGatherWorkloadValidate(const TensorInfo& input, NeonGatherWorkload::NeonGatherWorkload(const GatherQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<GatherQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<GatherQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonGatherWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonGatherWorkload.hpp b/src/backends/neon/workloads/NeonGatherWorkload.hpp index 4c208fe35c..51906d2169 100644 --- a/src/backends/neon/workloads/NeonGatherWorkload.hpp +++ b/src/backends/neon/workloads/NeonGatherWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NEGather.h> @@ -16,7 +16,7 @@ arm_compute::Status NeonGatherWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const GatherDescriptor& descriptor); -class NeonGatherWorkload : public BaseWorkload<GatherQueueDescriptor> +class NeonGatherWorkload : public NeonBaseWorkload<GatherQueueDescriptor> { public: NeonGatherWorkload(const GatherQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonInstanceNormalizationWorkload.cpp b/src/backends/neon/workloads/NeonInstanceNormalizationWorkload.cpp index 8ece5b00e0..601b619237 100644 --- a/src/backends/neon/workloads/NeonInstanceNormalizationWorkload.cpp +++ b/src/backends/neon/workloads/NeonInstanceNormalizationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -33,7 +33,7 @@ arm_compute::Status NeonInstanceNormalizationWorkloadValidate(const TensorInfo& NeonInstanceNormalizationWorkload::NeonInstanceNormalizationWorkload( const InstanceNormalizationQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<InstanceNormalizationQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<InstanceNormalizationQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonInstanceNormalizationWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonInstanceNormalizationWorkload.hpp b/src/backends/neon/workloads/NeonInstanceNormalizationWorkload.hpp index 4d40837e42..28fc4e907f 100644 --- a/src/backends/neon/workloads/NeonInstanceNormalizationWorkload.hpp +++ b/src/backends/neon/workloads/NeonInstanceNormalizationWorkload.hpp @@ -1,10 +1,12 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once +#include "NeonBaseWorkload.hpp" + #include <neon/workloads/NeonWorkloadUtils.hpp> #include <arm_compute/runtime/NEON/functions/NEInstanceNormalizationLayer.h> @@ -16,7 +18,7 @@ arm_compute::Status NeonInstanceNormalizationWorkloadValidate(const TensorInfo& const TensorInfo& output, const InstanceNormalizationDescriptor& descriptor); -class NeonInstanceNormalizationWorkload : public BaseWorkload<InstanceNormalizationQueueDescriptor> +class NeonInstanceNormalizationWorkload : public NeonBaseWorkload<InstanceNormalizationQueueDescriptor> { public: NeonInstanceNormalizationWorkload(const InstanceNormalizationQueueDescriptor& descriptor, diff --git a/src/backends/neon/workloads/NeonL2NormalizationFloatWorkload.cpp b/src/backends/neon/workloads/NeonL2NormalizationFloatWorkload.cpp index 33b460918c..887f25a333 100644 --- a/src/backends/neon/workloads/NeonL2NormalizationFloatWorkload.cpp +++ b/src/backends/neon/workloads/NeonL2NormalizationFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonL2NormalizationFloatWorkload.hpp b/src/backends/neon/workloads/NeonL2NormalizationFloatWorkload.hpp index d87e5d067c..82f0639e9c 100644 --- a/src/backends/neon/workloads/NeonL2NormalizationFloatWorkload.hpp +++ b/src/backends/neon/workloads/NeonL2NormalizationFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonLogSoftmaxWorkload.cpp b/src/backends/neon/workloads/NeonLogSoftmaxWorkload.cpp index 8a9743298b..0e64915ed5 100644 --- a/src/backends/neon/workloads/NeonLogSoftmaxWorkload.cpp +++ b/src/backends/neon/workloads/NeonLogSoftmaxWorkload.cpp @@ -33,7 +33,7 @@ arm_compute::Status NeonLogSoftmaxWorkloadValidate(const TensorInfo& input, NeonLogSoftmaxWorkload::NeonLogSoftmaxWorkload(const LogSoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager) - : BaseWorkload<LogSoftmaxQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<LogSoftmaxQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonLogSoftmaxWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonLogSoftmaxWorkload.hpp b/src/backends/neon/workloads/NeonLogSoftmaxWorkload.hpp index 4cae08e758..1ef9a14407 100644 --- a/src/backends/neon/workloads/NeonLogSoftmaxWorkload.hpp +++ b/src/backends/neon/workloads/NeonLogSoftmaxWorkload.hpp @@ -6,7 +6,7 @@ #pragma once #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -21,7 +21,7 @@ arm_compute::Status NeonLogSoftmaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const LogSoftmaxDescriptor& descriptor); -class NeonLogSoftmaxWorkload : public BaseWorkload<LogSoftmaxQueueDescriptor> +class NeonLogSoftmaxWorkload : public NeonBaseWorkload<LogSoftmaxQueueDescriptor> { public: NeonLogSoftmaxWorkload(const LogSoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, diff --git a/src/backends/neon/workloads/NeonLogWorkload.cpp b/src/backends/neon/workloads/NeonLogWorkload.cpp index 0fb8f8aa62..e0d59cbd9b 100644 --- a/src/backends/neon/workloads/NeonLogWorkload.cpp +++ b/src/backends/neon/workloads/NeonLogWorkload.cpp @@ -23,7 +23,7 @@ arm_compute::Status NeonLogWorkloadValidate(const TensorInfo& input, const Tenso } NeonLogWorkload::NeonLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonLogWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonLogWorkload.hpp b/src/backends/neon/workloads/NeonLogWorkload.hpp index d505aa8300..d890358be1 100644 --- a/src/backends/neon/workloads/NeonLogWorkload.hpp +++ b/src/backends/neon/workloads/NeonLogWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayer.h> @@ -14,7 +14,7 @@ namespace armnn arm_compute::Status NeonLogWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonLogWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class NeonLogWorkload : public NeonBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: NeonLogWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp b/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp index 179e495292..cfdfd85f0c 100644 --- a/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp +++ b/src/backends/neon/workloads/NeonLogicalAndWorkload.cpp @@ -31,7 +31,7 @@ arm_compute::Status NeonLogicalAndWorkloadValidate(const TensorInfo& input0, NeonLogicalAndWorkload::NeonLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonLogicalAndWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonLogicalAndWorkload.hpp b/src/backends/neon/workloads/NeonLogicalAndWorkload.hpp index 550266867e..ae06fa336e 100644 --- a/src/backends/neon/workloads/NeonLogicalAndWorkload.hpp +++ b/src/backends/neon/workloads/NeonLogicalAndWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NELogical.h> @@ -17,7 +17,7 @@ arm_compute::Status NeonLogicalAndWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class NeonLogicalAndWorkload : public BaseWorkload<LogicalBinaryQueueDescriptor> +class NeonLogicalAndWorkload : public NeonBaseWorkload<LogicalBinaryQueueDescriptor> { public: NeonLogicalAndWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonLogicalNotWorkload.cpp b/src/backends/neon/workloads/NeonLogicalNotWorkload.cpp index 16bf4e855d..42601e1ea2 100644 --- a/src/backends/neon/workloads/NeonLogicalNotWorkload.cpp +++ b/src/backends/neon/workloads/NeonLogicalNotWorkload.cpp @@ -29,7 +29,7 @@ arm_compute::Status NeonLogicalNotWorkloadValidate(const TensorInfo& input, NeonLogicalNotWorkload::NeonLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonLogicalNotWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonLogicalNotWorkload.hpp b/src/backends/neon/workloads/NeonLogicalNotWorkload.hpp index 74da027394..4ec96f7865 100644 --- a/src/backends/neon/workloads/NeonLogicalNotWorkload.hpp +++ b/src/backends/neon/workloads/NeonLogicalNotWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NELogical.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status NeonLogicalNotWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonLogicalNotWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class NeonLogicalNotWorkload : public NeonBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: NeonLogicalNotWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonLogicalOrWorkload.cpp b/src/backends/neon/workloads/NeonLogicalOrWorkload.cpp index 301f432673..5f0a51b2b6 100644 --- a/src/backends/neon/workloads/NeonLogicalOrWorkload.cpp +++ b/src/backends/neon/workloads/NeonLogicalOrWorkload.cpp @@ -31,7 +31,7 @@ arm_compute::Status NeonLogicalOrWorkloadValidate(const TensorInfo& input0, NeonLogicalOrWorkload::NeonLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<LogicalBinaryQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonLogicalOrWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonLogicalOrWorkload.hpp b/src/backends/neon/workloads/NeonLogicalOrWorkload.hpp index 40df557563..ffbd86136a 100644 --- a/src/backends/neon/workloads/NeonLogicalOrWorkload.hpp +++ b/src/backends/neon/workloads/NeonLogicalOrWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NELogical.h> @@ -17,7 +17,7 @@ arm_compute::Status NeonLogicalOrWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class NeonLogicalOrWorkload : public BaseWorkload<LogicalBinaryQueueDescriptor> +class NeonLogicalOrWorkload : public NeonBaseWorkload<LogicalBinaryQueueDescriptor> { public: NeonLogicalOrWorkload(const LogicalBinaryQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonLstmFloatWorkload.cpp b/src/backends/neon/workloads/NeonLstmFloatWorkload.cpp index f80da03ba1..b8224e6ca1 100644 --- a/src/backends/neon/workloads/NeonLstmFloatWorkload.cpp +++ b/src/backends/neon/workloads/NeonLstmFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonLstmFloatWorkload.hpp b/src/backends/neon/workloads/NeonLstmFloatWorkload.hpp index 84194b625d..ebbf180371 100644 --- a/src/backends/neon/workloads/NeonLstmFloatWorkload.hpp +++ b/src/backends/neon/workloads/NeonLstmFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonMaximumWorkload.cpp b/src/backends/neon/workloads/NeonMaximumWorkload.cpp index e24063616c..5fcf9bdf5d 100644 --- a/src/backends/neon/workloads/NeonMaximumWorkload.cpp +++ b/src/backends/neon/workloads/NeonMaximumWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status NeonMaximumWorkloadValidate(const TensorInfo& input0, NeonMaximumWorkload::NeonMaximumWorkload(const MaximumQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<MaximumQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<MaximumQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonMaximumWorkload", 2, 1); diff --git a/src/backends/neon/workloads/NeonMaximumWorkload.hpp b/src/backends/neon/workloads/NeonMaximumWorkload.hpp index 59e2d6104d..8807474085 100644 --- a/src/backends/neon/workloads/NeonMaximumWorkload.hpp +++ b/src/backends/neon/workloads/NeonMaximumWorkload.hpp @@ -1,10 +1,12 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once +#include "NeonBaseWorkload.hpp" + #include <neon/workloads/NeonWorkloadUtils.hpp> #include <arm_compute/runtime/NEON/functions/NEElementwiseOperations.h> @@ -16,7 +18,7 @@ arm_compute::Status NeonMaximumWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class NeonMaximumWorkload : public BaseWorkload<MaximumQueueDescriptor> +class NeonMaximumWorkload : public NeonBaseWorkload<MaximumQueueDescriptor> { public: NeonMaximumWorkload(const MaximumQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonMeanWorkload.cpp b/src/backends/neon/workloads/NeonMeanWorkload.cpp index 5d8d1c43a1..43aeccab0d 100644 --- a/src/backends/neon/workloads/NeonMeanWorkload.cpp +++ b/src/backends/neon/workloads/NeonMeanWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -30,7 +30,7 @@ arm_compute::Status NeonMeanWorkloadValidate(const TensorInfo& input, } NeonMeanWorkload::NeonMeanWorkload(const MeanQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<MeanQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<MeanQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonMeanWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonMeanWorkload.hpp b/src/backends/neon/workloads/NeonMeanWorkload.hpp index e5b9edb918..504dc276ad 100644 --- a/src/backends/neon/workloads/NeonMeanWorkload.hpp +++ b/src/backends/neon/workloads/NeonMeanWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NEReduceMean.h> @@ -16,7 +16,7 @@ arm_compute::Status NeonMeanWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const MeanDescriptor& descriptor); -class NeonMeanWorkload : public BaseWorkload<MeanQueueDescriptor> +class NeonMeanWorkload : public NeonBaseWorkload<MeanQueueDescriptor> { public: NeonMeanWorkload(const MeanQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonMinimumWorkload.cpp b/src/backends/neon/workloads/NeonMinimumWorkload.cpp index 228b856ed0..d163b0af36 100644 --- a/src/backends/neon/workloads/NeonMinimumWorkload.cpp +++ b/src/backends/neon/workloads/NeonMinimumWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -27,7 +27,7 @@ arm_compute::Status NeonMinimumWorkloadValidate(const TensorInfo& input0, NeonMinimumWorkload::NeonMinimumWorkload(const MinimumQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<MinimumQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<MinimumQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonMinimumWorkload", 2, 1); diff --git a/src/backends/neon/workloads/NeonMinimumWorkload.hpp b/src/backends/neon/workloads/NeonMinimumWorkload.hpp index 5c76bb387e..dbb3dbf358 100644 --- a/src/backends/neon/workloads/NeonMinimumWorkload.hpp +++ b/src/backends/neon/workloads/NeonMinimumWorkload.hpp @@ -1,10 +1,12 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once +#include "NeonBaseWorkload.hpp" + #include <neon/workloads/NeonWorkloadUtils.hpp> #include <arm_compute/runtime/NEON/functions/NEElementwiseOperations.h> @@ -20,7 +22,7 @@ arm_compute::Status NeonMinimumWorkloadValidate(const TensorInfo& input0, const TensorInfo& input1, const TensorInfo& output); -class NeonMinimumWorkload : public BaseWorkload<MinimumQueueDescriptor> +class NeonMinimumWorkload : public NeonBaseWorkload<MinimumQueueDescriptor> { public: /// Create a NeonMinimumWorkload. diff --git a/src/backends/neon/workloads/NeonMultiplicationWorkload.cpp b/src/backends/neon/workloads/NeonMultiplicationWorkload.cpp index 0ec550861f..65af61cef7 100644 --- a/src/backends/neon/workloads/NeonMultiplicationWorkload.cpp +++ b/src/backends/neon/workloads/NeonMultiplicationWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -46,7 +46,7 @@ arm_compute::Status NeonMultiplicationWorkloadValidate(const TensorInfo& input0, NeonMultiplicationWorkload::NeonMultiplicationWorkload(const MultiplicationQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<MultiplicationQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<MultiplicationQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonMultiplicationWorkload", 2, 1); diff --git a/src/backends/neon/workloads/NeonMultiplicationWorkload.hpp b/src/backends/neon/workloads/NeonMultiplicationWorkload.hpp index a5d7b76d67..ddc073839b 100644 --- a/src/backends/neon/workloads/NeonMultiplicationWorkload.hpp +++ b/src/backends/neon/workloads/NeonMultiplicationWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/core/Types.h> @@ -20,7 +20,7 @@ arm_compute::Status NeonMultiplicationWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ActivationDescriptor* activationDescriptor = nullptr); -class NeonMultiplicationWorkload : public BaseWorkload<MultiplicationQueueDescriptor> +class NeonMultiplicationWorkload : public NeonBaseWorkload<MultiplicationQueueDescriptor> { public: NeonMultiplicationWorkload(const MultiplicationQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonNegWorkload.cpp b/src/backends/neon/workloads/NeonNegWorkload.cpp index e7705e64b4..a33cd6ffea 100644 --- a/src/backends/neon/workloads/NeonNegWorkload.cpp +++ b/src/backends/neon/workloads/NeonNegWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -23,7 +23,7 @@ arm_compute::Status NeonNegWorkloadValidate(const TensorInfo& input, const Tenso } NeonNegWorkload::NeonNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonNegWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonNegWorkload.hpp b/src/backends/neon/workloads/NeonNegWorkload.hpp index 0b081a1c84..67d3d1bf1c 100644 --- a/src/backends/neon/workloads/NeonNegWorkload.hpp +++ b/src/backends/neon/workloads/NeonNegWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status NeonNegWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonNegWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class NeonNegWorkload : public NeonBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: NeonNegWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonNormalizationFloatWorkload.cpp b/src/backends/neon/workloads/NeonNormalizationFloatWorkload.cpp index 92d499737e..f811a0457e 100644 --- a/src/backends/neon/workloads/NeonNormalizationFloatWorkload.cpp +++ b/src/backends/neon/workloads/NeonNormalizationFloatWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonNormalizationFloatWorkload.hpp b/src/backends/neon/workloads/NeonNormalizationFloatWorkload.hpp index 892722c4ca..ed5453619e 100644 --- a/src/backends/neon/workloads/NeonNormalizationFloatWorkload.hpp +++ b/src/backends/neon/workloads/NeonNormalizationFloatWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // diff --git a/src/backends/neon/workloads/NeonPadWorkload.cpp b/src/backends/neon/workloads/NeonPadWorkload.cpp index 1ba37f82eb..e6cc219f91 100644 --- a/src/backends/neon/workloads/NeonPadWorkload.cpp +++ b/src/backends/neon/workloads/NeonPadWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -18,7 +18,7 @@ namespace armnn using namespace armcomputetensorutils; NeonPadWorkload::NeonPadWorkload(const PadQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<PadQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<PadQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonPadWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonPadWorkload.hpp b/src/backends/neon/workloads/NeonPadWorkload.hpp index 76c5c572c9..68eb6c54f7 100644 --- a/src/backends/neon/workloads/NeonPadWorkload.hpp +++ b/src/backends/neon/workloads/NeonPadWorkload.hpp @@ -1,18 +1,18 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once #include <armnn/backends/WorkloadData.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/core/Error.h> namespace armnn { -class NeonPadWorkload : public BaseWorkload<PadQueueDescriptor> +class NeonPadWorkload : public NeonBaseWorkload<PadQueueDescriptor> { public: NeonPadWorkload(const PadQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonPermuteWorkload.cpp b/src/backends/neon/workloads/NeonPermuteWorkload.cpp index 9e18f7f032..843eaaa586 100644 --- a/src/backends/neon/workloads/NeonPermuteWorkload.cpp +++ b/src/backends/neon/workloads/NeonPermuteWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status NeonPermuteWorkloadValidate(const TensorInfo& input, NeonPermuteWorkload::NeonPermuteWorkload(const PermuteQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<PermuteQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<PermuteQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonPermuteWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonPermuteWorkload.hpp b/src/backends/neon/workloads/NeonPermuteWorkload.hpp index 934dda0762..7ed14c3aae 100644 --- a/src/backends/neon/workloads/NeonPermuteWorkload.hpp +++ b/src/backends/neon/workloads/NeonPermuteWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include <neon/workloads/NeonWorkloadUtils.hpp> @@ -19,7 +19,7 @@ namespace armnn arm_compute::Status NeonPermuteWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const PermuteDescriptor& descriptor); -class NeonPermuteWorkload : public BaseWorkload<PermuteQueueDescriptor> +class NeonPermuteWorkload : public NeonBaseWorkload<PermuteQueueDescriptor> { public: static const std::string& GetName() diff --git a/src/backends/neon/workloads/NeonPooling2dWorkload.cpp b/src/backends/neon/workloads/NeonPooling2dWorkload.cpp index 2115e93872..6af07f4ea2 100644 --- a/src/backends/neon/workloads/NeonPooling2dWorkload.cpp +++ b/src/backends/neon/workloads/NeonPooling2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -35,7 +35,7 @@ arm_compute::Status NeonPooling2dWorkloadValidate(const TensorInfo& input, NeonPooling2dWorkload::NeonPooling2dWorkload( const Pooling2dQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<Pooling2dQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<Pooling2dQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonPooling2dWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonPooling2dWorkload.hpp b/src/backends/neon/workloads/NeonPooling2dWorkload.hpp index 705f6ede21..6bcd6615e6 100644 --- a/src/backends/neon/workloads/NeonPooling2dWorkload.hpp +++ b/src/backends/neon/workloads/NeonPooling2dWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -19,7 +19,7 @@ arm_compute::Status NeonPooling2dWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const Pooling2dDescriptor& descriptor); -class NeonPooling2dWorkload : public BaseWorkload<Pooling2dQueueDescriptor> +class NeonPooling2dWorkload : public NeonBaseWorkload<Pooling2dQueueDescriptor> { public: using BaseWorkload<Pooling2dQueueDescriptor>::m_Data; diff --git a/src/backends/neon/workloads/NeonPreluWorkload.cpp b/src/backends/neon/workloads/NeonPreluWorkload.cpp index af03e7960d..ee680dd090 100644 --- a/src/backends/neon/workloads/NeonPreluWorkload.cpp +++ b/src/backends/neon/workloads/NeonPreluWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -29,7 +29,7 @@ arm_compute::Status NeonPreluWorkloadValidate(const TensorInfo& input, NeonPreluWorkload::NeonPreluWorkload(const PreluQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<PreluQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<PreluQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonPreluWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonPreluWorkload.hpp b/src/backends/neon/workloads/NeonPreluWorkload.hpp index f6267938d9..083f567364 100644 --- a/src/backends/neon/workloads/NeonPreluWorkload.hpp +++ b/src/backends/neon/workloads/NeonPreluWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -16,7 +16,7 @@ arm_compute::Status NeonPreluWorkloadValidate(const TensorInfo& input, const TensorInfo& alpha, const TensorInfo& output); -class NeonPreluWorkload : public BaseWorkload<PreluQueueDescriptor> +class NeonPreluWorkload : public NeonBaseWorkload<PreluQueueDescriptor> { public: NeonPreluWorkload(const PreluQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonQLstmWorkload.cpp b/src/backends/neon/workloads/NeonQLstmWorkload.cpp index c25262afa4..37f9578360 100644 --- a/src/backends/neon/workloads/NeonQLstmWorkload.cpp +++ b/src/backends/neon/workloads/NeonQLstmWorkload.cpp @@ -15,7 +15,7 @@ namespace armnn using namespace armcomputetensorutils; NeonQLstmWorkload::NeonQLstmWorkload(const QLstmQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<QLstmQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<QLstmQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonQLstmWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonQLstmWorkload.hpp b/src/backends/neon/workloads/NeonQLstmWorkload.hpp index ec01919578..0d3a43c50f 100644 --- a/src/backends/neon/workloads/NeonQLstmWorkload.hpp +++ b/src/backends/neon/workloads/NeonQLstmWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/Descriptors.hpp> #include <armnn/LstmParams.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include "arm_compute/graph/Tensor.h" @@ -16,7 +16,7 @@ namespace armnn { -class NeonQLstmWorkload : public BaseWorkload<QLstmQueueDescriptor> +class NeonQLstmWorkload : public NeonBaseWorkload<QLstmQueueDescriptor> { public: NeonQLstmWorkload(const QLstmQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonQuantizeWorkload.cpp b/src/backends/neon/workloads/NeonQuantizeWorkload.cpp index f50ca81cc3..713126f1b3 100644 --- a/src/backends/neon/workloads/NeonQuantizeWorkload.cpp +++ b/src/backends/neon/workloads/NeonQuantizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -25,7 +25,7 @@ arm_compute::Status NeonQuantizeWorkloadValidate(const TensorInfo& input, const NeonQuantizeWorkload::NeonQuantizeWorkload(const QuantizeQueueDescriptor& descriptor, const WorkloadInfo& workloadInfo) - : BaseWorkload<QuantizeQueueDescriptor>(descriptor, workloadInfo) + : NeonBaseWorkload<QuantizeQueueDescriptor>(descriptor, workloadInfo) { m_Data.ValidateInputsOutputs("NeonQuantizeWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonQuantizeWorkload.hpp b/src/backends/neon/workloads/NeonQuantizeWorkload.hpp index f0d4a3ccce..2a67a71b8e 100644 --- a/src/backends/neon/workloads/NeonQuantizeWorkload.hpp +++ b/src/backends/neon/workloads/NeonQuantizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NEQuantizationLayer.h> @@ -13,7 +13,7 @@ namespace armnn { arm_compute::Status NeonQuantizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonQuantizeWorkload : public BaseWorkload<QuantizeQueueDescriptor> +class NeonQuantizeWorkload : public NeonBaseWorkload<QuantizeQueueDescriptor> { public: NeonQuantizeWorkload(const QuantizeQueueDescriptor& descriptor, const WorkloadInfo& workloadInfo); diff --git a/src/backends/neon/workloads/NeonQuantizedLstmWorkload.cpp b/src/backends/neon/workloads/NeonQuantizedLstmWorkload.cpp index 6771418af2..1872b1f328 100644 --- a/src/backends/neon/workloads/NeonQuantizedLstmWorkload.cpp +++ b/src/backends/neon/workloads/NeonQuantizedLstmWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -16,7 +16,7 @@ using namespace armcomputetensorutils; NeonQuantizedLstmWorkload::NeonQuantizedLstmWorkload(const QuantizedLstmQueueDescriptor &descriptor, const WorkloadInfo &info) - : BaseWorkload<QuantizedLstmQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<QuantizedLstmQueueDescriptor>(descriptor, info) { // Basic parameters m_InputToInputWeightsTensor = std::make_unique<arm_compute::Tensor>(); diff --git a/src/backends/neon/workloads/NeonQuantizedLstmWorkload.hpp b/src/backends/neon/workloads/NeonQuantizedLstmWorkload.hpp index 9f769841ed..b756485e00 100644 --- a/src/backends/neon/workloads/NeonQuantizedLstmWorkload.hpp +++ b/src/backends/neon/workloads/NeonQuantizedLstmWorkload.hpp @@ -1,12 +1,12 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once #include <armnn/QuantizedLstmParams.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include <arm_compute/graph/Tensor.h> @@ -15,7 +15,7 @@ namespace armnn { -class NeonQuantizedLstmWorkload : public BaseWorkload<QuantizedLstmQueueDescriptor> +class NeonQuantizedLstmWorkload : public NeonBaseWorkload<QuantizedLstmQueueDescriptor> { public: using BaseWorkload<QuantizedLstmQueueDescriptor>::m_Data; diff --git a/src/backends/neon/workloads/NeonRankWorkload.hpp b/src/backends/neon/workloads/NeonRankWorkload.hpp index b8b83af886..22bf7af5e5 100644 --- a/src/backends/neon/workloads/NeonRankWorkload.hpp +++ b/src/backends/neon/workloads/NeonRankWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include "NeonWorkloadUtils.hpp" @@ -13,10 +13,10 @@ namespace armnn { -struct NeonRankWorkload : public BaseWorkload<RankQueueDescriptor> +struct NeonRankWorkload : public NeonBaseWorkload<RankQueueDescriptor> { public: - using BaseWorkload<RankQueueDescriptor>::BaseWorkload; + using NeonBaseWorkload<RankQueueDescriptor>::NeonBaseWorkload; virtual void Execute() const override { const NeonTensorHandle* neonTensorHandle = PolymorphicDowncast<const NeonTensorHandle*>(m_Data.m_Inputs[0]); diff --git a/src/backends/neon/workloads/NeonReduceWorkload.cpp b/src/backends/neon/workloads/NeonReduceWorkload.cpp index bf7ce9892e..45166707fd 100644 --- a/src/backends/neon/workloads/NeonReduceWorkload.cpp +++ b/src/backends/neon/workloads/NeonReduceWorkload.cpp @@ -45,7 +45,7 @@ arm_compute::Status NeonReduceWorkloadValidate(const TensorInfo& input, } NeonReduceWorkload::NeonReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ReduceQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ReduceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonReduceWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonReduceWorkload.hpp b/src/backends/neon/workloads/NeonReduceWorkload.hpp index 026cc8b12c..623b137f92 100644 --- a/src/backends/neon/workloads/NeonReduceWorkload.hpp +++ b/src/backends/neon/workloads/NeonReduceWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NEReductionOperation.h> @@ -16,7 +16,7 @@ arm_compute::Status NeonReduceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ReduceDescriptor& descriptor); -class NeonReduceWorkload : public BaseWorkload<ReduceQueueDescriptor> +class NeonReduceWorkload : public NeonBaseWorkload<ReduceQueueDescriptor> { public: NeonReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonReshapeWorkload.cpp b/src/backends/neon/workloads/NeonReshapeWorkload.cpp index 7f2f225c23..5e9443cb64 100644 --- a/src/backends/neon/workloads/NeonReshapeWorkload.cpp +++ b/src/backends/neon/workloads/NeonReshapeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -25,7 +25,7 @@ arm_compute::Status NeonReshapeWorkloadValidate(const TensorInfo& input, NeonReshapeWorkload::NeonReshapeWorkload(const ReshapeQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ReshapeQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ReshapeQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonReshapeWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonReshapeWorkload.hpp b/src/backends/neon/workloads/NeonReshapeWorkload.hpp index 7c71f1404b..5775259f64 100644 --- a/src/backends/neon/workloads/NeonReshapeWorkload.hpp +++ b/src/backends/neon/workloads/NeonReshapeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include <neon/workloads/NeonWorkloadUtils.hpp> @@ -19,7 +19,7 @@ namespace armnn arm_compute::Status NeonReshapeWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonReshapeWorkload : public BaseWorkload<ReshapeQueueDescriptor> +class NeonReshapeWorkload : public NeonBaseWorkload<ReshapeQueueDescriptor> { public: NeonReshapeWorkload(const ReshapeQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonResizeWorkload.cpp b/src/backends/neon/workloads/NeonResizeWorkload.cpp index e21352e28b..f51d501508 100644 --- a/src/backends/neon/workloads/NeonResizeWorkload.cpp +++ b/src/backends/neon/workloads/NeonResizeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -51,7 +51,7 @@ arm_compute::Status NeonResizeWorkloadValidate(const TensorInfo& input, NeonResizeWorkload::NeonResizeWorkload(const ResizeQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ResizeQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ResizeQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonResizeWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonResizeWorkload.hpp b/src/backends/neon/workloads/NeonResizeWorkload.hpp index feef7eb781..614175270a 100644 --- a/src/backends/neon/workloads/NeonResizeWorkload.hpp +++ b/src/backends/neon/workloads/NeonResizeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NEScale.h> @@ -16,7 +16,7 @@ arm_compute::Status NeonResizeWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const ResizeDescriptor& descriptor); -class NeonResizeWorkload : public BaseWorkload<ResizeQueueDescriptor> +class NeonResizeWorkload : public NeonBaseWorkload<ResizeQueueDescriptor> { public: NeonResizeWorkload(const ResizeQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonRsqrtWorkload.cpp b/src/backends/neon/workloads/NeonRsqrtWorkload.cpp index 13615f982c..a5146ca4c6 100644 --- a/src/backends/neon/workloads/NeonRsqrtWorkload.cpp +++ b/src/backends/neon/workloads/NeonRsqrtWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -24,7 +24,7 @@ arm_compute::Status NeonRsqrtWorkloadValidate(const TensorInfo& input, const Ten } NeonRsqrtWorkload::NeonRsqrtWorkload(const RsqrtQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<RsqrtQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<RsqrtQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonRsqrtWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonRsqrtWorkload.hpp b/src/backends/neon/workloads/NeonRsqrtWorkload.hpp index 104a556ef8..c22a223652 100644 --- a/src/backends/neon/workloads/NeonRsqrtWorkload.hpp +++ b/src/backends/neon/workloads/NeonRsqrtWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayer.h> @@ -15,7 +15,7 @@ namespace armnn arm_compute::Status NeonRsqrtWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonRsqrtWorkload : public BaseWorkload<RsqrtQueueDescriptor> +class NeonRsqrtWorkload : public NeonBaseWorkload<RsqrtQueueDescriptor> { public: NeonRsqrtWorkload(const RsqrtQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonSinWorkload.cpp b/src/backends/neon/workloads/NeonSinWorkload.cpp index 4602a9f251..cba348d789 100644 --- a/src/backends/neon/workloads/NeonSinWorkload.cpp +++ b/src/backends/neon/workloads/NeonSinWorkload.cpp @@ -23,7 +23,7 @@ arm_compute::Status NeonSinWorkloadValidate(const TensorInfo& input, const Tenso } NeonSinWorkload::NeonSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<ElementwiseUnaryQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonSinWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonSinWorkload.hpp b/src/backends/neon/workloads/NeonSinWorkload.hpp index a1a8965e45..6710c861da 100644 --- a/src/backends/neon/workloads/NeonSinWorkload.hpp +++ b/src/backends/neon/workloads/NeonSinWorkload.hpp @@ -5,7 +5,7 @@ #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/NEON/functions/NEElementwiseUnaryLayer.h> @@ -14,7 +14,7 @@ namespace armnn arm_compute::Status NeonSinWorkloadValidate(const TensorInfo& input, const TensorInfo& output); -class NeonSinWorkload : public BaseWorkload<ElementwiseUnaryQueueDescriptor> +class NeonSinWorkload : public NeonBaseWorkload<ElementwiseUnaryQueueDescriptor> { public: NeonSinWorkload(const ElementwiseUnaryQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonSliceWorkload.cpp b/src/backends/neon/workloads/NeonSliceWorkload.cpp index 86ae303d56..f8b2e22773 100644 --- a/src/backends/neon/workloads/NeonSliceWorkload.cpp +++ b/src/backends/neon/workloads/NeonSliceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -35,7 +35,7 @@ arm_compute::Status NeonSliceWorkloadValidate(const TensorInfo& input, NeonSliceWorkload::NeonSliceWorkload(const SliceQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<SliceQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<SliceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonSliceWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonSliceWorkload.hpp b/src/backends/neon/workloads/NeonSliceWorkload.hpp index 303f46f6b1..e7cac77c60 100644 --- a/src/backends/neon/workloads/NeonSliceWorkload.hpp +++ b/src/backends/neon/workloads/NeonSliceWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2019 Arm Ltd. All rights reserved. +// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -18,7 +18,7 @@ arm_compute::Status NeonSliceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SliceDescriptor& descriptor); -class NeonSliceWorkload : public BaseWorkload<SliceQueueDescriptor> +class NeonSliceWorkload : public NeonBaseWorkload<SliceQueueDescriptor> { public: NeonSliceWorkload(const SliceQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonSoftmaxWorkload.cpp b/src/backends/neon/workloads/NeonSoftmaxWorkload.cpp index da20479d82..f2bc084913 100644 --- a/src/backends/neon/workloads/NeonSoftmaxWorkload.cpp +++ b/src/backends/neon/workloads/NeonSoftmaxWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -32,7 +32,7 @@ arm_compute::Status NeonSoftmaxWorkloadValidate(const TensorInfo& input, NeonSoftmaxWorkload::NeonSoftmaxWorkload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager) - : BaseWorkload<SoftmaxQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<SoftmaxQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonSoftmaxWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonSoftmaxWorkload.hpp b/src/backends/neon/workloads/NeonSoftmaxWorkload.hpp index 747aaba85b..7626af01ae 100644 --- a/src/backends/neon/workloads/NeonSoftmaxWorkload.hpp +++ b/src/backends/neon/workloads/NeonSoftmaxWorkload.hpp @@ -1,12 +1,12 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -21,7 +21,7 @@ arm_compute::Status NeonSoftmaxWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SoftmaxDescriptor& descriptor); -class NeonSoftmaxWorkload : public BaseWorkload<SoftmaxQueueDescriptor> +class NeonSoftmaxWorkload : public NeonBaseWorkload<SoftmaxQueueDescriptor> { public: NeonSoftmaxWorkload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, diff --git a/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp index d7880e0f8d..e0adc6220e 100644 --- a/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp +++ b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -43,7 +43,7 @@ arm_compute::Status NeonSpaceToBatchNdWorkloadValidate(const TensorInfo& input, NeonSpaceToBatchNdWorkload::NeonSpaceToBatchNdWorkload(const SpaceToBatchNdQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<SpaceToBatchNdQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<SpaceToBatchNdQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonSpaceToBatchNdWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.hpp b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.hpp index d82b065821..4bd7d2d4a4 100644 --- a/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.hpp +++ b/src/backends/neon/workloads/NeonSpaceToBatchNdWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -8,7 +8,7 @@ #include <armnn/Tensor.hpp> #include <armnn/Descriptors.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NESpaceToBatchLayer.h> @@ -19,10 +19,10 @@ arm_compute::Status NeonSpaceToBatchNdWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SpaceToBatchNdDescriptor& descriptor); -class NeonSpaceToBatchNdWorkload : public BaseWorkload<SpaceToBatchNdQueueDescriptor> +class NeonSpaceToBatchNdWorkload : public NeonBaseWorkload<SpaceToBatchNdQueueDescriptor> { public: - using BaseWorkload<SpaceToBatchNdQueueDescriptor>::BaseWorkload; + using NeonBaseWorkload<SpaceToBatchNdQueueDescriptor>::NeonBaseWorkload; NeonSpaceToBatchNdWorkload(const SpaceToBatchNdQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonSpaceToDepthWorkload.cpp b/src/backends/neon/workloads/NeonSpaceToDepthWorkload.cpp index b96b7d05ac..b4eca46188 100644 --- a/src/backends/neon/workloads/NeonSpaceToDepthWorkload.cpp +++ b/src/backends/neon/workloads/NeonSpaceToDepthWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -31,7 +31,7 @@ arm_compute::Status NeonSpaceToDepthWorkloadValidate(const TensorInfo& input, NeonSpaceToDepthWorkload::NeonSpaceToDepthWorkload(const SpaceToDepthQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<SpaceToDepthQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<SpaceToDepthQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonSpaceToDepthWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonSpaceToDepthWorkload.hpp b/src/backends/neon/workloads/NeonSpaceToDepthWorkload.hpp index 613eea6863..5fbf10d671 100644 --- a/src/backends/neon/workloads/NeonSpaceToDepthWorkload.hpp +++ b/src/backends/neon/workloads/NeonSpaceToDepthWorkload.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -7,7 +7,7 @@ #include <armnn/TypesUtils.hpp> -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NESpaceToDepthLayer.h> @@ -18,10 +18,10 @@ arm_compute::Status NeonSpaceToDepthWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const SpaceToDepthDescriptor& descriptor); -class NeonSpaceToDepthWorkload : public BaseWorkload<SpaceToDepthQueueDescriptor> +class NeonSpaceToDepthWorkload : public NeonBaseWorkload<SpaceToDepthQueueDescriptor> { public: - using BaseWorkload<SpaceToDepthQueueDescriptor>::BaseWorkload; + using NeonBaseWorkload<SpaceToDepthQueueDescriptor>::NeonBaseWorkload; NeonSpaceToDepthWorkload(const SpaceToDepthQueueDescriptor& descriptor, const WorkloadInfo& info); virtual void Execute() const override; private: diff --git a/src/backends/neon/workloads/NeonSplitterWorkload.cpp b/src/backends/neon/workloads/NeonSplitterWorkload.cpp index f5a55d64c2..b5f019105b 100644 --- a/src/backends/neon/workloads/NeonSplitterWorkload.cpp +++ b/src/backends/neon/workloads/NeonSplitterWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -54,7 +54,7 @@ arm_compute::Status NeonSplitterWorkloadValidate(const TensorInfo& input, } NeonSplitterWorkload::NeonSplitterWorkload(const SplitterQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<SplitterQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<SplitterQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonSplitterWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonSplitterWorkload.hpp b/src/backends/neon/workloads/NeonSplitterWorkload.hpp index 88102bc477..ae4f26a7cb 100644 --- a/src/backends/neon/workloads/NeonSplitterWorkload.hpp +++ b/src/backends/neon/workloads/NeonSplitterWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -19,7 +19,7 @@ arm_compute::Status NeonSplitterWorkloadValidate(const TensorInfo& input, const std::vector<std::reference_wrapper<TensorInfo>>& outputs, unsigned int splitAxis); -class NeonSplitterWorkload : public BaseWorkload<SplitterQueueDescriptor> +class NeonSplitterWorkload : public NeonBaseWorkload<SplitterQueueDescriptor> { public: NeonSplitterWorkload(const SplitterQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonStackWorkload.cpp b/src/backends/neon/workloads/NeonStackWorkload.cpp index 75c57399dd..5b4cfbcadd 100644 --- a/src/backends/neon/workloads/NeonStackWorkload.cpp +++ b/src/backends/neon/workloads/NeonStackWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #include "NeonStackWorkload.hpp" @@ -47,7 +47,7 @@ arm_compute::Status NeonStackWorkloadValidate(const std::vector<const TensorInfo } NeonStackWorkload::NeonStackWorkload(const StackQueueDescriptor& descriptor, const WorkloadInfo& info) -: BaseWorkload<StackQueueDescriptor>(descriptor, info) +: NeonBaseWorkload<StackQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonStackWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonStackWorkload.hpp b/src/backends/neon/workloads/NeonStackWorkload.hpp index b4017c6bd3..729e279ed7 100644 --- a/src/backends/neon/workloads/NeonStackWorkload.hpp +++ b/src/backends/neon/workloads/NeonStackWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/NEON/functions/NEStackLayer.h> @@ -15,7 +15,7 @@ arm_compute::Status NeonStackWorkloadValidate(const std::vector<const TensorInfo const TensorInfo& output, const StackDescriptor& descriptor); -class NeonStackWorkload : public BaseWorkload<StackQueueDescriptor> +class NeonStackWorkload : public NeonBaseWorkload<StackQueueDescriptor> { public: NeonStackWorkload(const StackQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonStridedSliceWorkload.cpp b/src/backends/neon/workloads/NeonStridedSliceWorkload.cpp index d9ec727e4b..8a5194720f 100644 --- a/src/backends/neon/workloads/NeonStridedSliceWorkload.cpp +++ b/src/backends/neon/workloads/NeonStridedSliceWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -48,7 +48,7 @@ arm_compute::Status NeonStridedSliceWorkloadValidate(const TensorInfo& input, NeonStridedSliceWorkload::NeonStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<StridedSliceQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<StridedSliceQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonStridedSliceWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonStridedSliceWorkload.hpp b/src/backends/neon/workloads/NeonStridedSliceWorkload.hpp index 29c40620d4..804bb4607b 100644 --- a/src/backends/neon/workloads/NeonStridedSliceWorkload.hpp +++ b/src/backends/neon/workloads/NeonStridedSliceWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/runtime/IFunction.h> @@ -21,7 +21,7 @@ arm_compute::Status NeonStridedSliceWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const StridedSliceDescriptor& descriptor); -class NeonStridedSliceWorkload : public BaseWorkload<StridedSliceQueueDescriptor> +class NeonStridedSliceWorkload : public NeonBaseWorkload<StridedSliceQueueDescriptor> { public: NeonStridedSliceWorkload(const StridedSliceQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonSubtractionWorkload.cpp b/src/backends/neon/workloads/NeonSubtractionWorkload.cpp index 369d6e0c22..10716021ab 100644 --- a/src/backends/neon/workloads/NeonSubtractionWorkload.cpp +++ b/src/backends/neon/workloads/NeonSubtractionWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -40,7 +40,7 @@ arm_compute::Status NeonSubtractionWorkloadValidate(const TensorInfo& input0, NeonSubtractionWorkload::NeonSubtractionWorkload(const SubtractionQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<SubtractionQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<SubtractionQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonSubtractionWorkload", 2, 1); diff --git a/src/backends/neon/workloads/NeonSubtractionWorkload.hpp b/src/backends/neon/workloads/NeonSubtractionWorkload.hpp index 41992dd22a..291b308b36 100644 --- a/src/backends/neon/workloads/NeonSubtractionWorkload.hpp +++ b/src/backends/neon/workloads/NeonSubtractionWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/core/Error.h> #include <arm_compute/core/Types.h> @@ -21,7 +21,7 @@ arm_compute::Status NeonSubtractionWorkloadValidate(const TensorInfo& input0, const TensorInfo& output, const ActivationDescriptor* activationDescriptor = nullptr); -class NeonSubtractionWorkload : public BaseWorkload<SubtractionQueueDescriptor> +class NeonSubtractionWorkload : public NeonBaseWorkload<SubtractionQueueDescriptor> { public: NeonSubtractionWorkload(const SubtractionQueueDescriptor& descriptor, const WorkloadInfo& info); diff --git a/src/backends/neon/workloads/NeonTransposeConvolution2dWorkload.cpp b/src/backends/neon/workloads/NeonTransposeConvolution2dWorkload.cpp index 2b4b513f3d..310a5dcd23 100644 --- a/src/backends/neon/workloads/NeonTransposeConvolution2dWorkload.cpp +++ b/src/backends/neon/workloads/NeonTransposeConvolution2dWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #include "NeonTransposeConvolution2dWorkload.hpp" @@ -55,7 +55,7 @@ arm_compute::Status NeonTransposeConvolution2dWorkloadValidate(const TensorInfo& NeonTransposeConvolution2dWorkload::NeonTransposeConvolution2dWorkload( const TransposeConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager) - : BaseWorkload<TransposeConvolution2dQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<TransposeConvolution2dQueueDescriptor>(descriptor, info) { m_Data.ValidateInputsOutputs("NeonTransposeConvolution2dWorkload", 1, 1); diff --git a/src/backends/neon/workloads/NeonTransposeConvolution2dWorkload.hpp b/src/backends/neon/workloads/NeonTransposeConvolution2dWorkload.hpp index 1c6ec26bd1..fe41dfe569 100644 --- a/src/backends/neon/workloads/NeonTransposeConvolution2dWorkload.hpp +++ b/src/backends/neon/workloads/NeonTransposeConvolution2dWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <arm_compute/runtime/IFunction.h> #include <arm_compute/runtime/Tensor.h> @@ -24,7 +24,7 @@ arm_compute::Status NeonTransposeConvolution2dWorkloadValidate(const TensorInfo& const TensorInfo& weights, const Optional<TensorInfo>& biases); -class NeonTransposeConvolution2dWorkload : public BaseWorkload<TransposeConvolution2dQueueDescriptor> +class NeonTransposeConvolution2dWorkload : public NeonBaseWorkload<TransposeConvolution2dQueueDescriptor> { public: NeonTransposeConvolution2dWorkload(const TransposeConvolution2dQueueDescriptor& descriptor, diff --git a/src/backends/neon/workloads/NeonTransposeWorkload.cpp b/src/backends/neon/workloads/NeonTransposeWorkload.cpp index 2e4f358482..c2960c0de5 100644 --- a/src/backends/neon/workloads/NeonTransposeWorkload.cpp +++ b/src/backends/neon/workloads/NeonTransposeWorkload.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ arm_compute::Status NeonTransposeWorkloadValidate(const TensorInfo& input, NeonTransposeWorkload::NeonTransposeWorkload(const TransposeQueueDescriptor& descriptor, const WorkloadInfo& info) - : BaseWorkload<TransposeQueueDescriptor>(descriptor, info) + : NeonBaseWorkload<TransposeQueueDescriptor>(descriptor, info) { // Report Profiling Details ARMNN_REPORT_PROFILING_WORKLOAD_DESC("NeonTransposeWorkload_Construct", diff --git a/src/backends/neon/workloads/NeonTransposeWorkload.hpp b/src/backends/neon/workloads/NeonTransposeWorkload.hpp index ae6118f04a..4d5e6c2633 100644 --- a/src/backends/neon/workloads/NeonTransposeWorkload.hpp +++ b/src/backends/neon/workloads/NeonTransposeWorkload.hpp @@ -1,11 +1,11 @@ // -// Copyright © 2020 Arm Ltd. All rights reserved. +// Copyright © 2020 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once -#include <armnn/backends/Workload.hpp> +#include "NeonBaseWorkload.hpp" #include <armnn/backends/WorkloadData.hpp> #include <neon/workloads/NeonWorkloadUtils.hpp> @@ -19,7 +19,7 @@ namespace armnn arm_compute::Status NeonTransposeWorkloadValidate(const TensorInfo& input, const TensorInfo& output, const TransposeDescriptor& descriptor); -class NeonTransposeWorkload : public BaseWorkload<TransposeQueueDescriptor> +class NeonTransposeWorkload : public NeonBaseWorkload<TransposeQueueDescriptor> { public: static const std::string& GetName() diff --git a/src/backends/neon/workloads/NeonWorkloadUtils.hpp b/src/backends/neon/workloads/NeonWorkloadUtils.hpp index 59be03a707..af32104399 100644 --- a/src/backends/neon/workloads/NeonWorkloadUtils.hpp +++ b/src/backends/neon/workloads/NeonWorkloadUtils.hpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd. All rights reserved. +// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // #pragma once |