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/*
* Copyright (c) 2017-2018 ARM Limited.
*
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef __ARM_COMPUTE_NEASYMM_H__
#define __ARM_COMPUTE_NEASYMM_H__
#include <arm_neon.h>
namespace arm_compute
{
using qasymm8x8_t = uint8x8_t; /**< 8 bit quantized asymmetric vector with 8 elements */
using qasymm8x8x2_t = uint8x8x2_t; /**< 8 bit quantized asymmetric vector with 16 elements */
using qasymm8x8x3_t = uint8x8x3_t; /**< 8 bit quantized asymmetric vector with 24 elements */
using qasymm8x8x4_t = uint8x8x4_t; /**< 8 bit quantized asymmetric vector with 32 elements */
using qasymm8x16_t = uint8x16_t; /**< 8 bit quantized asymmetric vector with 16 elements */
/** Round to the nearest division by a power-of-two using exponent
*
* @note This function calculates the following expression: (x + 2^n -1 ) / 2^n where n = exponent
*
* @param[in] x Vector of 4 elements
* @param[in] exponent Integer value used to round to nearest division by a power-of-two
*
* @return the nearest division by a power-of-two using exponent
*/
int32x4_t rounding_divide_by_pow2(int32x4_t x, int exponent);
/** Perform a multiply-accumulate on all 16 components of a QASYMM8 vector
*
* vd*vs + vo
*
* @param[in] vd Input vector value in QASYMM8 format
* @param[in] vs Vector multiplier in F32 format. The multiplier value must be duplicated across all four lanes.
* @param[in] vo Vector addend in F32 format. The addend value must be duplicated across all four lanes.
*
* @return A 16-component vector in QASYMM8 format, saturated to fit
*/
uint8x16_t vmlaq_qasymm8(qasymm8x16_t vd, float32x4_t vs, float32x4_t vo);
/** Performs final quantization step on 16 elements
*
* @tparam is_bounded_relu Specified if a fused bounded relu should be applied
*
* @param in_s32 Input to be quantized.
* @param result_fixedpoint_multiplier Result multiplier parameter
* @param result_shift Result shift parameter
* @param result_offset_after_shift_s32 Result offset parameter
* @param min_u8 Relu lower bound
* @param max_u8 Relu upper bound
*
* @return Quantized values
*/
template <bool is_bounded_relu>
uint8x16_t finalize_quantization(int32x4x4_t &in_s32,
int result_fixedpoint_multiplier,
int32_t result_shift,
int32x4_t result_offset_after_shift_s32,
uint8x16_t min_u8,
uint8x16_t max_u8)
{
const static int32x4_t zero_s32 = vdupq_n_s32(0);
// Fixed point multiplication with vector saturating rounding doubling multiply high with scalar
in_s32.val[0] = vqrdmulhq_n_s32(in_s32.val[0], result_fixedpoint_multiplier);
in_s32.val[1] = vqrdmulhq_n_s32(in_s32.val[1], result_fixedpoint_multiplier);
in_s32.val[2] = vqrdmulhq_n_s32(in_s32.val[2], result_fixedpoint_multiplier);
in_s32.val[3] = vqrdmulhq_n_s32(in_s32.val[3], result_fixedpoint_multiplier);
// Round to the nearest division by a power-of-two using result_shift_s32
in_s32.val[0] = rounding_divide_by_pow2(in_s32.val[0], result_shift);
in_s32.val[1] = rounding_divide_by_pow2(in_s32.val[1], result_shift);
in_s32.val[2] = rounding_divide_by_pow2(in_s32.val[2], result_shift);
in_s32.val[3] = rounding_divide_by_pow2(in_s32.val[3], result_shift);
// Add the offset terms
in_s32.val[0] = vaddq_s32(in_s32.val[0], result_offset_after_shift_s32);
in_s32.val[1] = vaddq_s32(in_s32.val[1], result_offset_after_shift_s32);
in_s32.val[2] = vaddq_s32(in_s32.val[2], result_offset_after_shift_s32);
in_s32.val[3] = vaddq_s32(in_s32.val[3], result_offset_after_shift_s32);
// Saturate negative values
in_s32.val[0] = vmaxq_s32(in_s32.val[0], zero_s32);
in_s32.val[1] = vmaxq_s32(in_s32.val[1], zero_s32);
in_s32.val[2] = vmaxq_s32(in_s32.val[2], zero_s32);
in_s32.val[3] = vmaxq_s32(in_s32.val[3], zero_s32);
// Convert S32 to S16
const int16x8x2_t in_s16 =
{
{
vcombine_s16(vqmovn_s32(in_s32.val[0]), vqmovn_s32(in_s32.val[1])),
vcombine_s16(vqmovn_s32(in_s32.val[2]), vqmovn_s32(in_s32.val[3]))
}
};
// Convert S16 to U8
uint8x16_t out_u8 = vcombine_u8(vqmovun_s16(in_s16.val[0]), vqmovun_s16(in_s16.val[1]));
if(is_bounded_relu)
{
out_u8 = vmaxq_u8(out_u8, min_u8);
out_u8 = vminq_u8(out_u8, max_u8);
}
return out_u8;
}
} // namespace arm_compute
#include "arm_compute/core/NEON/NEAsymm.inl"
#endif // __ARM_COMPUTE_NEASYMM_H__
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