aboutsummaryrefslogtreecommitdiff
path: root/src/core/NEON/kernels/arm_conv
AgeCommit message (Collapse)Author
2021-08-04Fix depthwise convolution assembly kernelsFreddie Liardet
Resolves: COMPMID-4710 Change-Id: I35b964731aeed0e6f4f873f59341bee48e4a41fd Signed-off-by: Freddie Liardet <frederick.liardet@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6039 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-07-30Compilation issue: neon=1 armv8.2 on Android with NDKr18beta1Gian Marco Iodice
- The issue was related to the __fp16 specialization on the depthwise convolution layer (cpu) Resolves COMPMID-4741 Change-Id: I6072230c60df6659951db2a1adf611eca6ab7efe Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6026 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-07-16Include limits header to fix errors reported by GCC11Michele Di Giorgio
Resolves: COMPMID-4654 Change-Id: Idec018f9b2fb267293fc3f54d51e8ccf895df77e Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5961 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-06-23Create core library using high priority operatorsMichalis Spyrou
A smaller core library is created using a subset of the operators. Changed the structure of filelist.json in order to include more information about the kernels and make the selection easier. Resolves: COMPMID-4514 Change-Id: I079ca7d8e64346174eebdd13b834e1dd4dc36ca2 Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5786 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-06-18Integrate improved CPU depthwise convolution kernelsMichele Di Giorgio
* Replace assembly kernels for depthwise convolution with more optimized ones. * Add int8 assembly kernels. * Fix implicit padding on optimized kernels Resolves: COMPMID-3867, COMPMID-4361 Change-Id: I0b0867e05f61be4f368f62190d55e14d0ab3ebf2 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5622 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-06-02Fixed the compiler warning -Werror=type-limitsPablo Marquez Tello
* Comparison is always false due to limited range of data type. * rescale_value is truncated to int32_t and then is compared agains (1ll <<31) which will be always false * Resolves MLCE-508 Change-Id: I8dfd04b16beb5c2c3994eb817ed7a992fb63ed31 Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5741 Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-by: Manuel Bottini <manuel.bottini@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-02-15Fix data layout retention and handling of leftovers when there is no paddingMichele Di Giorgio
Resolves COMPMID-4258 Change-Id: I8782bf725cd0d376d538021406eb1f5be962b2cb Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/c/VisualCompute/ComputeLibrary/+/298627 Reviewed-by: Teresa Charlin Reyes <teresa.charlinreyes@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Teresa Charlin Reyes <teresa.charlinreyes@arm.com> Tested-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5082 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com>
2021-02-04Tweak scheduling use of SQDMULH in quantized AVG poolingMichele Di Giorgio
Resolves COMPMID-4195 Change-Id: Ie5116c1ddddccafba40432fd4b5245bb27890a88 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4997 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Reviewed-by: Manuel Bottini <manuel.bottini@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-27Force early exit of threads when output_height=1 and channels=1 in assembly ↵Michele Di Giorgio
pooling Resolves COMPMID-4156, COMPMID-4125 Change-Id: I408e51e9759448e6190490975ccab2c1bc07a813 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4927 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-20Integrate improved pooling layer on NEONMichele Di Giorgio
Resolves COMPMID-4035 Change-Id: I559f8c4208fba9193dfe5012f03ddaf26c746215 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4855 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-29 20:11:03 +0000