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-rw-r--r--src/runtime/CPP/CPPScheduler.cpp6
-rw-r--r--src/runtime/CPP/SingleThreadScheduler.cpp6
-rw-r--r--src/runtime/IScheduler.cpp11
-rw-r--r--src/runtime/NEON/INEOperator.cpp2
-rw-r--r--src/runtime/NEON/functions/NELogical.cpp8
-rw-r--r--src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp4
-rw-r--r--src/runtime/OMP/OMPScheduler.cpp8
-rw-r--r--src/runtime/cpu/operators/CpuConcatenate.cpp2
8 files changed, 23 insertions, 24 deletions
diff --git a/src/runtime/CPP/CPPScheduler.cpp b/src/runtime/CPP/CPPScheduler.cpp
index e084cc6494..73e26ac187 100644
--- a/src/runtime/CPP/CPPScheduler.cpp
+++ b/src/runtime/CPP/CPPScheduler.cpp
@@ -352,14 +352,14 @@ void CPPScheduler::run_workloads(std::vector<IScheduler::Workload> &workloads)
}
#endif /* DOXYGEN_SKIP_THIS */
-void CPPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void CPPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
{
- schedule_common(kernel, hints, tensors);
+ schedule_common(kernel, hints, window, tensors);
}
void CPPScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
{
ITensorPack tensors;
- schedule_common(kernel, hints, tensors);
+ schedule_common(kernel, hints, kernel->window(), tensors);
}
} // namespace arm_compute
diff --git a/src/runtime/CPP/SingleThreadScheduler.cpp b/src/runtime/CPP/SingleThreadScheduler.cpp
index 96265ac757..70536b7ccc 100644
--- a/src/runtime/CPP/SingleThreadScheduler.cpp
+++ b/src/runtime/CPP/SingleThreadScheduler.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -53,12 +53,12 @@ void SingleThreadScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
kernel->run(kernel->window(), info);
}
-void SingleThreadScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void SingleThreadScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
{
ARM_COMPUTE_UNUSED(hints);
ThreadInfo info;
info.cpu_info = &_cpu_info;
- kernel->run_op(tensors, kernel->window(), info);
+ kernel->run_op(tensors, window, info);
}
void SingleThreadScheduler::run_workloads(std::vector<Workload> &workloads)
diff --git a/src/runtime/IScheduler.cpp b/src/runtime/IScheduler.cpp
index 43df3d5e23..eae34b98eb 100644
--- a/src/runtime/IScheduler.cpp
+++ b/src/runtime/IScheduler.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2020 Arm Limited.
+ * Copyright (c) 2016-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -55,14 +55,11 @@ unsigned int IScheduler::num_threads_hint() const
return _num_threads_hint;
}
-void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
{
ARM_COMPUTE_ERROR_ON_MSG(!kernel, "The child class didn't set the kernel");
- ARM_COMPUTE_UNUSED(kernel);
- ARM_COMPUTE_UNUSED(hints);
- ARM_COMPUTE_UNUSED(tensors);
#ifndef BARE_METAL
- const Window &max_window = kernel->window();
+ const Window &max_window = window;
if(hints.split_dimension() == IScheduler::split_dimensions_all)
{
/*
@@ -165,6 +162,8 @@ void IScheduler::schedule_common(ICPPKernel *kernel, const Hints &hints, ITensor
run_workloads(workloads);
}
}
+#else /* !BARE_METAL */
+ ARM_COMPUTE_UNUSED(kernel, hints, window, tensors);
#endif /* !BARE_METAL */
}
diff --git a/src/runtime/NEON/INEOperator.cpp b/src/runtime/NEON/INEOperator.cpp
index ff643d1c43..ccee8ffc21 100644
--- a/src/runtime/NEON/INEOperator.cpp
+++ b/src/runtime/NEON/INEOperator.cpp
@@ -44,7 +44,7 @@ void INEOperator::run(ITensorPack &tensors)
ARM_COMPUTE_ERROR("No inputs provided");
}
- NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, tensors);
+ NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, _kernel->window(), tensors);
}
void INEOperator::prepare(ITensorPack &constants)
diff --git a/src/runtime/NEON/functions/NELogical.cpp b/src/runtime/NEON/functions/NELogical.cpp
index 2c9ebd5f29..190998b042 100644
--- a/src/runtime/NEON/functions/NELogical.cpp
+++ b/src/runtime/NEON/functions/NELogical.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020 Arm Limited.
+ * Copyright (c) 2020-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -65,7 +65,7 @@ Status NELogicalAnd::validate(const ITensorInfo *input1, const ITensorInfo *inpu
void NELogicalAnd::run()
{
- NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+ NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
}
struct NELogicalOr::Impl : public LogicalArgs
@@ -98,7 +98,7 @@ Status NELogicalOr::validate(const ITensorInfo *input1, const ITensorInfo *input
void NELogicalOr::run()
{
- NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+ NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
}
struct NELogicalNot::Impl : public LogicalArgs
@@ -130,6 +130,6 @@ Status NELogicalNot::validate(const ITensorInfo *input, const ITensorInfo *outpu
void NELogicalNot::run()
{
- NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->pack);
+ NEScheduler::get().schedule_op(_impl->kernel.get(), Window::DimY, _impl->kernel->window(), _impl->pack);
}
} // namespace arm_compute
diff --git a/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp b/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
index 2600e2b946..427cd2eb77 100644
--- a/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
+++ b/src/runtime/NEON/functions/NEPoolingAssemblyDispatch.cpp
@@ -78,11 +78,11 @@ void NEPoolingAssemblyDispatch::run(ITensorPack &tensors)
if(_is_global_pooling_layer)
{
- NEScheduler::get().schedule_op(_kernel.get(), Window::DimX, tensors);
+ NEScheduler::get().schedule_op(_kernel.get(), Window::DimX, _kernel->window(), tensors);
}
else
{
- NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, tensors);
+ NEScheduler::get().schedule_op(_kernel.get(), Window::DimY, _kernel->window(), tensors);
}
}
} // namespace experimental
diff --git a/src/runtime/OMP/OMPScheduler.cpp b/src/runtime/OMP/OMPScheduler.cpp
index bf34b0114b..a8bd5a0d60 100644
--- a/src/runtime/OMP/OMPScheduler.cpp
+++ b/src/runtime/OMP/OMPScheduler.cpp
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2020 Arm Limited.
+ * Copyright (c) 2017-2021 Arm Limited.
*
* SPDX-License-Identifier: MIT
*
@@ -51,16 +51,16 @@ void OMPScheduler::set_num_threads(unsigned int num_threads)
void OMPScheduler::schedule(ICPPKernel *kernel, const Hints &hints)
{
ITensorPack tensors;
- schedule_common(kernel, hints, tensors);
+ schedule_common(kernel, hints, kernel->window(), tensors);
}
-void OMPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, ITensorPack &tensors)
+void OMPScheduler::schedule_op(ICPPKernel *kernel, const Hints &hints, const Window &window, ITensorPack &tensors)
{
ARM_COMPUTE_ERROR_ON_MSG(!kernel, "The child class didn't set the kernel");
ARM_COMPUTE_ERROR_ON_MSG(hints.strategy() == StrategyHint::DYNAMIC,
"Dynamic scheduling is not supported in OMPScheduler");
- const Window &max_window = kernel->window();
+ const Window &max_window = window;
const unsigned int num_iterations = max_window.num_iterations(hints.split_dimension());
const unsigned int num_threads = std::min(num_iterations, _num_threads);
diff --git a/src/runtime/cpu/operators/CpuConcatenate.cpp b/src/runtime/cpu/operators/CpuConcatenate.cpp
index 2094e65034..23eb3fceab 100644
--- a/src/runtime/cpu/operators/CpuConcatenate.cpp
+++ b/src/runtime/cpu/operators/CpuConcatenate.cpp
@@ -165,7 +165,7 @@ void CpuConcatenate::run(ITensorPack &tensors)
ITensorPack pack;
pack.add_tensor(TensorType::ACL_SRC, tensors.get_const_tensor(ACL_SRC_VEC + i));
pack.add_tensor(TensorType::ACL_DST, tensors.get_tensor(ACL_DST));
- NEScheduler::get().schedule_op(k.get(), Window::DimY, pack);
+ NEScheduler::get().schedule_op(k.get(), Window::DimY, k->window(), pack);
++i;
}
}
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-08 23:13:13 +0000