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-rw-r--r--src/cpu/kernels/pool2d/neon/fp32.cpp6
-rw-r--r--src/cpu/operators/CpuDepthwiseConv2d.cpp12
2 files changed, 6 insertions, 12 deletions
diff --git a/src/cpu/kernels/pool2d/neon/fp32.cpp b/src/cpu/kernels/pool2d/neon/fp32.cpp
index 8e93df3347..a400f3a95d 100644
--- a/src/cpu/kernels/pool2d/neon/fp32.cpp
+++ b/src/cpu/kernels/pool2d/neon/fp32.cpp
@@ -234,11 +234,9 @@ void poolingMxN_fp32_neon_nhwc_kernel_indices(const ITensor *src, ITensor *dst0,
float res = min_value;
uint32_t idx = 0U;
const uint8_t *in_ptr_y = in_ptr_n + in_ptr_y_offset + in_ptr_x_offset;
- uint32_t curr_kernel_index = pool_size_x * pool_start_y;
for(int y = pool_start_y; y < pool_end_y; ++y)
{
const uint8_t *in_ptr_x = in_ptr_y + (x_off * sizeof(float));
- curr_kernel_index += pool_start_x;
for(int x = pool_start_x; x < pool_end_x; ++x)
{
const float data = *(reinterpret_cast<const float *>(in_ptr_x));
@@ -248,9 +246,7 @@ void poolingMxN_fp32_neon_nhwc_kernel_indices(const ITensor *src, ITensor *dst0,
res = data;
}
in_ptr_x += y_stride;
- curr_kernel_index++;
}
- curr_kernel_index += (pool_size_x - pool_end_x);
in_ptr_y += z_stride;
}
@@ -434,4 +430,4 @@ void poolingMxN_fp32_neon_nhwc(const ITensor *src, ITensor *dst0, ITensor *dst1,
}
}
} // namespace cpu
-} // namespace arm_compute \ No newline at end of file
+} // namespace arm_compute
diff --git a/src/cpu/operators/CpuDepthwiseConv2d.cpp b/src/cpu/operators/CpuDepthwiseConv2d.cpp
index ea451a461a..884fe5c4ed 100644
--- a/src/cpu/operators/CpuDepthwiseConv2d.cpp
+++ b/src/cpu/operators/CpuDepthwiseConv2d.cpp
@@ -83,11 +83,11 @@ void CpuDepthwiseConv2d::CpuDepthwiseConv2dOptimizedInternal::configure(ITensorI
ARM_COMPUTE_ERROR_THROW_ON(CpuDepthwiseConv2dOptimizedInternal::validate(src, weights, (biases == nullptr) ? nullptr : biases,
dst, info));
- _is_quantized = is_data_type_quantized_asymmetric(src->data_type());
- _has_bias = biases != nullptr;
- _is_nchw = src->data_layout() == DataLayout::NCHW;
- _permute = _is_nchw;
- _is_prepared = false;
+ _is_quantized = is_data_type_quantized_asymmetric(src->data_type());
+ _has_bias = biases != nullptr;
+ _is_nchw = src->data_layout() == DataLayout::NCHW;
+ _permute = _is_nchw;
+ _is_prepared = false;
_are_weights_const = weights->are_values_constant();
// Configure pipeline
@@ -461,8 +461,6 @@ void CpuDepthwiseConv2d::configure(ITensorInfo *src, const ITensorInfo *weights,
Status CpuDepthwiseConv2d::validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const ConvolutionInfo &info)
{
- ARM_COMPUTE_RETURN_ERROR_ON_MSG(!weights->are_values_constant(), "Dynamic weights are not supported");
-
DepthwiseConvolutionFunction depth_conv_func = get_depthwiseconvolution_function(src, weights, biases, dst, info);
switch(depth_conv_func)
{