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Diffstat (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp')
-rw-r--r--src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp120
1 files changed, 60 insertions, 60 deletions
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp
index 4b1f988a78..5d7391dc26 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -40,10 +40,10 @@ namespace {
constexpr RescaleParams rescale_params[8] = {
{0x40000000, -0}, // 1/2
- {0x55555555, -1}, // 1/3
+ {0x55555556, -1}, // 1/3
{0x40000000, -1}, // 1/4
{0x66666666, -2}, // 1/5
- {0x55555555, -2}, // 1/6
+ {0x55555556, -2}, // 1/6
{0x49249249, -2}, // 1/7
{0x40000000, -2}, // 1/8
{0x71c71c72, -3}, // 1/9
@@ -120,10 +120,10 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"movi v0.4s, #0x0\n"
"cbz x22, 4f\n"
"ldp x21, x20, [x19, #0x0]\n"
- "add x19, x19, #0x10\n"
- "subs x22, x22, #0x1\n"
"ldr q31, [x21, x26]\n"
+ "add x19, x19, #0x10\n"
"ldr q30, [x20, x26]\n"
+ "subs x22, x22, #0x1\n"
"ldr q29, [x21, x25]\n"
"ldr q28, [x20, x25]\n"
"ldr q27, [x21, x24]\n"
@@ -136,24 +136,24 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"ldp x21, x20, [x19, #0x0]\n"
"add x19, x19, #0x10\n"
"saddl2 v22.8h, v31.16b, v30.16b\n"
- "subs x22, x22, #0x1\n"
- "saddl v21.8h, v29.8b, v28.8b\n"
"ldr q31, [x21, x26]\n"
+ "saddl v21.8h, v29.8b, v28.8b\n"
+ "subs x22, x22, #0x1\n"
"saddl2 v20.8h, v29.16b, v28.16b\n"
- "saddl v19.8h, v27.8b, v26.8b\n"
"ldr q30, [x20, x26]\n"
- "saddl2 v18.8h, v27.16b, v26.16b\n"
+ "saddl v19.8h, v27.8b, v26.8b\n"
"ldr q29, [x21, x25]\n"
- "saddl v17.8h, v25.8b, v24.8b\n"
+ "saddl2 v18.8h, v27.16b, v26.16b\n"
"ldr q28, [x20, x25]\n"
- "saddl2 v16.8h, v25.16b, v24.16b\n"
+ "saddl v17.8h, v25.8b, v24.8b\n"
"ldr q27, [x21, x24]\n"
- "saddw v15.4s, v15.4s, v23.4h\n"
+ "saddl2 v16.8h, v25.16b, v24.16b\n"
"ldr q26, [x20, x24]\n"
- "saddw2 v14.4s, v14.4s, v23.8h\n"
+ "saddw v15.4s, v15.4s, v23.4h\n"
"ldr q25, [x21, x23]\n"
- "saddw v13.4s, v13.4s, v22.4h\n"
+ "saddw2 v14.4s, v14.4s, v23.8h\n"
"ldr q24, [x20, x23]\n"
+ "saddw v13.4s, v13.4s, v22.4h\n"
"saddw2 v12.4s, v12.4s, v22.8h\n"
"saddw v11.4s, v11.4s, v21.4h\n"
"saddw2 v10.4s, v10.4s, v21.8h\n"
@@ -200,19 +200,19 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"ldr x21, [x19], #0x8\n"
"subs x20, x20, #0x1\n"
"ldr q31, [x21, x26]\n"
- "sxtl v16.8h, v31.8b\n"
+ "sxtl v23.8h, v31.8b\n"
"ldr q29, [x21, x25]\n"
"sxtl2 v22.8h, v31.16b\n"
"ldr q27, [x21, x24]\n"
"ldr q25, [x21, x23]\n"
- "saddw v15.4s, v15.4s, v16.4h\n"
- "saddw2 v14.4s, v14.4s, v16.8h\n"
"sxtl v21.8h, v29.8b\n"
"sxtl2 v20.8h, v29.16b\n"
"sxtl v19.8h, v27.8b\n"
"sxtl2 v18.8h, v27.16b\n"
"sxtl v17.8h, v25.8b\n"
"sxtl2 v16.8h, v25.16b\n"
+ "saddw v15.4s, v15.4s, v23.4h\n"
+ "saddw2 v14.4s, v14.4s, v23.8h\n"
"saddw v13.4s, v13.4s, v22.4h\n"
"saddw2 v12.4s, v12.4s, v22.8h\n"
"saddw v11.4s, v11.4s, v21.4h\n"
@@ -232,16 +232,16 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"movi v19.4s, #0x7f\n"
"ld1r { v18.4s }, [%x[rescale_ptr]]\n"
"sub %x[n_channels], %x[n_channels], #0x40\n"
- "sqrdmulh v15.4s, v15.4s, v18.4s\n"
+ "sqdmulh v15.4s, v15.4s, v18.4s\n"
"ld1r { v17.4s }, [%x[shift_ptr]]\n"
"not v16.16b, v19.16b\n"
- "sqrdmulh v14.4s, v14.4s, v18.4s\n"
+ "sqdmulh v14.4s, v14.4s, v18.4s\n"
"cmp %x[n_channels], #0x40\n"
- "sqrdmulh v13.4s, v13.4s, v18.4s\n"
- "sqrdmulh v12.4s, v12.4s, v18.4s\n"
- "sqrdmulh v11.4s, v11.4s, v18.4s\n"
- "sqrdmulh v10.4s, v10.4s, v18.4s\n"
- "sqrdmulh v9.4s, v9.4s, v18.4s\n"
+ "sqdmulh v13.4s, v13.4s, v18.4s\n"
+ "sqdmulh v12.4s, v12.4s, v18.4s\n"
+ "sqdmulh v11.4s, v11.4s, v18.4s\n"
+ "sqdmulh v10.4s, v10.4s, v18.4s\n"
+ "sqdmulh v9.4s, v9.4s, v18.4s\n"
"srshl v15.4s, v15.4s, v17.4s\n"
"srshl v14.4s, v14.4s, v17.4s\n"
"srshl v13.4s, v13.4s, v17.4s\n"
@@ -249,23 +249,23 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"srshl v11.4s, v11.4s, v17.4s\n"
"srshl v10.4s, v10.4s, v17.4s\n"
"srshl v9.4s, v9.4s, v17.4s\n"
- "sqrdmulh v8.4s, v8.4s, v18.4s\n"
- "sqrdmulh v7.4s, v7.4s, v18.4s\n"
- "sqrdmulh v6.4s, v6.4s, v18.4s\n"
- "sqrdmulh v5.4s, v5.4s, v18.4s\n"
+ "sqdmulh v8.4s, v8.4s, v18.4s\n"
+ "sqdmulh v7.4s, v7.4s, v18.4s\n"
+ "sqdmulh v6.4s, v6.4s, v18.4s\n"
+ "sqdmulh v5.4s, v5.4s, v18.4s\n"
"srshl v8.4s, v8.4s, v17.4s\n"
"srshl v7.4s, v7.4s, v17.4s\n"
"srshl v6.4s, v6.4s, v17.4s\n"
"srshl v5.4s, v5.4s, v17.4s\n"
- "sqrdmulh v4.4s, v4.4s, v18.4s\n"
- "sqrdmulh v3.4s, v3.4s, v18.4s\n"
- "sqrdmulh v2.4s, v2.4s, v18.4s\n"
- "sqrdmulh v1.4s, v1.4s, v18.4s\n"
+ "sqdmulh v4.4s, v4.4s, v18.4s\n"
+ "sqdmulh v3.4s, v3.4s, v18.4s\n"
+ "sqdmulh v2.4s, v2.4s, v18.4s\n"
+ "sqdmulh v1.4s, v1.4s, v18.4s\n"
"srshl v4.4s, v4.4s, v17.4s\n"
"srshl v3.4s, v3.4s, v17.4s\n"
"srshl v2.4s, v2.4s, v17.4s\n"
"srshl v1.4s, v1.4s, v17.4s\n"
- "sqrdmulh v0.4s, v0.4s, v18.4s\n"
+ "sqdmulh v0.4s, v0.4s, v18.4s\n"
"smax v15.4s, v15.4s, v16.4s\n"
"smax v14.4s, v14.4s, v16.4s\n"
"smax v13.4s, v13.4s, v16.4s\n"
@@ -302,22 +302,22 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"uzp1 v16.16b, v13.16b, v12.16b\n"
"smin v0.4s, v0.4s, v19.4s\n"
"uzp1 v22.16b, v11.16b, v10.16b\n"
- "uzp1 v18.16b, v9.16b, v8.16b\n"
- "uzp1 v21.16b, v7.16b, v6.16b\n"
+ "uzp1 v21.16b, v9.16b, v8.16b\n"
+ "uzp1 v20.16b, v7.16b, v6.16b\n"
"uzp1 v17.16b, v5.16b, v4.16b\n"
- "uzp1 v20.16b, v3.16b, v2.16b\n"
- "uzp1 v19.16b, v1.16b, v0.16b\n"
+ "uzp1 v19.16b, v3.16b, v2.16b\n"
+ "uzp1 v18.16b, v1.16b, v0.16b\n"
"uzp1 v16.16b, v23.16b, v16.16b\n"
"str q16, [%x[outptr], x26]\n"
- "uzp1 v18.16b, v22.16b, v18.16b\n"
- "uzp1 v17.16b, v21.16b, v17.16b\n"
+ "uzp1 v16.16b, v22.16b, v21.16b\n"
"add x26, x26, #0x40\n"
- "uzp1 v16.16b, v20.16b, v19.16b\n"
- "str q18, [%x[outptr], x25]\n"
- "str q17, [%x[outptr], x24]\n"
- "str q16, [%x[outptr], x23]\n"
+ "uzp1 v17.16b, v20.16b, v17.16b\n"
+ "str q16, [%x[outptr], x25]\n"
+ "uzp1 v16.16b, v19.16b, v18.16b\n"
"add x25, x25, #0x40\n"
+ "str q17, [%x[outptr], x24]\n"
"add x24, x24, #0x40\n"
+ "str q16, [%x[outptr], x23]\n"
"add x23, x23, #0x40\n"
"bge 1b\n"
"cbz %x[n_channels], 43f\n"
@@ -333,19 +333,19 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"movi v12.4s, #0x0\n"
"cbz x22, 11f\n"
"ldp x21, x20, [x19, #0x0]\n"
- "add x19, x19, #0x10\n"
- "subs x22, x22, #0x1\n"
"ldr q31, [x21, x26]\n"
+ "add x19, x19, #0x10\n"
"ldr q30, [x20, x26]\n"
+ "subs x22, x22, #0x1\n"
"beq 10f\n"
"9:" // Single vector of channels: Loop: 2 inputs loop
"saddl v23.8h, v31.8b, v30.8b\n"
"ldp x21, x20, [x19, #0x0]\n"
"add x19, x19, #0x10\n"
"saddl2 v22.8h, v31.16b, v30.16b\n"
- "subs x22, x22, #0x1\n"
- "saddw v15.4s, v15.4s, v23.4h\n"
"ldr q31, [x21, x26]\n"
+ "saddw v15.4s, v15.4s, v23.4h\n"
+ "subs x22, x22, #0x1\n"
"saddw2 v14.4s, v14.4s, v23.8h\n"
"ldr q30, [x20, x26]\n"
"saddw v13.4s, v13.4s, v22.4h\n"
@@ -365,10 +365,10 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"ldr x21, [x19], #0x8\n"
"subs x20, x20, #0x1\n"
"ldr q31, [x21, x26]\n"
- "sxtl v16.8h, v31.8b\n"
+ "sxtl v23.8h, v31.8b\n"
"sxtl2 v22.8h, v31.16b\n"
- "saddw v15.4s, v15.4s, v16.4h\n"
- "saddw2 v14.4s, v14.4s, v16.8h\n"
+ "saddw v15.4s, v15.4s, v23.4h\n"
+ "saddw2 v14.4s, v14.4s, v23.8h\n"
"saddw v13.4s, v13.4s, v22.4h\n"
"saddw2 v12.4s, v12.4s, v22.8h\n"
"bgt 12b\n"
@@ -376,13 +376,13 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"movi v19.4s, #0x7f\n"
"ld1r { v18.4s }, [%x[rescale_ptr]]\n"
"sub %x[n_channels], %x[n_channels], #0x10\n"
- "sqrdmulh v15.4s, v15.4s, v18.4s\n"
+ "sqdmulh v15.4s, v15.4s, v18.4s\n"
"ld1r { v17.4s }, [%x[shift_ptr]]\n"
"not v16.16b, v19.16b\n"
- "sqrdmulh v14.4s, v14.4s, v18.4s\n"
+ "sqdmulh v14.4s, v14.4s, v18.4s\n"
"cmp %x[n_channels], #0x10\n"
- "sqrdmulh v13.4s, v13.4s, v18.4s\n"
- "sqrdmulh v12.4s, v12.4s, v18.4s\n"
+ "sqdmulh v13.4s, v13.4s, v18.4s\n"
+ "sqdmulh v12.4s, v12.4s, v18.4s\n"
"srshl v15.4s, v15.4s, v17.4s\n"
"srshl v14.4s, v14.4s, v17.4s\n"
"srshl v13.4s, v13.4s, v17.4s\n"
@@ -538,11 +538,11 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"tbz %x[n_channels], #0, 33f\n"
"ldr b31, [x21], #0x1\n"
"33:" // Oddments: Single input loop: Load: Bit 3: End
- "sxtl v16.8h, v31.8b\n"
+ "sxtl v23.8h, v31.8b\n"
"subs x20, x20, #0x1\n"
"sxtl2 v22.8h, v31.16b\n"
- "saddw v15.4s, v15.4s, v16.4h\n"
- "saddw2 v14.4s, v14.4s, v16.8h\n"
+ "saddw v15.4s, v15.4s, v23.4h\n"
+ "saddw2 v14.4s, v14.4s, v23.8h\n"
"saddw v13.4s, v13.4s, v22.4h\n"
"saddw2 v12.4s, v12.4s, v22.8h\n"
"bgt 25b\n"
@@ -550,11 +550,11 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
"movi v19.4s, #0x7f\n"
"ld1r { v18.4s }, [%x[rescale_ptr]]\n"
"not v16.16b, v19.16b\n"
- "sqrdmulh v15.4s, v15.4s, v18.4s\n"
+ "sqdmulh v15.4s, v15.4s, v18.4s\n"
"ld1r { v17.4s }, [%x[shift_ptr]]\n"
- "sqrdmulh v14.4s, v14.4s, v18.4s\n"
- "sqrdmulh v13.4s, v13.4s, v18.4s\n"
- "sqrdmulh v12.4s, v12.4s, v18.4s\n"
+ "sqdmulh v14.4s, v14.4s, v18.4s\n"
+ "sqdmulh v13.4s, v13.4s, v18.4s\n"
+ "sqdmulh v12.4s, v12.4s, v18.4s\n"
"srshl v15.4s, v15.4s, v17.4s\n"
"srshl v14.4s, v14.4s, v17.4s\n"
"srshl v13.4s, v13.4s, v17.4s\n"
generated by cgit v1.2.1 (git 2.23.0) at 2024-05-05 16:18:26 +0000