diff options
Diffstat (limited to 'arm_compute/core/NEON/wrapper')
-rw-r--r-- | arm_compute/core/NEON/wrapper/intrinsics/abs.h | 75 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/intrinsics/add.h | 37 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/intrinsics/bsl.h | 40 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/intrinsics/cgt.h | 8 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h | 3 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/intrinsics/log.h | 47 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/intrinsics/neg.h | 39 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/intrinsics/tanh.h | 47 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/scalar/add.h | 62 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/scalar/scalar.h | 29 | ||||
-rw-r--r-- | arm_compute/core/NEON/wrapper/wrapper.h | 3 |
11 files changed, 340 insertions, 50 deletions
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/abs.h b/arm_compute/core/NEON/wrapper/intrinsics/abs.h new file mode 100644 index 0000000000..97d11e951e --- /dev/null +++ b/arm_compute/core/NEON/wrapper/intrinsics/abs.h @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_ABS_H__ +#define __ARM_COMPUTE_WRAPPER_ABS_H__ + +#include <arm_neon.h> + +namespace arm_compute +{ +namespace wrapper +{ +#define VABS_IMPL(stype, vtype, prefix, postfix) \ + inline vtype vabs(const vtype &a) \ + { \ + return prefix##_##postfix(a); \ + } + +#define VQABS_IMPL(stype, vtype, prefix, postfix) \ + inline vtype vqabs(const vtype &a) \ + { \ + return prefix##_##postfix(a); \ + } + +// Absolute: vabs{q}_<type>. Vd[i] = |Va[i]| +VABS_IMPL(int8x8_t, int8x8_t, vabs, s8) +VABS_IMPL(int16x4_t, int16x4_t, vabs, s16) +VABS_IMPL(int32x2_t, int32x2_t, vabs, s32) +VABS_IMPL(float32x2_t, float32x2_t, vabs, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VABS_IMPL(float16x4_t, float16x4_t, vabs, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +VABS_IMPL(int8x16_t, int8x16_t, vabsq, s8) +VABS_IMPL(int16x8_t, int16x8_t, vabsq, s16) +VABS_IMPL(int32x4_t, int32x4_t, vabsq, s32) +VABS_IMPL(float32x4_t, float32x4_t, vabsq, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VABS_IMPL(float16x8_t, float16x8_t, vabsq, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +// Saturating absolute: vqabs{q}_<type>. Vd[i] = sat(|Va[i]|) +VQABS_IMPL(int8x8_t, int8x8_t, vqabs, s8) +VQABS_IMPL(int16x4_t, int16x4_t, vqabs, s16) +VQABS_IMPL(int32x2_t, int32x2_t, vqabs, s32) + +VQABS_IMPL(int8x16_t, int8x16_t, vqabsq, s8) +VQABS_IMPL(int16x8_t, int16x8_t, vqabsq, s16) +VQABS_IMPL(int32x4_t, int32x4_t, vqabsq, s32) + +#undef VABS_IMPL +#undef VQABS_IMPL +} // namespace wrapper +} // namespace arm_compute +#endif /* __ARM_COMPUTE_WRAPPER_ABS_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/add.h b/arm_compute/core/NEON/wrapper/intrinsics/add.h index da730f133c..4f4d244489 100644 --- a/arm_compute/core/NEON/wrapper/intrinsics/add.h +++ b/arm_compute/core/NEON/wrapper/intrinsics/add.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 ARM Limited. + * Copyright (c) 2018-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -61,8 +61,41 @@ VADD_IMPL(float32x4_t, float32x4_t, vaddq, f32) #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC VADD_IMPL(float16x8_t, float16x8_t, vaddq, f16) #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC - #undef VADD_IMPL + +#define VQADD_IMPL(stype, vtype, prefix, postfix) \ + inline vtype vqadd(const vtype &a, const vtype &b) \ + { \ + return prefix##_##postfix(a, b); \ + } + +// VQADD: Vector saturating add (No notion of saturation for floating point) +VQADD_IMPL(uint8x8_t, uint8x8_t, vqadd, u8) +VQADD_IMPL(int8x8_t, int8x8_t, vqadd, s8) +VQADD_IMPL(uint16x4_t, uint16x4_t, vqadd, u16) +VQADD_IMPL(int16x4_t, int16x4_t, vqadd, s16) +VQADD_IMPL(uint32x2_t, uint32x2_t, vqadd, u32) +VQADD_IMPL(int32x2_t, int32x2_t, vqadd, s32) +VQADD_IMPL(uint64x1_t, uint64x1_t, vqadd, u64) +VQADD_IMPL(int64x1_t, int64x1_t, vqadd, s64) +VQADD_IMPL(float32x2_t, float32x2_t, vadd, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VQADD_IMPL(float16x4_t, float16x4_t, vadd, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +VQADD_IMPL(uint8x16_t, uint8x16_t, vqaddq, u8) +VQADD_IMPL(int8x16_t, int8x16_t, vqaddq, s8) +VQADD_IMPL(uint16x8_t, uint16x8_t, vqaddq, u16) +VQADD_IMPL(int16x8_t, int16x8_t, vqaddq, s16) +VQADD_IMPL(uint32x4_t, uint32x4_t, vqaddq, u32) +VQADD_IMPL(int32x4_t, int32x4_t, vqaddq, s32) +VQADD_IMPL(uint64x2_t, uint64x2_t, vqaddq, u64) +VQADD_IMPL(int64x2_t, int64x2_t, vqaddq, s64) +VQADD_IMPL(float32x4_t, float32x4_t, vaddq, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VQADD_IMPL(float16x8_t, float16x8_t, vaddq, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +#undef VQADD_IMPL } // namespace wrapper } // namespace arm_compute #endif /* __ARM_COMPUTE_WRAPPER_ADD_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/bsl.h b/arm_compute/core/NEON/wrapper/intrinsics/bsl.h index 9831b4b842..38f9d5f171 100644 --- a/arm_compute/core/NEON/wrapper/intrinsics/bsl.h +++ b/arm_compute/core/NEON/wrapper/intrinsics/bsl.h @@ -30,32 +30,32 @@ namespace arm_compute { namespace wrapper { -#define VBSL_IMPL(vctype, vtype, prefix, postfix) \ - inline vtype vbsl(const vctype &a, const vtype &b, const vtype &c) \ - { \ - return prefix##_##postfix(a, b, c); \ +#define VBSL_IMPL(stype, vtype, ctype, prefix, postfix) \ + inline vtype vbsl(const ctype &a, const vtype &b, const vtype &c) \ + { \ + return prefix##_##postfix(a, b, c); \ } -VBSL_IMPL(uint8x8_t, uint8x8_t, vbsl, u8) -VBSL_IMPL(uint8x8_t, int8x8_t, vbsl, s8) -VBSL_IMPL(uint16x4_t, uint16x4_t, vbsl, u16) -VBSL_IMPL(uint16x4_t, int16x4_t, vbsl, s16) -VBSL_IMPL(uint32x2_t, uint32x2_t, vbsl, u32) -VBSL_IMPL(uint32x2_t, int32x2_t, vbsl, s32) -VBSL_IMPL(uint32x2_t, float32x2_t, vbsl, f32) +VBSL_IMPL(uint8_t, uint8x8_t, uint8x8_t, vbsl, u8) +VBSL_IMPL(int8_t, int8x8_t, uint8x8_t, vbsl, s8) +VBSL_IMPL(uint16_t, uint16x4_t, uint16x4_t, vbsl, u16) +VBSL_IMPL(int16_t, int16x4_t, uint16x4_t, vbsl, s16) +VBSL_IMPL(uint32_t, uint32x2_t, uint32x2_t, vbsl, u32) +VBSL_IMPL(int32_t, int32x2_t, uint32x2_t, vbsl, s32) +VBSL_IMPL(float32x2_t, float32x2_t, uint32x2_t, vbsl, f32) #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -VBSL_IMPL(uint16x4_t, float16x4_t, vbsl, f16) +VBSL_IMPL(float16x4_t, float16x4_t, uint16x4_t, vbsl, f16) #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -VBSL_IMPL(uint8x16_t, uint8x16_t, vbslq, u8) -VBSL_IMPL(uint8x16_t, int8x16_t, vbslq, s8) -VBSL_IMPL(uint16x8_t, uint16x8_t, vbslq, u16) -VBSL_IMPL(uint16x8_t, int16x8_t, vbslq, s16) -VBSL_IMPL(uint32x4_t, uint32x4_t, vbslq, u32) -VBSL_IMPL(uint32x4_t, int32x4_t, vbslq, s32) -VBSL_IMPL(uint32x4_t, float32x4_t, vbslq, f32) +VBSL_IMPL(uint8_t, uint8x16_t, uint8x16_t, vbslq, u8) +VBSL_IMPL(int8_t, int8x16_t, uint8x16_t, vbslq, s8) +VBSL_IMPL(uint16_t, uint16x8_t, uint16x8_t, vbslq, u16) +VBSL_IMPL(int16_t, int16x8_t, uint16x8_t, vbslq, s16) +VBSL_IMPL(uint32_t, uint32x4_t, uint32x4_t, vbslq, u32) +VBSL_IMPL(int32_t, int32x4_t, uint32x4_t, vbslq, s32) +VBSL_IMPL(float32x4_t, float32x4_t, uint32x4_t, vbslq, f32) #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -VBSL_IMPL(uint16x8_t, float16x8_t, vbslq, f16) +VBSL_IMPL(float16x8_t, float16x8_t, uint16x8_t, vbslq, f16) #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC #undef VBSL_IMPL diff --git a/arm_compute/core/NEON/wrapper/intrinsics/cgt.h b/arm_compute/core/NEON/wrapper/intrinsics/cgt.h index c2ed9df1dc..9563b0cd12 100644 --- a/arm_compute/core/NEON/wrapper/intrinsics/cgt.h +++ b/arm_compute/core/NEON/wrapper/intrinsics/cgt.h @@ -30,10 +30,10 @@ namespace arm_compute { namespace wrapper { -#define VCGT_IMPL(votype, vtype, prefix, postfix) \ - inline votype vcgt(const vtype &a, const vtype &b) \ - { \ - return prefix##_##postfix(a, b); \ +#define VCGT_IMPL(rtype, vtype, prefix, postfix) \ + inline rtype vcgt(const vtype &a, const vtype &b) \ + { \ + return prefix##_##postfix(a, b); \ } VCGT_IMPL(uint8x8_t, uint8x8_t, vcgt, u8) diff --git a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h index 896e5106ab..a0193ee3d2 100644 --- a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h +++ b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h @@ -24,6 +24,7 @@ #ifndef __ARM_COMPUTE_WRAPPER_INTRINSICS_H__ #define __ARM_COMPUTE_WRAPPER_INTRINSICS_H__ +#include "arm_compute/core/NEON/wrapper/intrinsics/abs.h" #include "arm_compute/core/NEON/wrapper/intrinsics/add.h" #include "arm_compute/core/NEON/wrapper/intrinsics/and.h" #include "arm_compute/core/NEON/wrapper/intrinsics/bsl.h" @@ -39,6 +40,7 @@ #include "arm_compute/core/NEON/wrapper/intrinsics/inv.h" #include "arm_compute/core/NEON/wrapper/intrinsics/invsqrt.h" #include "arm_compute/core/NEON/wrapper/intrinsics/load.h" +#include "arm_compute/core/NEON/wrapper/intrinsics/log.h" #include "arm_compute/core/NEON/wrapper/intrinsics/max.h" #include "arm_compute/core/NEON/wrapper/intrinsics/min.h" #include "arm_compute/core/NEON/wrapper/intrinsics/mla.h" @@ -55,5 +57,6 @@ #include "arm_compute/core/NEON/wrapper/intrinsics/setlane.h" #include "arm_compute/core/NEON/wrapper/intrinsics/store.h" #include "arm_compute/core/NEON/wrapper/intrinsics/sub.h" +#include "arm_compute/core/NEON/wrapper/intrinsics/tanh.h" #endif /* __ARM_COMPUTE_WRAPPER_INTRINSICS_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/log.h b/arm_compute/core/NEON/wrapper/intrinsics/log.h new file mode 100644 index 0000000000..5367afb858 --- /dev/null +++ b/arm_compute/core/NEON/wrapper/intrinsics/log.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_LOG_H__ +#define __ARM_COMPUTE_WRAPPER_LOG_H__ + +#include "arm_compute/core/NEON/NEMath.h" +#include <arm_neon.h> + +namespace arm_compute +{ +namespace wrapper +{ +#define VLOG_IMPL(vtype, prefix, postfix) \ + inline vtype vlog(const vtype &a) \ + { \ + return prefix##_##postfix(a); \ + } + +VLOG_IMPL(float32x4_t, vlogq, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VLOG_IMPL(float16x8_t, vlogq, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +#undef VLOG_IMPL +} // namespace wrapper +} // namespace arm_compute +#endif /* __ARM_COMPUTE_WRAPPER_LOG_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/neg.h b/arm_compute/core/NEON/wrapper/intrinsics/neg.h index 0ea1d429fe..7072866003 100644 --- a/arm_compute/core/NEON/wrapper/intrinsics/neg.h +++ b/arm_compute/core/NEON/wrapper/intrinsics/neg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 ARM Limited. + * Copyright (c) 2018-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -30,36 +30,29 @@ namespace arm_compute { namespace wrapper { -#define VNEG_IMPL(vtype, postfix) \ - inline vtype vneg(const vtype &a) \ - { \ - return vneg_##postfix(a); \ +#define VNEG_IMPL(vtype, prefix, postfix) \ + inline vtype vneg(const vtype &a) \ + { \ + return prefix##_##postfix(a); \ } -VNEG_IMPL(int8x8_t, s8) -VNEG_IMPL(int16x4_t, s16) -VNEG_IMPL(int32x2_t, s32) -VNEG_IMPL(float32x2_t, f32) +VNEG_IMPL(int8x8_t, vneg, s8) +VNEG_IMPL(int16x4_t, vneg, s16) +VNEG_IMPL(int32x2_t, vneg, s32) +VNEG_IMPL(float32x2_t, vneg, f32) #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -VNEG_IMPL(float16x4_t, f16) +VNEG_IMPL(float16x4_t, vneg, f16) #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -#undef VNEG_IMPL -#define VNEGQ_IMPL(vtype, postfix) \ - inline vtype vnegq(const vtype &a) \ - { \ - return vnegq_##postfix(a); \ - } - -VNEGQ_IMPL(int8x16_t, s8) -VNEGQ_IMPL(int16x8_t, s16) -VNEGQ_IMPL(int32x4_t, s32) -VNEGQ_IMPL(float32x4_t, f32) +VNEG_IMPL(int8x16_t, vnegq, s8) +VNEG_IMPL(int16x8_t, vnegq, s16) +VNEG_IMPL(int32x4_t, vnegq, s32) +VNEG_IMPL(float32x4_t, vnegq, f32) #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -VNEGQ_IMPL(float16x8_t, f16) +VNEG_IMPL(float16x8_t, vnegq, f16) #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -#undef VNEGQ_IMPL +#undef VNEG_IMPL } // namespace wrapper } // namespace arm_compute #endif /* __ARM_COMPUTE_WRAPPER_NEG_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/tanh.h b/arm_compute/core/NEON/wrapper/intrinsics/tanh.h new file mode 100644 index 0000000000..8a6978a767 --- /dev/null +++ b/arm_compute/core/NEON/wrapper/intrinsics/tanh.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_TANH_H__ +#define __ARM_COMPUTE_WRAPPER_TANH_H__ + +#include "arm_compute/core/NEON/NEMath.h" +#include <arm_neon.h> + +namespace arm_compute +{ +namespace wrapper +{ +#define VTANH_IMPL(vtype, prefix, postfix) \ + inline vtype vtanh(const vtype &a) \ + { \ + return prefix##_##postfix(a); \ + } + +VTANH_IMPL(float32x4_t, vtanhq, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VTANH_IMPL(float16x8_t, vtanhq, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +#undef VTANH_IMPL +} // namespace wrapper +} // namespace arm_compute +#endif /* __ARM_COMPUTE_WRAPPER_TANH_H__ */ diff --git a/arm_compute/core/NEON/wrapper/scalar/add.h b/arm_compute/core/NEON/wrapper/scalar/add.h new file mode 100644 index 0000000000..cfb9040281 --- /dev/null +++ b/arm_compute/core/NEON/wrapper/scalar/add.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_SCALAR_ADD_H__ +#define __ARM_COMPUTE_WRAPPER_SCALAR_ADD_H__ + +#include <arm_neon.h> + +namespace arm_compute +{ +namespace wrapper +{ +inline uint8_t add_sat(const uint8_t &a, const uint8_t &b) +{ + const uint8x8_t va = { a, 0, 0, 0, 0, 0, 0, 0 }; + const uint8x8_t vb = { b, 0, 0, 0, 0, 0, 0, 0 }; + return vget_lane_u8(vqadd_u8(va, vb), 0); +} + +inline int16_t add_sat(const int16_t &a, const int16_t &b) +{ + const int16x4_t va = { a, 0, 0, 0 }; + const int16x4_t vb = { b, 0, 0, 0 }; + return vget_lane_s16(vqadd_s16(va, vb), 0); +} + +inline float add_sat(const float &a, const float &b) +{ + // No notion of saturation exists in floating point + return a + b; +} + +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +inline float16_t add_sat(const float16_t &a, const float16_t &b) +{ + // No notion of saturation exists in floating point + return a + b; +} +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +} // namespace wrapper +} // namespace arm_compute +#endif /* __ARM_COMPUTE_WRAPPER_SCALAR_ADD_H__ */ diff --git a/arm_compute/core/NEON/wrapper/scalar/scalar.h b/arm_compute/core/NEON/wrapper/scalar/scalar.h new file mode 100644 index 0000000000..a52e0ceb28 --- /dev/null +++ b/arm_compute/core/NEON/wrapper/scalar/scalar.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_SCALAR_H__ +#define __ARM_COMPUTE_WRAPPER_SCALAR_H__ + +#include "arm_compute/core/NEON/wrapper/scalar/add.h" + +#endif /* __ARM_COMPUTE_WRAPPER_SCALAR_H__ */ diff --git a/arm_compute/core/NEON/wrapper/wrapper.h b/arm_compute/core/NEON/wrapper/wrapper.h index 61dc42a69b..60dba5c022 100644 --- a/arm_compute/core/NEON/wrapper/wrapper.h +++ b/arm_compute/core/NEON/wrapper/wrapper.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 ARM Limited. + * Copyright (c) 2018-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -29,5 +29,6 @@ // Intrinsics Overloads #include "arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h" +#include "arm_compute/core/NEON/wrapper/scalar/scalar.h" #endif /* __ARM_COMPUTE_WRAPPER_H__ */ |