diff options
| -rw-r--r-- | src/gpu/cl/operators/ClConv2d.cpp | 28 |
1 files changed, 22 insertions, 6 deletions
diff --git a/src/gpu/cl/operators/ClConv2d.cpp b/src/gpu/cl/operators/ClConv2d.cpp index 23c1b8af9a..09beee799b 100644 --- a/src/gpu/cl/operators/ClConv2d.cpp +++ b/src/gpu/cl/operators/ClConv2d.cpp @@ -261,33 +261,49 @@ ConvolutionMethod ClConv2d::get_convolution_method(const ITensorInfo *src, const const bool is_ifm_ge_16 = src->dimension(idx_c) >= 16; const bool is_ofm_lte_8 = weights->dimension(3U) <= 8; const bool workload_gte_8192 = (output_shape[0] * output_shape[1] * output_shape[2]) / 16 >= 8192; - const bool is_ifm_gt_ofm = src->dimension(idx_c) > weights->dimension(3U); + const bool is_ifm_gt_ofm = src->dimension(idx_c) > weights->dimension(3U); + const bool is_m_one = output_shape[1] * output_shape[2] == 1; // Run Winograd if valid and IFM >= 16 if(is_wino_valid && is_ifm_ge_16) { - return ConvolutionMethod::WINOGRAD; + if(is_ofm_lte_8) + { + if(gpu_target == arm_compute::GPUTarget::G71 || gpu_target == arm_compute::GPUTarget::G72 || get_arch_from_target(gpu_target) == arm_compute::GPUTarget::MIDGARD) + { + return ConvolutionMethod::WINOGRAD; + } + } + else + { + return ConvolutionMethod::WINOGRAD; + } } // Direct convolution case if(is_direct_valid) { - if((gpu_target == arm_compute::GPUTarget::G71 || - gpu_target == arm_compute::GPUTarget::G72 || - gpu_target == arm_compute::GPUTarget::MIDGARD)) + if((gpu_target == arm_compute::GPUTarget::G71 || gpu_target == arm_compute::GPUTarget::G72 || get_arch_from_target(gpu_target) == arm_compute::GPUTarget::MIDGARD)) { if(is_large_kernel_sz && is_ifm_ge_16 && is_ifm_gt_ofm) { return ConvolutionMethod::DIRECT; } } - else + else if(gpu_target == arm_compute::GPUTarget::G76) { if((is_large_kernel_sz && workload_gte_8192 && is_ifm_ge_16) || (is_ofm_lte_8 && is_ifm_ge_16)) { return ConvolutionMethod::DIRECT; } } + else + { + if(is_large_kernel_sz || is_ofm_lte_8 || is_m_one) + { + return ConvolutionMethod::DIRECT; + } + } } // Default case |