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authorSiCongLi <sicong.li@arm.com>2021-12-22 11:22:40 +0000
committerSiCong Li <sicong.li@arm.com>2021-12-25 10:54:51 +0000
commitc4270cf958e85e0c41590030e1f9e228493a5ba0 (patch)
treefe26e2724df1d9da12c8462a576688b93838bc79 /src
parentcb86956e1972be4b2ddbaacaa23a0d21185f8ccb (diff)
downloadComputeLibrary-c4270cf958e85e0c41590030e1f9e228493a5ba0.tar.gz
Add tests for FP Cpu Pooling where pool region is completely outside the input
* Add floating point validation tests for this configuration * Fix reference implementation to return -inf for this configuration * Prohibit this config in Cl, as well as non-float cases in Cpu * Direct this config to non-asm path Resolves COMPMID-4998 Change-Id: If88025c51b14ea337aea2441c548f858e95e5819 Signed-off-by: SiCongLi <sicong.li@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6857 Reviewed-by: Gunes Bayir <gunes.bayir@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src')
-rw-r--r--src/core/Utils.cpp12
-rw-r--r--src/cpu/kernels/CpuPool2dKernel.cpp4
-rw-r--r--src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp5
-rw-r--r--src/gpu/cl/kernels/ClPool2dKernel.cpp3
4 files changed, 20 insertions, 4 deletions
diff --git a/src/core/Utils.cpp b/src/core/Utils.cpp
index 930e4c7975..ef16cb5e75 100644
--- a/src/core/Utils.cpp
+++ b/src/core/Utils.cpp
@@ -232,6 +232,18 @@ const std::string &string_from_pooling_type(PoolingType type)
return pool_type_map[type];
}
+bool is_pool_region_entirely_outside_input(const PoolingLayerInfo &info)
+{
+ if(info.is_global_pooling || info.exclude_padding || info.pool_size.x() == 0 || info.pool_size.y() == 0)
+ {
+ return false;
+ }
+ const auto ps = info.pad_stride_info;
+ const auto pool_le_padding_x = info.pool_size.x() <= std::max({ ps.pad_left(), ps.pad_right() });
+ const auto pool_le_padding_y = info.pool_size.y() <= std::max({ ps.pad_top(), ps.pad_bottom() });
+ return pool_le_padding_x || pool_le_padding_y;
+}
+
const std::string &string_from_gemmlowp_output_stage(GEMMLowpOutputStageType output_stage)
{
static std::map<GEMMLowpOutputStageType, const std::string> output_stage_map =
diff --git a/src/cpu/kernels/CpuPool2dKernel.cpp b/src/cpu/kernels/CpuPool2dKernel.cpp
index 00b1ac76f5..f61cd0835d 100644
--- a/src/cpu/kernels/CpuPool2dKernel.cpp
+++ b/src/cpu/kernels/CpuPool2dKernel.cpp
@@ -199,6 +199,10 @@ Status validate_arguments(const ITensorInfo *src, const ITensorInfo *dst, const
const int idx_width = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH);
const int idx_height = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT);
+ ARM_COMPUTE_RETURN_ERROR_ON_MSG((!is_data_type_float(src->data_type()))
+ && (is_pool_region_entirely_outside_input(pool_info)),
+ "Pooling region that is entirely outside input tensor is unsupported for non-float types");
+
std::tie(output_width, output_height) = scaled_dimensions_signed(src->tensor_shape()[idx_width], src->tensor_shape()[idx_height],
pool_size.x(), pool_size.y(), pool_info.pad_stride_info);
ARM_COMPUTE_RETURN_ERROR_ON_MSG((output_width < 1 || output_height < 1), "Calculated output dimension size is invalid");
diff --git a/src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp b/src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp
index 8610bc7f43..a8c6a5e611 100644
--- a/src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp
+++ b/src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp
@@ -104,10 +104,7 @@ Status CpuPool2dAssemblyWrapperKernel::validate(const ITensorInfo *src, const IT
ARM_COMPUTE_RETURN_ERROR_ON_MSG((info.pool_type != PoolingType::AVG) && (info.pool_type != PoolingType::MAX),
"Only AVG and MAX pooling are supported by assembly kernels");
- const auto ps = info.pad_stride_info;
- const auto max_padding = std::max({ ps.pad_left(), ps.pad_right(), ps.pad_top(), ps.pad_bottom() });
- const auto min_pool_sz = std::min(info.pool_size.x(), info.pool_size.y());
- ARM_COMPUTE_RETURN_ERROR_ON_MSG(max_padding > min_pool_sz, "Convolution padding greater than pool size is unsupported by assembly kernels");
+ ARM_COMPUTE_RETURN_ERROR_ON_MSG(is_pool_region_entirely_outside_input(info), "Pooling region that is entirely outside input tensor is unsupported by assembly kernels");
if(dst->total_size() > 0)
{
diff --git a/src/gpu/cl/kernels/ClPool2dKernel.cpp b/src/gpu/cl/kernels/ClPool2dKernel.cpp
index 5e53799f30..2c98c5940f 100644
--- a/src/gpu/cl/kernels/ClPool2dKernel.cpp
+++ b/src/gpu/cl/kernels/ClPool2dKernel.cpp
@@ -57,6 +57,9 @@ Status validate_arguments(const ITensorInfo *src, const ITensorInfo *dst, const
unsigned int pool_size_y = is_global_pooling ? src->dimension(idx_height) : pool_info.pool_size.height;
int output_width = 0;
int output_height = 0;
+
+ ARM_COMPUTE_RETURN_ERROR_ON_MSG(is_pool_region_entirely_outside_input(pool_info), "Pooling region that is entirely outside input tensor is unsupported");
+
std::tie(output_width, output_height) = scaled_dimensions_signed(src->tensor_shape()[idx_width], src->tensor_shape()[idx_height],
pool_size_x, pool_size_y, pool_info.pad_stride_info);
ARM_COMPUTE_RETURN_ERROR_ON_MSG((output_width < 1 || output_height < 1), "Calculated output dimension size is invalid");