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author | Adnan AlSinan <adnan.alsinan@arm.com> | 2022-07-21 16:34:49 +0100 |
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committer | Adnan AlSinan <adnan.alsinan@arm.com> | 2022-07-22 09:59:40 +0000 |
commit | e87120731ca65c54b082734af07f748ac9651427 (patch) | |
tree | 46ea0317661060b70c74955ae495894fa374260b /src/gpu/cl/operators | |
parent | c6b7913b894f8191878c7b73626fbeb65850131c (diff) | |
download | ComputeLibrary-e87120731ca65c54b082734af07f748ac9651427.tar.gz |
Update ClConv2D heuristic to use direct convolution
Resolves COMPMID-5298
Change-Id: I4a7d788bc1f5f568bedcc22e7aca47ede6de71bf
Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Signed-off-by: Adnan AlSinan <adnan.alsinan@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7891
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/gpu/cl/operators')
-rw-r--r-- | src/gpu/cl/operators/ClConv2d.cpp | 28 |
1 files changed, 22 insertions, 6 deletions
diff --git a/src/gpu/cl/operators/ClConv2d.cpp b/src/gpu/cl/operators/ClConv2d.cpp index 23c1b8af9a..09beee799b 100644 --- a/src/gpu/cl/operators/ClConv2d.cpp +++ b/src/gpu/cl/operators/ClConv2d.cpp @@ -261,33 +261,49 @@ ConvolutionMethod ClConv2d::get_convolution_method(const ITensorInfo *src, const const bool is_ifm_ge_16 = src->dimension(idx_c) >= 16; const bool is_ofm_lte_8 = weights->dimension(3U) <= 8; const bool workload_gte_8192 = (output_shape[0] * output_shape[1] * output_shape[2]) / 16 >= 8192; - const bool is_ifm_gt_ofm = src->dimension(idx_c) > weights->dimension(3U); + const bool is_ifm_gt_ofm = src->dimension(idx_c) > weights->dimension(3U); + const bool is_m_one = output_shape[1] * output_shape[2] == 1; // Run Winograd if valid and IFM >= 16 if(is_wino_valid && is_ifm_ge_16) { - return ConvolutionMethod::WINOGRAD; + if(is_ofm_lte_8) + { + if(gpu_target == arm_compute::GPUTarget::G71 || gpu_target == arm_compute::GPUTarget::G72 || get_arch_from_target(gpu_target) == arm_compute::GPUTarget::MIDGARD) + { + return ConvolutionMethod::WINOGRAD; + } + } + else + { + return ConvolutionMethod::WINOGRAD; + } } // Direct convolution case if(is_direct_valid) { - if((gpu_target == arm_compute::GPUTarget::G71 || - gpu_target == arm_compute::GPUTarget::G72 || - gpu_target == arm_compute::GPUTarget::MIDGARD)) + if((gpu_target == arm_compute::GPUTarget::G71 || gpu_target == arm_compute::GPUTarget::G72 || get_arch_from_target(gpu_target) == arm_compute::GPUTarget::MIDGARD)) { if(is_large_kernel_sz && is_ifm_ge_16 && is_ifm_gt_ofm) { return ConvolutionMethod::DIRECT; } } - else + else if(gpu_target == arm_compute::GPUTarget::G76) { if((is_large_kernel_sz && workload_gte_8192 && is_ifm_ge_16) || (is_ofm_lte_8 && is_ifm_ge_16)) { return ConvolutionMethod::DIRECT; } } + else + { + if(is_large_kernel_sz || is_ofm_lte_8 || is_m_one) + { + return ConvolutionMethod::DIRECT; + } + } } // Default case |