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author | Viet-Hoa Do <viet-hoa.do@arm.com> | 2022-09-21 11:31:46 +0100 |
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committer | Viet-Hoa Do <viet-hoa.do@arm.com> | 2022-10-03 16:46:42 +0000 |
commit | b5368fb3da65ca1d31e6acd6cd45b8b6b789f1eb (patch) | |
tree | 90786fcb5f55f90fec6124da6b241cb56ce0d4af /src/gpu/cl/kernels/gemm/reshaped_only_rhs/ClGemmDefaultConfigReshapedRhsOnlyValhall.cpp | |
parent | 304dfdba67958f5987d88ad0ce538399c3e50bc8 (diff) | |
download | ComputeLibrary-b5368fb3da65ca1d31e6acd6cd45b8b6b789f1eb.tar.gz |
Force CL kernel compilation with 64 registers
* For DDK version 30 and higher, force the CL compiler to use
64 registers for NHWC direct convolution.
Resolves: COMPMID-5508
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I7d9ecc3b5a4eceaff44542cd26f6f05e30ab2c1f
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8351
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Diffstat (limited to 'src/gpu/cl/kernels/gemm/reshaped_only_rhs/ClGemmDefaultConfigReshapedRhsOnlyValhall.cpp')
0 files changed, 0 insertions, 0 deletions