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| author | SiCong Li <sicong.li@arm.com> | 2023-11-14 15:17:10 +0000 |
|---|---|---|
| committer | Anitha Raj <anitha.raj@arm.com> | 2023-11-15 14:16:26 +0000 |
| commit | 26c68a0e5f555e316cab18352fa3b62f22af8bfb (patch) | |
| tree | f8a24f6cda3c05335e752aeba5a5f3e0286ac15e /src/cpu/operators/internal/CpuGemmAssemblyDispatch.cpp | |
| parent | c107c9329d258f684c5834ad7bf607fc7cb7305e (diff) | |
| download | ComputeLibrary-26c68a0e5f555e316cab18352fa3b62f22af8bfb.tar.gz | |
Fix various coverity issues
Resolves COMPMID-6677
Signed-off-by: SiCong Li <sicong.li@arm.com>
Change-Id: I99bf2385f6edc0836faacb31f5c66ed4fb051e40
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10729
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'src/cpu/operators/internal/CpuGemmAssemblyDispatch.cpp')
| -rw-r--r-- | src/cpu/operators/internal/CpuGemmAssemblyDispatch.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/operators/internal/CpuGemmAssemblyDispatch.cpp b/src/cpu/operators/internal/CpuGemmAssemblyDispatch.cpp index 82bd465c99..611bc76463 100644 --- a/src/cpu/operators/internal/CpuGemmAssemblyDispatch.cpp +++ b/src/cpu/operators/internal/CpuGemmAssemblyDispatch.cpp @@ -541,6 +541,7 @@ void Fallback<TypeInput, TypeOutput, OutputStage>::prepare(ITensorPack &tensors) { auto b = tensors.get_const_tensor(TensorType::ACL_SRC_1); auto c = tensors.get_const_tensor(TensorType::ACL_SRC_2); + ARM_COMPUTE_ERROR_ON_NULLPTR(b); // Setup up matrix bias in the assembly kernel, it's just a pointer to matrix C. if (c && c->info()->data_type() == DataType::S32) @@ -614,6 +615,7 @@ void Fallback<TypeInput, TypeOutput, OutputStage>::run(ITensorPack &tensors) auto b = tensors.get_const_tensor(TensorType::ACL_SRC_1); auto c = tensors.get_const_tensor(TensorType::ACL_SRC_2); auto d = tensors.get_tensor(TensorType::ACL_DST); + ARM_COMPUTE_ERROR_ON_NULLPTR(a, d); int lda = a->info()->strides_in_bytes().y() / a->info()->element_size(); int ldb = 0; @@ -652,7 +654,7 @@ void Fallback<TypeInput, TypeOutput, OutputStage>::run(ITensorPack &tensors) } // Check if B is pre-tranposed and de-reference if not - if (!_gemm_kernel_asm->B_is_pretransposed()) + if (b_to_use && !_gemm_kernel_asm->B_is_pretransposed()) { ldb = b_to_use->info()->strides_in_bytes().y() / b_to_use->info()->element_size(); multi_stride_b = b_to_use->info()->strides_in_bytes().z() / b_to_use->info()->element_size(); @@ -670,7 +672,7 @@ void Fallback<TypeInput, TypeOutput, OutputStage>::run(ITensorPack &tensors) } // Pretranspose B if required - if (_B_pretranspose_required) + if (b_to_use && _B_pretranspose_required) { // Fixed format kernels need no pretranspose. ARM_COMPUTE_ERROR_ON(arm_compute::is_fixed_format( |