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authorAnton Vainer <anton.vainer@arm.com>2022-01-09 14:37:12 +0200
committerAnton Vainer <anton.vainer@arm.com>2022-01-24 14:53:06 +0000
commit8a9a0fbf6509159cbb8721500517a1497c390f27 (patch)
tree52f001929b7d6298e155048ec308a0c16c108a96 /src/cpu/kernels/select/generic/neon/integer.cpp
parent8d8208c7a2fe4212cc0903e3cd0eddc48ac76a61 (diff)
downloadComputeLibrary-8a9a0fbf6509159cbb8721500517a1497c390f27.tar.gz
Select kernel decoupling
Resolves COMPMID-4614 Signed-off-by: Anton Vainer <anton.vainer@arm.com> Change-Id: I19476d43b8e685de2eed973425d5d31b9cdb84ca Signed-off-by: Anton Vainer <anton.vainer@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6960 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Diffstat (limited to 'src/cpu/kernels/select/generic/neon/integer.cpp')
-rw-r--r--src/cpu/kernels/select/generic/neon/integer.cpp87
1 files changed, 87 insertions, 0 deletions
diff --git a/src/cpu/kernels/select/generic/neon/integer.cpp b/src/cpu/kernels/select/generic/neon/integer.cpp
new file mode 100644
index 0000000000..71b2f0b933
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+++ b/src/cpu/kernels/select/generic/neon/integer.cpp
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2022 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/TensorInfo.h"
+#include "arm_compute/core/Types.h"
+
+#include <arm_neon.h>
+
+#include "src/cpu/kernels/select/generic/neon/impl.h"
+
+namespace arm_compute
+{
+namespace cpu
+{
+void neon_s8_select_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_8<int8_t, uint8x16_t>(c, x, y, output, window);
+}
+void neon_s16_select_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_16<int16_t, uint16x8_t>(c, x, y, output, window);
+}
+void neon_s32_select_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_32<int32_t, uint32x4_t>(c, x, y, output, window);
+}
+void neon_s8_select_not_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_not_same_rank<int8_t>(c, x, y, output, window);
+}
+void neon_s16_select_not_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_not_same_rank<int16_t>(c, x, y, output, window);
+}
+void neon_s32_select_not_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_not_same_rank<int32_t>(c, x, y, output, window);
+}
+void neon_u8_select_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_8<uint8_t, uint8x16_t>(c, x, y, output, window);
+}
+void neon_u16_select_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_16<uint16_t, uint16x8_t>(c, x, y, output, window);
+}
+void neon_u32_select_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_32<uint32_t, uint32x4_t>(c, x, y, output, window);
+}
+void neon_u8_select_not_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_not_same_rank<uint8_t>(c, x, y, output, window);
+}
+void neon_u16_select_not_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_not_same_rank<uint16_t>(c, x, y, output, window);
+}
+void neon_u32_select_not_same_rank(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window)
+{
+ return select_op_not_same_rank<uint32_t>(c, x, y, output, window);
+}
+
+} // namespace cpu
+
+} // namespace arm_compute