diff options
| author | Georgios Pinitas <georgios.pinitas@arm.com> | 2017-12-14 17:53:39 +0000 |
|---|---|---|
| committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:42:33 +0000 |
| commit | 08c5a06e2b49df0d7912deedd6d26d2c603cfe58 (patch) | |
| tree | 0742d970b5dff2354f917063ad11980af97dee93 /src/core/NEON/kernels/arm64/NEGEMMLowpAArch64V8P4Kernel.cpp | |
| parent | 941cd706bea1847ae89e4ee13f144fc51050ad1f (diff) | |
| download | ComputeLibrary-08c5a06e2b49df0d7912deedd6d26d2c603cfe58.tar.gz | |
COMPMID-750: Fix assembly kernel interfaces
Assembly kernel interfaces were wrongly translating the layout of the
input matrices. Boolean flags transform0 and transform1 do not match the
actual interface of the gemm assembly code which expects transpose0 and
transposed1.
Change-Id: Ia4df65a533834647fa63e78e8c897924793949df
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/113410
Tested-by: BSG Visual Compute Jenkins server to access repositories on http://mpd-gerrit.cambridge.arm.com <bsgcomp@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Diffstat (limited to 'src/core/NEON/kernels/arm64/NEGEMMLowpAArch64V8P4Kernel.cpp')
| -rw-r--r-- | src/core/NEON/kernels/arm64/NEGEMMLowpAArch64V8P4Kernel.cpp | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/src/core/NEON/kernels/arm64/NEGEMMLowpAArch64V8P4Kernel.cpp b/src/core/NEON/kernels/arm64/NEGEMMLowpAArch64V8P4Kernel.cpp index e996e571ab..099934a49d 100644 --- a/src/core/NEON/kernels/arm64/NEGEMMLowpAArch64V8P4Kernel.cpp +++ b/src/core/NEON/kernels/arm64/NEGEMMLowpAArch64V8P4Kernel.cpp @@ -84,20 +84,21 @@ std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input0, ITe namespace arm_compute { -void NEGEMMLowpAArch64V8P4Kernel::internal_configure(const ITensor *input0, const ITensor *input1, ITensor *output, ITensor *workspace, float alpha, float beta, bool transform_0, bool transform_1) +void NEGEMMLowpAArch64V8P4Kernel::internal_configure(const ITensor *input0, const ITensor *input1, ITensor *output, ITensor *workspace, float alpha, float beta, bool is_transposed_0, + bool is_transposed_1) { // Perform validate step ARM_COMPUTE_ERROR_ON_NULLPTR(input0, input1, output); ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input0->info(), input1->info(), output->info())); - _input0 = input0; - _input1 = input1; - _output = output; - _workspace = workspace; - _alpha = alpha; - _beta = beta; - _transform_0 = transform_0; - _transform_1 = transform_1; + _input0 = input0; + _input1 = input1; + _output = output; + _workspace = workspace; + _alpha = alpha; + _beta = beta; + _is_transposed_0 = is_transposed_0; + _is_transposed_1 = is_transposed_1; // Configure kernel window auto win_config = validate_and_configure_window(input0->info(), input1->info(), output->info()); @@ -136,7 +137,7 @@ void NEGEMMLowpAArch64V8P4Kernel::run(const Window &window, const ThreadInfo &in Iterator in0(_input0, window); Iterator out(_output, window); - GemmInterleaved<gemm_u8_12x8, gemm_u8_12x8::operand_type, gemm_u8_12x8::result_type> gemm(&info.cpu_info, M, N, K, !_transform_1, !_transform_1); + GemmInterleaved<gemm_u8_12x8, gemm_u8_12x8::operand_type, gemm_u8_12x8::result_type> gemm(&info.cpu_info, M, N, K, _is_transposed_0, _is_transposed_1); constexpr size_t alignment = 4096; const size_t offset = (gemm.get_working_size() + alignment - 1) * info.thread_id; |