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author | Pablo Tello <pablo.tello@arm.com> | 2018-03-14 17:55:27 +0000 |
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committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:49:16 +0000 |
commit | 7fad9b1d00f3ee1488ba4038d1371f6ea219f8b7 (patch) | |
tree | ded71e1cfa8e0c085f8bce5dfc26a99786d60e52 /src/core/CPP/CPPTypes.cpp | |
parent | 1562be3e8a449360a90af75f6f1481a30d41be75 (diff) | |
download | ComputeLibrary-7fad9b1d00f3ee1488ba4038d1371f6ea219f8b7.tar.gz |
COMPMID-1021: CPUInfo refactoring.
Removed CPUTarget in favor of the CPUModel type.
CPUInfo now holds a vector of N CPUs.
CPUInfo autoinitialise upon construction with 1 GENERIC CPU.
CPPScheduler fills CPUInfo's vector upon construction (runtime).
IScheduler has a single CPUInfo obj and ThreadInfo always gets a pointer to it (avoid copying the vector)
Change-Id: I30f293258c959c87f6bac5eac8b963beb6a4d365
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/124626
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Diffstat (limited to 'src/core/CPP/CPPTypes.cpp')
-rw-r--r-- | src/core/CPP/CPPTypes.cpp | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/src/core/CPP/CPPTypes.cpp b/src/core/CPP/CPPTypes.cpp new file mode 100644 index 0000000000..7459957f8f --- /dev/null +++ b/src/core/CPP/CPPTypes.cpp @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include "arm_compute/core/CPP/CPPTypes.h" + +#include "arm_compute/core/Error.h" + +#ifndef BARE_METAL +#include <sched.h> +#endif /* defined(BARE_METAL) */ + +using namespace arm_compute; + +void CPUInfo::set_fp16(const bool fp16) +{ + _fp16 = fp16; +} + +void CPUInfo::set_dotprod(const bool dotprod) +{ + _dotprod = dotprod; +} + +void CPUInfo::set_cpu_model(unsigned int cpuid, CPUModel model) +{ + ARM_COMPUTE_ERROR_ON(cpuid >= _percpu.size()); + if(_percpu.size() > cpuid) + { + _percpu[cpuid] = model; + } +} + +bool CPUInfo::has_fp16() const +{ + return _fp16; +} + +bool CPUInfo::has_dotprod() const +{ + return _dotprod; +} + +CPUModel CPUInfo::get_cpu_model(unsigned int cpuid) const +{ + ARM_COMPUTE_ERROR_ON(cpuid >= _percpu.size()); + if(cpuid < _percpu.size()) + { + return _percpu[cpuid]; + } + return CPUModel::GENERIC; +} + +unsigned int CPUInfo::get_L1_cache_size() const +{ + return _L1_cache_size; +} + +void CPUInfo::set_L1_cache_size(unsigned int size) +{ + _L1_cache_size = size; +} + +unsigned int CPUInfo::get_L2_cache_size() const +{ + return _L2_cache_size; +} + +void CPUInfo::set_L2_cache_size(unsigned int size) +{ + _L2_cache_size = size; +} + +void CPUInfo::set_cpu_num(unsigned int cpu_count) +{ + _percpu.resize(cpu_count); +} + +CPUInfo::CPUInfo() + : _percpu(1) +{ + // The core library knows nothing about the CPUs so we set only 1 CPU to be generic. + // The runtime NESCheduler will initialise this vector with the correct CPU models. + // See void detect_cpus_configuration(CPUInfo &cpuinfo) in CPPUtils.h + _percpu[0] = CPUModel::GENERIC; +} + +CPUModel CPUInfo::get_cpu_model() const +{ +#if defined(BARE_METAL) || (!defined(__arm__) && !defined(__aarch64__)) + return get_cpu_model(0); +#else /* defined(BARE_METAL) || (!defined(__arm__) && !defined(__aarch64__)) */ + return get_cpu_model(sched_getcpu()); +#endif /* defined(BARE_METAL) || (!defined(__arm__) && !defined(__aarch64__)) */ +} |