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authorGeorgios Pinitas <georgios.pinitas@arm.com>2019-12-13 12:33:09 +0000
committerGeorgios Pinitas <georgios.pinitas@arm.com>2019-12-19 16:29:36 +0000
commitf9a36f4af8bcdc6bf16c11c91eedc0f5ab51aff1 (patch)
tree432a8c61ed3f9d927c7a642170a34daee33b87d7 /arm_compute
parentfe13c4835145c278c306141fceee9c8edf8362dc (diff)
downloadComputeLibrary-f9a36f4af8bcdc6bf16c11c91eedc0f5ab51aff1.tar.gz
COMPMID-2819: Retain configuration step data layout to avoid side-effects.
Configuring functions serially can lead to side-effects in tensor attributes. One of them is the data layout changing in case functions share same IO tensors. Retain DataLayout used during configuration. Change-Id: I17538ce08b86df6986f0fcf21fa6544fbd5bd74b Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-on: https://review.mlplatform.org/c/2470 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Diffstat (limited to 'arm_compute')
-rw-r--r--arm_compute/core/CL/kernels/CLPoolingLayerKernel.h1
-rw-r--r--arm_compute/core/CL/kernels/CLScaleKernel.h1
-rw-r--r--arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h1
3 files changed, 3 insertions, 0 deletions
diff --git a/arm_compute/core/CL/kernels/CLPoolingLayerKernel.h b/arm_compute/core/CL/kernels/CLPoolingLayerKernel.h
index db1a756229..68a99039d8 100644
--- a/arm_compute/core/CL/kernels/CLPoolingLayerKernel.h
+++ b/arm_compute/core/CL/kernels/CLPoolingLayerKernel.h
@@ -75,6 +75,7 @@ public:
const ICLTensor *_input;
ICLTensor *_output;
PoolingLayerInfo _pool_info;
+ DataLayout _data_layout;
BorderSize _border_size;
unsigned int _num_elems_processed_per_iteration;
};
diff --git a/arm_compute/core/CL/kernels/CLScaleKernel.h b/arm_compute/core/CL/kernels/CLScaleKernel.h
index ff72af29fc..1ada3cde85 100644
--- a/arm_compute/core/CL/kernels/CLScaleKernel.h
+++ b/arm_compute/core/CL/kernels/CLScaleKernel.h
@@ -75,6 +75,7 @@ public:
public:
InterpolationPolicy _interpolationPolicy = InterpolationPolicy::BILINEAR;
+ DataLayout _data_layout = DataLayout::UNKNOWN;
};
} // namespace arm_compute
#endif /*__ARM_COMPUTE_CLSCALEKERNEL_H__ */
diff --git a/arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h b/arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h
index 5f45a90cef..5b143250e9 100644
--- a/arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h
+++ b/arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h
@@ -194,6 +194,7 @@ private:
const ITensor *_input;
ITensor *_output;
PoolingLayerInfo _pool_info;
+ DataLayout _data_layout;
unsigned int _num_elems_processed_per_iteration;
BorderSize _border_size;
bool _is_square;