COMPMID-1759 NEON: Implement Reverse

Change-Id: I53852069ca223eb571a443e501278980fc60f3b4
Reviewed-on: https://review.mlplatform.org/474
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>

7 files changed, 259 insertions, 1 deletions

diff --git a/arm_compute/core/NEON/NEKernels.h b/arm_compute/core/NEON/NEKernels.h
index 6c804e7711..26d2acaf5c 100644
--- a/arm_compute/core/NEON/NEKernels.h
+++ b/arm_compute/core/NEON/NEKernels.h
@@ -109,6 +109,7 @@
 #include "arm_compute/core/NEON/kernels/NERemapKernel.h"
 #include "arm_compute/core/NEON/kernels/NEReorgLayerKernel.h"
 #include "arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h"
+#include "arm_compute/core/NEON/kernels/NEReverseKernel.h"
 #include "arm_compute/core/NEON/kernels/NEScaleKernel.h"
 #include "arm_compute/core/NEON/kernels/NEScharr3x3Kernel.h"
 #include "arm_compute/core/NEON/kernels/NESelectKernel.h"
diff --git a/arm_compute/core/NEON/kernels/NEReverseKernel.h b/arm_compute/core/NEON/kernels/NEReverseKernel.h
new file mode 100644
index 0000000000..8d78619008
--- /dev/null
+++ b/arm_compute/core/NEON/kernels/NEReverseKernel.h
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEREVERSEKERNEL_H__
+#define __ARM_COMPUTE_NEREVERSEKERNEL_H__
+
+#include "arm_compute/core/NEON/INEKernel.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Interface for the reverse layer kernel. */
+class NEReverseKernel : public INEKernel
+{
+public:
+    const char *name() const override
+    {
+        return "NEReverseKernel";
+    }
+    /** Default constructor */
+    NEReverseKernel();
+    /** Prevent instances of this class from being copied (As this class contains pointers) */
+    NEReverseKernel(const NEReverseKernel &) = delete;
+    /** Prevent instances of this class from being copied (As this class contains pointers) */
+    NEReverseKernel &operator=(const NEReverseKernel &) = delete;
+    /** Allow instances of this class to be moved */
+    NEReverseKernel(NEReverseKernel &&) = default;
+    /** Allow instances of this class to be moved */
+    NEReverseKernel &operator=(NEReverseKernel &&) = default;
+    /** Default destructor */
+    ~NEReverseKernel() = default;
+    /** Initialise the kernel's inputs and output
+     *
+     * @param[in]  input  Input tensor. Data types supported: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+     * @param[out] output Output tensor. Data type supported: Same as @p input
+     * @param[in]  axis   Axis tensor. Contains the indices of the dimensions to reverse. Data type supported: U32
+     */
+    void configure(const ITensor *input, ITensor *output, const ITensor *axis);
+
+    /** Static function to check if given info will lead to a valid configuration of @ref NEReverseKernel
+     *
+     * @param[in] input  Input tensor info. Data types supported: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+     * @param[in] output Output tensor info. Data type supported: Same as @p input
+     * @param[in] axis   Axis tensor info. Contains the indices of the dimensions to reverse. Data type supported: U32
+     *
+     * @return a status
+     */
+    static Status validate(const ITensorInfo *input, const ITensorInfo *output, const ITensorInfo *axis);
+
+    // Inherited methods overridden:
+    void run(const Window &window, const ThreadInfo &info) override;
+
+private:
+    const ITensor *_input;
+    ITensor       *_output;
+    const ITensor *_axis;
+};
+} // namespace arm_compute
+#endif /*__ARM_COMPUTE_NEREVERSEKERNEL_H__ */
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/combine.h b/arm_compute/core/NEON/wrapper/intrinsics/combine.h
new file mode 100644
index 0000000000..acc9d3a50f
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/combine.h
@@ -0,0 +1,53 @@
+/*
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_COMBINE_H__
+#define __ARM_COMPUTE_WRAPPER_COMBINE_H__
+
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VCOMBINE_IMPL(rtype, vtype, prefix, postfix)      \
+    inline rtype vcombine(const vtype &a, const vtype &b) \
+    {                                                     \
+        return prefix##_##postfix(a, b);                  \
+    }
+
+VCOMBINE_IMPL(uint8x16_t, uint8x8_t, vcombine, u8)
+VCOMBINE_IMPL(int8x16_t, int8x8_t, vcombine, s8)
+VCOMBINE_IMPL(uint16x8_t, uint16x4_t, vcombine, u16)
+VCOMBINE_IMPL(int16x8_t, int16x4_t, vcombine, s16)
+VCOMBINE_IMPL(uint32x4_t, uint32x2_t, vcombine, u32)
+VCOMBINE_IMPL(int32x4_t, int32x2_t, vcombine, s32)
+VCOMBINE_IMPL(float32x4_t, float32x2_t, vcombine, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VCOMBINE_IMPL(float16x8_t, float16x4_t, vcombine, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+#undef VCOMBINE_IMPL
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_COMBINE_H__ */
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
index f65ce85021..d00d3303f1 100644
--- a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
+++ b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018 ARM Limited.
+ * Copyright (c) 2018-2019 ARM Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -27,6 +27,7 @@
 #include "arm_compute/core/NEON/wrapper/intrinsics/add.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/and.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/bitselect.h"
+#include "arm_compute/core/NEON/wrapper/intrinsics/combine.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/dup_n.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/exp.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/gethigh.h"
@@ -45,6 +46,7 @@
 #include "arm_compute/core/NEON/wrapper/intrinsics/neg.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/padd.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/pow.h"
+#include "arm_compute/core/NEON/wrapper/intrinsics/rev64.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/store.h"
 #include "arm_compute/core/NEON/wrapper/intrinsics/sub.h"
 
diff --git a/arm_compute/core/NEON/wrapper/intrinsics/rev64.h b/arm_compute/core/NEON/wrapper/intrinsics/rev64.h
new file mode 100644
index 0000000000..f6f0f9f6e4
--- /dev/null
+++ b/arm_compute/core/NEON/wrapper/intrinsics/rev64.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_WRAPPER_REV64_H__
+#define __ARM_COMPUTE_WRAPPER_REV64_H__
+
+#include <arm_neon.h>
+
+namespace arm_compute
+{
+namespace wrapper
+{
+#define VREV64_IMPL(vtype, prefix, postfix) \
+    inline vtype vrev64(const vtype &a)     \
+    {                                       \
+        return prefix##_##postfix(a);       \
+    }
+
+VREV64_IMPL(uint8x8_t, vrev64, u8)
+VREV64_IMPL(int8x8_t, vrev64, s8)
+VREV64_IMPL(uint16x4_t, vrev64, u16)
+VREV64_IMPL(int16x4_t, vrev64, s16)
+VREV64_IMPL(uint32x2_t, vrev64, u32)
+VREV64_IMPL(int32x2_t, vrev64, s32)
+VREV64_IMPL(float32x2_t, vrev64, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VREV64_IMPL(float16x4_t, vrev64, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+VREV64_IMPL(uint8x16_t, vrev64q, u8)
+VREV64_IMPL(int8x16_t, vrev64q, s8)
+VREV64_IMPL(uint16x8_t, vrev64q, u16)
+VREV64_IMPL(int16x8_t, vrev64q, s16)
+VREV64_IMPL(uint32x4_t, vrev64q, u32)
+VREV64_IMPL(int32x4_t, vrev64q, s32)
+VREV64_IMPL(float32x4_t, vrev64q, f32)
+#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+VREV64_IMPL(float16x8_t, vrev64q, f16)
+#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+
+#undef VREV64_IMPL
+} // namespace wrapper
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_WRAPPER_REV64_H__ */
diff --git a/arm_compute/runtime/NEON/NEFunctions.h b/arm_compute/runtime/NEON/NEFunctions.h
index 4e198c5a4b..2e94030e53 100644
--- a/arm_compute/runtime/NEON/NEFunctions.h
+++ b/arm_compute/runtime/NEON/NEFunctions.h
@@ -111,6 +111,7 @@
 #include "arm_compute/runtime/NEON/functions/NERemap.h"
 #include "arm_compute/runtime/NEON/functions/NEReorgLayer.h"
 #include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h"
+#include "arm_compute/runtime/NEON/functions/NEReverse.h"
 #include "arm_compute/runtime/NEON/functions/NEScale.h"
 #include "arm_compute/runtime/NEON/functions/NEScharr3x3.h"
 #include "arm_compute/runtime/NEON/functions/NESelect.h"
diff --git a/arm_compute/runtime/NEON/functions/NEReverse.h b/arm_compute/runtime/NEON/functions/NEReverse.h
new file mode 100644
index 0000000000..cf0fdc14bf
--- /dev/null
+++ b/arm_compute/runtime/NEON/functions/NEReverse.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2018-2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef __ARM_COMPUTE_NEREVERSE_H__
+#define __ARM_COMPUTE_NEREVERSE_H__
+
+#include "arm_compute/runtime/NEON/INESimpleFunctionNoBorder.h"
+
+#include "arm_compute/core/Types.h"
+
+namespace arm_compute
+{
+class ITensor;
+
+/** Basic function to run @ref NEReverseKernel */
+class NEReverse : public INESimpleFunctionNoBorder
+{
+public:
+    /** Initialize the function
+     *
+     * @param[in]  input  Input tensor. Data types supported: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+     * @param[out] output Output tensor. Data type supported: Same as @p input
+     * @param[in]  axis   Axis tensor. Contains the indices of the dimensions to reverse. Data type supported: U32
+     */
+    void configure(const ITensor *input, ITensor *output, const ITensor *axis);
+    /** Static function to check if given info will lead to a valid configuration of @ref NEReverseKernel
+     *
+     * @param[in] input  Input tensor info. Data types supported: U8/S8/QASYMM8/U16/S16/F16/U32/S32/F32
+     * @param[in] output Output tensor info. Data type supported: Same as @p input
+     * @param[in] axis   Axis tensor info. Contains the indices of the dimensions to reverse. Data type supported: U32
+     *
+     * @return a status
+     */
+    static Status validate(const ITensorInfo *input, const ITensorInfo *output, const ITensorInfo *axis);
+};
+} // namespace arm_compute
+#endif /* __ARM_COMPUTE_NEREVERSE_H__ */