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author | Michele Di Giorgio <michele.digiorgio@arm.com> | 2020-03-09 19:32:33 +0000 |
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committer | Georgios Pinitas <georgios.pinitas@arm.com> | 2020-04-20 11:06:59 +0000 |
commit | 47a899017e67556ffffef78571c9be61dd7bc3f0 (patch) | |
tree | 9ec9c12eb912f042262fe596e225f7c7737c3a0f /arm_compute/core | |
parent | d1d7722cfc5ee130115d8d195068a98b16102a21 (diff) | |
download | ComputeLibrary-47a899017e67556ffffef78571c9be61dd7bc3f0.tar.gz |
COMPMID-3237: Implement NEQLSTMLayer
COMPMID-3082: Extend NEQLSTMLayer with enhancements
Change-Id: I88175b7bf69494a4eae510b74176fe8a0d6cd770
Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/2969
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Reviewed-by: Sheri Zhang <sheri.zhang@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute/core')
-rw-r--r-- | arm_compute/core/NEON/kernels/NEGEMMLowpMatrixMultiplyKernel.h | 6 | ||||
-rw-r--r-- | arm_compute/core/utils/misc/InfoHelpers.h | 35 |
2 files changed, 37 insertions, 4 deletions
diff --git a/arm_compute/core/NEON/kernels/NEGEMMLowpMatrixMultiplyKernel.h b/arm_compute/core/NEON/kernels/NEGEMMLowpMatrixMultiplyKernel.h index c6b40eb30e..8f47c5089d 100644 --- a/arm_compute/core/NEON/kernels/NEGEMMLowpMatrixMultiplyKernel.h +++ b/arm_compute/core/NEON/kernels/NEGEMMLowpMatrixMultiplyKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019 ARM Limited. + * Copyright (c) 2017-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -63,14 +63,14 @@ public: * kernels change the layout of the original matrices to be more cache-friendly. * * @param[in] input0 Input tensor containing the interleaved Matrix A. Data type supported: U8/QASYMM8/S8/QASYMM8_SIGNED - * @param[in] input1 Input tensor containing the transposed1xW Matrix B. Data type supported: U8/QASYMM8/S8/QASYMM8_SIGNED/QSYMM8_PER_CHANNEL + * @param[in] input1 Input tensor containing the transposed1xW Matrix B. Data type supported: U8/QASYMM8/S8/QASYMM8_SIGNED/QSYMM8/QSYMM8_PER_CHANNEL * @param[out] output Output tensor to store the result of matrix multiplication. Data type supported: S32 */ void configure(const ITensor *input0, const ITensor *input1, ITensor *output); /** Static function to check if given info will lead to a valid configuration of @ref NEGEMMLowpMatrixMultiplyKernel * * @param[in] input0 Input tensor info containing the interleaved Matrix A. Data type supported: U8/QASYMM8/S8/QASYMM8_SIGNED - * @param[in] input1 Input tensor info containing the transposed Matrix B. Data type supported: U8/QASYMM8/S8/QASYMM8_SIGNED/QSYMM8_PER_CHANNEL + * @param[in] input1 Input tensor info containing the transposed Matrix B. Data type supported: U8/QASYMM8/S8/QASYMM8_SIGNED/QSYMM8/QSYMM8_PER_CHANNEL * @param[in] output Output tensor info to store the result of matrix multiplication. Data type supported: S32 * * @return a status diff --git a/arm_compute/core/utils/misc/InfoHelpers.h b/arm_compute/core/utils/misc/InfoHelpers.h index b572de2433..8cf701c124 100644 --- a/arm_compute/core/utils/misc/InfoHelpers.h +++ b/arm_compute/core/utils/misc/InfoHelpers.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -26,6 +26,7 @@ #include "arm_compute/core/Error.h" #include "arm_compute/core/Types.h" +#include "arm_compute/runtime/common/LSTMParams.h" namespace arm_compute { @@ -58,6 +59,38 @@ inline bool is_relu6(ActivationLayerInfo activation_info) && activation_info.a() == 6.f; return activation_info.enabled() && (is_lu_bounded_relu || is_bounded_relu); } + +/** Build LSTMParams<ITensorInfo> object by extracting the metadata from each + * tensor. + * + * @param[in] lstm_params The LSTMParams<T> object containing the tensors. + * @param[out] lstm_params_info The LSTMParams<ITensorInfo> to be constructed. + * + */ +template <typename T> +inline void build_lstm_params_tensor_info(const LSTMParams<T> &lstm_params, + LSTMParams<ITensorInfo> *lstm_params_info) +{ + if(lstm_params.has_peephole_opt()) + { + ARM_COMPUTE_ERROR_ON_NULLPTR(lstm_params.cell_to_forget_weights(), lstm_params.cell_to_output_weights()); + lstm_params_info->set_peephole_params(lstm_params.cell_to_forget_weights()->info(), lstm_params.cell_to_output_weights()->info()); + } + if(lstm_params.has_projection()) + { + ARM_COMPUTE_ERROR_ON_NULLPTR(lstm_params.projection_weights()); + lstm_params_info->set_projection_params(lstm_params.projection_weights()->info(), + lstm_params.projection_bias() != nullptr ? lstm_params.projection_bias()->info() : nullptr); + } + if(!lstm_params.has_cifg_opt()) + { + ARM_COMPUTE_ERROR_ON_NULLPTR(lstm_params.input_to_input_weights(), lstm_params.recurrent_to_input_weights(), lstm_params.input_gate_bias()); + + const ITensorInfo *cell_to_input_weights_info = (lstm_params.has_peephole_opt()) ? lstm_params.cell_to_input_weights()->info() : nullptr; + lstm_params_info->set_cifg_params(lstm_params.input_to_input_weights()->info(), lstm_params.recurrent_to_input_weights()->info(), + cell_to_input_weights_info, lstm_params.input_gate_bias()->info()); + } +} } // namespace info_helpers } // namespace utils } // namespace arm_compute |