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author | Gian Marco Iodice <gianmarco.iodice@arm.com> | 2017-08-29 16:05:25 +0100 |
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committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:35:24 +0000 |
commit | 06b184ac568dc974986bae680957c4477f8ef6ca (patch) | |
tree | fa97d020f81f9a17edb6b50394f2bdf46f810ce9 /arm_compute/core | |
parent | 351c20a361521101307d365a4f91ad883fa272ea (diff) | |
download | ComputeLibrary-06b184ac568dc974986bae680957c4477f8ef6ca.tar.gz |
COMPMID-439 - Refactored NEQuantizationLayer and NEQuantizationLayer in order to support 3D input tensors
Change-Id: I03eac2108a30bed56d40dfd52e75577a35d492e0
Reviewed-on: http://mpd-gerrit.cambridge.arm.com/85783
Tested-by: Kaizen <jeremy.johnson+kaizengerrit@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Diffstat (limited to 'arm_compute/core')
3 files changed, 99 insertions, 16 deletions
diff --git a/arm_compute/core/NEON/kernels/NEDequantizationLayerKernel.h b/arm_compute/core/NEON/kernels/NEDequantizationLayerKernel.h index 095a833ab4..8f66b8a64f 100644 --- a/arm_compute/core/NEON/kernels/NEDequantizationLayerKernel.h +++ b/arm_compute/core/NEON/kernels/NEDequantizationLayerKernel.h @@ -30,7 +30,11 @@ namespace arm_compute { class ITensor; -/** Interface for the dequantization layer kernel. */ +/** Interface for the dequantization layer kernel. + * + * @note The implementation supports only 3D input tensors + * + */ class NEDequantizationLayerKernel : public INEKernel { public: @@ -48,12 +52,12 @@ public: ~NEDequantizationLayerKernel() = default; /** Set input, output, min and max. * - * @param[in] input Source tensor. Data types supported: U8. - * @param[out] output Destination tensor. Data types supported: F32. - * @param[in] min Minimum value of the input tensor. - * @param[in] max Maximum value of the input tensor. + * @param[in] input Source tensor with at least 3 dimensions. The dimensions over the third will be interpreted as batches. Data type supported: U8. + * @param[out] output Destination tensor with the same dimensions of input. Data type supported: F32. + * @param[in] min_max Pointer to the tensor with shape [2, batches] which stores the minimum and maximum value for each 3D input tensor. + * The dimensions over the second must match the batched dimensions of the input tensor. Data type supported: F32 */ - void configure(const ITensor *input, ITensor *output, const float *min, const float *max); + void configure(const ITensor *input, ITensor *output, const ITensor *min_max); // Inherited methods overridden: void run(const Window &window, const ThreadInfo &info) override; @@ -61,8 +65,7 @@ public: private: const ITensor *_input; ITensor *_output; - const float *_min; - const float *_max; + const ITensor *_min_max; }; } #endif /*__ARM_COMPUTE_NEDEQUANTIZATIONLAYERKERNEL_H__ */ diff --git a/arm_compute/core/NEON/kernels/NEMinMaxLayerKernel.h b/arm_compute/core/NEON/kernels/NEMinMaxLayerKernel.h new file mode 100644 index 0000000000..5e01acf3e6 --- /dev/null +++ b/arm_compute/core/NEON/kernels/NEMinMaxLayerKernel.h @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2017 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#ifndef __ARM_COMPUTE_NEMINMAXLAYERKERNEL_H__ +#define __ARM_COMPUTE_NEMINMAXLAYERKERNEL_H__ + +#include "arm_compute/core/NEON/INEKernel.h" + +#include <cstdint> +#include <mutex> + +namespace arm_compute +{ +class ITensor; + +/** Interface for the kernel to perform min max search on a 3D tensor. */ +class NEMinMaxLayerKernel : public INEKernel +{ +public: + /** Default constructor */ + NEMinMaxLayerKernel(); + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEMinMaxLayerKernel(const NEMinMaxLayerKernel &) = delete; + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEMinMaxLayerKernel &operator=(const NEMinMaxLayerKernel &) = delete; + /** Allow instances of this class to be moved */ + NEMinMaxLayerKernel(NEMinMaxLayerKernel &&) = default; + /** Allow instances of this class to be moved */ + NEMinMaxLayerKernel &operator=(NEMinMaxLayerKernel &&) = default; + /** Default destructor */ + ~NEMinMaxLayerKernel() = default; + + /** Initialise the kernel's input and outputs. + * + * @note output[0] = minimum + * @note output[1] = maximum + * + * @param[in] input Input tensor with at least 3 dimensions. The dimensions over the third will be interpreted as batches. Data type supported: F32. + * @param[out] output Output tensor with shape [2, batches, ...] which stores the minimum and maximum value for each 3D input tensor. + * The dimensions over the second must match the batched dimensions of the input tensor. Data types supported: F32 + */ + void configure(const ITensor *input, ITensor *output); + /** Resets global minimum and maximum. */ + void reset(); + + // Inherited methods overridden: + void run(const Window &window, const ThreadInfo &info) override; + +private: + void update_min_max(float *out_ptr, float min, float max); + const ITensor *_input; + ITensor *_output; + std::mutex _mtx; +}; +} +#endif /* __ARM_COMPUTE_NEMINMAXLAYERKERNEL_H__ */
\ No newline at end of file diff --git a/arm_compute/core/NEON/kernels/NEQuantizationLayerKernel.h b/arm_compute/core/NEON/kernels/NEQuantizationLayerKernel.h index 92cd142653..617a2da337 100644 --- a/arm_compute/core/NEON/kernels/NEQuantizationLayerKernel.h +++ b/arm_compute/core/NEON/kernels/NEQuantizationLayerKernel.h @@ -30,7 +30,11 @@ namespace arm_compute { class ITensor; -/** Interface for the quantization layer kernel. */ +/** Interface for the quantization layer kernel. + * + * @note The implementation supports only 3D input tensors + * + */ class NEQuantizationLayerKernel : public INEKernel { public: @@ -48,12 +52,12 @@ public: ~NEQuantizationLayerKernel() = default; /** Set the input, output, min and max. * - * @param[in] input Source tensor. Data types supported: F32. - * @param[out] output Destination tensor. Data types supported: U8. - * @param[in] min Pointer to the minimum value of the input tensor. - * @param[in] max Pointer to the maximum value of the input tensor. + * @param[in] input Source tensor with at least 3 dimensions. The dimensions over the third will be interpreted as batches. Data types supported: F32. + * @param[out] output Destination tensor with the same dimensions of input. Data types supported: U8. + * @param[in] min_max Pointer to the tensor with shape [2, batches] which stores the minimum and maximum value for each 3D input tensor. + * The dimensions over the second must match the batched dimensions of the input tensor. Data type supported: F32 */ - void configure(const ITensor *input, ITensor *output, const float *min, const float *max); + void configure(const ITensor *input, ITensor *output, const ITensor *min_max); // Inherited methods overridden: void run(const Window &window, const ThreadInfo &info) override; @@ -61,8 +65,7 @@ public: private: const ITensor *_input; ITensor *_output; - const float *_min; - const float *_max; + const ITensor *_min_max; }; } #endif /*__ARM_COMPUTE_NEQUANTIZATIONLAYERKERNEL_H__ */ |