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author | Sheri Zhang <sheri.zhang@arm.com> | 2020-07-14 15:29:28 +0100 |
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committer | Sheri Zhang <sheri.zhang@arm.com> | 2020-07-17 11:16:17 +0000 |
commit | e068199254e525176b2c1eaf8420b9ddac3d9011 (patch) | |
tree | 1ef6ab5dcb4311c4c599bd93b2788b9a4c6d271f /arm_compute/core/NEON/kernels | |
parent | a084b46835d20fdfe6e590b91b7ca64fba3542df (diff) | |
download | ComputeLibrary-e068199254e525176b2c1eaf8420b9ddac3d9011.tar.gz |
COMPMID-3576: Nightly failure: NEON/PoolingLayer/Float/FP16/MaxUnpooling S10
Extend NEPoolingLayer max pooling to extract indices for FP16
Signed-off-by: Sheri Zhang <sheri.zhang@arm.com>
Change-Id: I5a7c754be353e4c2c5d0ab3794e9427408d0c4fa
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/3580
Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com>
Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Diffstat (limited to 'arm_compute/core/NEON/kernels')
-rw-r--r-- | arm_compute/core/NEON/kernels/NEMaxUnpoolingLayerKernel.h | 5 | ||||
-rw-r--r-- | arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h | 19 |
2 files changed, 17 insertions, 7 deletions
diff --git a/arm_compute/core/NEON/kernels/NEMaxUnpoolingLayerKernel.h b/arm_compute/core/NEON/kernels/NEMaxUnpoolingLayerKernel.h index 9c9b1945f6..f3ea049a87 100644 --- a/arm_compute/core/NEON/kernels/NEMaxUnpoolingLayerKernel.h +++ b/arm_compute/core/NEON/kernels/NEMaxUnpoolingLayerKernel.h @@ -55,7 +55,10 @@ public: * @note Output shape must be equal to the shape of the original input to pool. * * @param[in] input Source tensor. Data types supported: QASYMM8/QASYMM8_SIGNED/F16/F32. - * @param[out] indices The indices of the maximal values. Data type supported: U32. + * @param[in] indices Tensor containing the offset to store the input elements in the output tensor. + * @ref NEPoolingLayerKernel with indices should precede this function in order to + * properly reconstruct the output tensor. + * The tensor shape of this tensor has to be equal to the input tensor shape. Data type supported: U32. * @param[out] output Destination tensor. Data types supported: Same as @p input. * @param[in] pool_info Contains pooling operation information described in @ref PoolingLayerInfo. */ diff --git a/arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h b/arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h index 15d63c746b..2be25080cd 100644 --- a/arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h +++ b/arm_compute/core/NEON/kernels/NEPoolingLayerKernel.h @@ -91,12 +91,6 @@ private: * @param[in] window_input Input region on which to execute the kernel. * @param[in] window Output region on which to execute the kernel. */ - void pooling2_f32_nchw_maxpool_indices(const Window &window_input, const Window &window); - /** Function to perform 2x2 pooling and compute the pooling indices. The indices can be used for max unpool. - * - * @param[in] window_input Input region on which to execute the kernel. - * @param[in] window Output region on which to execute the kernel. - */ void pooling2_f32_nhwc_maxpool_indices(const Window &window_input, const Window &window); /** Function to perform MxN pooling for 32-bit floating point values. * @@ -138,6 +132,19 @@ private: * @param[in] exclude_padding Flag to specify exclusion of padding from the operation. */ void pooling2_f16_nchw(const Window &window_input, const Window &window, PoolingType pooling_type, bool exclude_padding = false); + /** Function to perform 2x2 pooling and compute the pooling indices for FP32/FP16. The indices can be used for max unpool. + * + * @param[in] window_input Input region on which to execute the kernel. + * @param[in] window Output region on which to execute the kernel. + */ + template <typename T> + void pooling2_nchw_maxpool_indices(const Window &window_input, const Window &window); + /** Function to perform 2x2 pooling and compute the pooling indices. The indices can be used for max unpool. + * + * @param[in] window_input Input region on which to execute the kernel. + * @param[in] window Output region on which to execute the kernel. + */ + void pooling2_f16_nhwc_maxpool_indices(const Window &window_input, const Window &window); /** Function to perform 3x3 pooling. * * @param[in] window_input Input region on which to execute the kernel. |