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author | Michel Iwaniec <michel.iwaniec@arm.com> | 2017-11-29 10:48:23 +0000 |
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committer | Anthony Barbier <anthony.barbier@arm.com> | 2018-11-02 16:42:17 +0000 |
commit | 5dfeae62f89eefdc241887c3e67cd1c04ec0b6a7 (patch) | |
tree | d6b5d40353aa68aeda803c809812fd6e208c3e7f /arm_compute/core/NEON/NEAsymm.h | |
parent | 7f0f790ae7f5dd044a5d7564492583b8df974a11 (diff) | |
download | ComputeLibrary-5dfeae62f89eefdc241887c3e67cd1c04ec0b6a7.tar.gz |
IVGCVSW-820: Add QASYMM8 support to NeonActivationLayerKernel
Change-Id: Ic3881e97b4fcbae0ac287a1e010cfc6f0fd8d7d1
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/112139
Tested-by: BSG Visual Compute Jenkins server to access repositories on http://mpd-gerrit.cambridge.arm.com <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Diffstat (limited to 'arm_compute/core/NEON/NEAsymm.h')
-rw-r--r-- | arm_compute/core/NEON/NEAsymm.h | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/arm_compute/core/NEON/NEAsymm.h b/arm_compute/core/NEON/NEAsymm.h index d227d3ccbe..f0d7439d40 100644 --- a/arm_compute/core/NEON/NEAsymm.h +++ b/arm_compute/core/NEON/NEAsymm.h @@ -28,6 +28,12 @@ namespace arm_compute { +using qasymm8x8_t = uint8x8_t; /**< 8 bit quantized asymmetric vector with 8 elements */ +using qasymm8x8x2_t = uint8x8x2_t; /**< 8 bit quantized asymmetric vector with 16 elements */ +using qasymm8x8x3_t = uint8x8x3_t; /**< 8 bit quantized asymmetric vector with 24 elements */ +using qasymm8x8x4_t = uint8x8x4_t; /**< 8 bit quantized asymmetric vector with 32 elements */ +using qasymm8x16_t = uint8x16_t; /**< 8 bit quantized asymmetric vector with 16 elements */ + /** Round to the nearest division by a power-of-two using exponent * * @note This function calculates the following expression: (x + 2^n -1 ) / 2^n where n = exponent @@ -38,6 +44,18 @@ namespace arm_compute * @return the nearest division by a power-of-two using exponent */ int32x4_t rounding_divide_by_pow2(int32x4_t x, int exponent); + +/** Perform a multiply-accumulate on all 16 components of a QASYMM8 vector + * + * vd*vs + vo + * + * @param[in] vd Input vector value in QASYMM8 format + * @param[in] vs Vector multiplier in F32 format. The multiplier value must be duplicated across all four lanes. + * @param[in] vo Vector addend in F32 format. The addend value must be duplicated across all four lanes. + * + * @return A 16-component vector in QASYMM8 format, saturated to fit + */ +uint8x16_t vmlaq_qasymm8(qasymm8x16_t vd, float32x4_t vs, float32x4_t vo); } // namespace arm_compute #include "arm_compute/core/NEON/NEAsymm.inl" -#endif // __ARM_COMPUTE_NEASYMM_H__
\ No newline at end of file +#endif // __ARM_COMPUTE_NEASYMM_H__ |